MM74C48

MM54C48 NSC | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 6

Technical content

Features

Y Wide supply voltage range 3.0V to 15V Y Guaranteed noise margin 1.0V Y High noise immunity 0.45 V CC (typ.) Y Low power fan out of 2 TTL compatibility driving 74L Y High current sourcing output (up to 50 mA) Y Ripple blanking for leading or trailing zeros (optional) Y Lamp test provision Connection Diagram Dual-In-Line Package TL/F/5883–1 Top View Order Number MM54C48 or MM74C48 Segment Identification TL/F/5883–2 Numerical Designations and Resultant Displays TL/F/5883–3 C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Voltage at Any Pin b0.3V to V CC a 0.3V Operating Temperature Range MM54C48 b55§Ct o a125§C MM74C48 b40§Ct o a85§C Storage Temperature Range b65§Ct o a150§C Power Dissipation Dual-In-Line 700 mW Small Outline 500 mW Operating V CC Range 3.0V to 15V Absolute Maximum V CC 18V Lead Temperature (Soldering, 10 seconds) 260 §C Symbol Parameter Conditions Min Typ Max Units CMOS to CMOS VIN(1) Logical ‘‘1’’ Input Voltage V CC e 5.0V 3.5 V VCC e 10V 8.0 V VIN(0) Logical ‘‘0’’ Input Voltage V CC e 5.0V 1.5 V VCC e 10V 2.0 V VOUT(1) Logical ‘‘1’’ Output Voltage V CC e 5.0V, I O eb 10 mA 4.5 V (RB Output Only) VCC e 10V, I O eb 10 mA 9.0 V VOUT(0) Logical ‘‘0’’ Output Voltage V CC e 5.0V, I O e 10 mA 0.5 V VCC e 10V, I O e 10 mA 1.0 V IIN(1) Logical ‘‘1’’ Input Current V CC e 15.0V, V IN e 15V 0.005 1.0 mA IIN(0) Logical ‘‘0’’ Input Current V CC e 15.0V, V IN e 0V b1.0 b0.005 mA ICC Supply Current V CC e 15V 0.05 300 mA CMOS/LPTTL INTERFACE VIN(1) Logical ‘‘1’’ Input Voltage 54C, V CC e 4.5V V CC b 1.5 V 74C, V CC e 4.75V V CC b 1.5 V VIN(0) Logical ‘‘0’’ Input Voltage 54C, V CC e 4.5V 0.8 V 74C, V CC e 4.75V 0.8 V VOUT(1) Logical ‘‘1’’ Output Voltage 54C, V CC e 4.5V, I O eb 50 mA 2.4 V (RB Output Only) 74C, V CC e 4.75V, I O eb 50 mA 2.4 V VOUT(0) Logical ‘‘0’’ Output Voltage 54C, V CC e 4.5V, I O e 360 mA 0.4 V 74C, V CC e 4.75V, I O e 360 mA 0.4 V OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) ISOURCE Output Source Current V CC e 4.75V, V OUT e 0.4V b0.80 mA (P-Channel)(RB Output Only) VCC e 10V, V OUT e 0.5V b4.0 mA ISINK Output Sink Current V CC e 5.0V, V OUT e VCC 1.75 3.6 mA(N-Channel) T A e 25§C ISINK Output Sink Current V CC e 10V, V OUT e VCC 8.0 16 mA(N-Channel) T A e 25§C ISOURCE Output Source Current V CC e 5.0V, V OUT e 3.4V b20 b50 mA (NPN Bipolar) VCC e 5.0V, V OUT e 3.0V b65 mA VCC e 10V, V OUT e 8.4V b20 b50 mA VCC e 10V, V OUT e 8.0V b65 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Capacitance is guaranteed by periodic testing. Note 3: C PD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics Application Note, AN-90.

Symbol Parameter Conditions Min Typ Max Units tpd0, tpd1 Propagation Delay to a ‘‘1’’ or ‘‘0’’ on V CC e 5.0V 450 1500 ns Segment Outputs from Data Inputs VCC e 10V 160 500 ns tpd0 Propagation Delay to a ‘‘0’’ on V CC e 5.0V 500 1600 ns Segment Outputs from RB Input VCC e 10V 180 550 ns tpd0 Propagation Delay to a ‘‘0’’ on V CC e 5.0V 350 1200 ns Segment Outputs from Blanking Input VCC e 10V 140 450 ns tpd1 Propagation Delay to a ‘‘1’’ on V CC e 5.0V 450 1500 ns Segment Outputs from Lamp Test VCC e 10V 160 500 ns tpd1 Propagation Delay to a ‘‘1’’ on RB V CC e 5.0V 600 2000 ns Output from RB Input VCC e 10V 250 800 ns tpd0 Propagation Delay to a ‘‘0’’ on RB V CC e 5.0V 140 450 ns Output from RB Input VCC e 10V 50 150 ns *AC Parameters are guaranteed by DC correlated testing. Typical Applications Typical Connection Utilizing the Ripple-Blanking Feature TL/F/5883–4 First three stages will blank leading zeros, the fourth stage will not blank zeros.

Typical Applications (Continued) Blanking Input Connection Diagram TL/F/5883–5 When RBO/BI is forced low, all segment outputs are off regardless of the state of any other input condition. Light Emitting Diode (LED) Readout TL/F/5883–6 TL/F/5883–7 Incandescent Readout TL/F/5883–8 **A filament pre-warm resistor is recommended to reduce filament thermal shock and increase the effective cold resistance of the filament. Fluorescent Readout TL/F/5883–9

Typical Applications (Continued) Gas Discharge Readout TL/F/5883–10 Liquid Crystal (LC) Readout TL/F/5883–11 Direct DC drive of LC’s not recommended for life of LC readouts. Truth Table Decimal Inputs Outputs or BI/RBO² Note Function LT RBI D C B A a b c d e f g

0 H H L L L L H HHHHHHL 1

1 H X LLLH H LHHLLLL 1

2 H X LLHL H HHLHHLH

3 H X LLHH H HHHHLLH

4 H X LHLL H LHHLLHH

5 H X LHLH H HLHHLHH

6 H X LHHL H L LHHHHH

7 H X LH H H H H H HLLLL

8 H X HL L L H HHHHHHH

9 H X HLLH H H H HLLH H

R B I H L LLLL L LLLLLLL 3 L T L X XXXX H HHHHHHH 4 H e high level, L e low level, X e irrelevant Note 1: The blanking input (BI) must be open when output functions 0–15 are desired. The ripple-blanking input (RBI) must be high, if blanking of a decimal zero is not desired. Note 2: When a low logic level is applied directly to the blanking input (BI), all segment outputs are low regardless of the level of any other input. Note 3: When ripple-blanking input (RBI) and inputs A, B, C, and D are at a low level with the lamp-test input high, all segment outputs go low and the ripple- blanking output (RBO) goes to a low level (response condition). Note 4: When the blanking input/ripple-blanking output (BI/RBO) is open and a low is applied to the lamp-test input, all segment outputs are high. ²One BI/RBO is wire-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO).

MM54C48/MM74C48 BCD-to-7 Segment Decoder Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C48J or MM74C48J Molded Dual-In-Line Package (N) Order Number MM54C48N or MM74C48N LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

1111 West Bardin Road Fax: (

a49) 0-180-530 85 86 13th Floor, Straight Block, Tel: 81-043-299-2309 Arlington, TX 76017 Email: cnjwge @ tevm2.nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-043-299-2408 Tel: 1(800) 272-9959 Deutsch Tel: ( a49) 0-180-530 85 85 Tsimshatsui, Kowloon Fax: 1(800) 737-7018 English Tel: ( a49) 0-180-532 78 32 Hong Kong Fran3ais Tel: ( a49) 0-180-532 93 58 Tel: (852) 2737-1600 Italiano Tel: ( a49) 0-180-534 16 80 Fax: (852) 2736-9960 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.