MM74C42 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

■ Supply voltage range: 3V to 15V ■ Tenth power TTL compatible: drive 2 LPTTL loads ■ High noise immunity: 0.45 VCC (typ.) ■ Low power: 50 nW (typ.) ■ Medium speed operation: 10 MHz (typ.) with 10V VCC

Applications

  • Automotive
  • Data terminals
  • Instrumentation
  • Medical electronics
  • Alarm systems
  • Industrial electronics
  • Remote metering
  • Computers Ordering Code: Connection Diagram Pin Assignments for DIP Top View Order Number Package Number Package Description MM74C42N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

www.fairchildsemi.com 2 MM74C42 Schematic Diagram Truth Table Inputs Outputs D C BA0123456789 00000111111111 00011011111111 00101101111111 00111110111111 010011110 1 1111 01011111101111 01101111110111 01111111111011 10001111111101 10011111111110 10101111111111 10111111111111 11001111111111 11011111111111 11101111111111 11111111111111

3 www.fairchildsemi.com MM74C42 Absolute Maximum Ratings(Note 1) Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Tempera- ture Range” they are not meant to imply that the devices should be oper- ated at these limits. The Electrical Characteristics tables provide conditions for actual device operation. Min/Max limits apply across temperature range unless otherwise noted TA = 25°C, CL = 50 pF , unless otherwise specified Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: Capacitance is guaranteed by periodic testing. Note 4: C PD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note— AN-90. Voltage at Any Pin (Note 1) −0.3V to VCC + 0.3V Operating T emperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Power Dissipation (PD ) Dual-In-Line 700 mW Small Outline 500 mW Operating V CC Range 3.0V to 15V Absolute Maximum VCC 18V Lead Temperature (Soldering, 10 seconds) 260 °C Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) Logical “1” Input Voltage V CC = 5.0V 3.5 V VCC = 10V 8.0 V VIN(0) Logical “0” Input Voltage V CC = 5.0V 1.5 V VCC = 10V 2.0 V VOUT(1) Logical “1” Output Voltage V CC = 5.0V, IO = −10 µA 4 . 5 V VCC = 10V, IO = −10 µA 9 . 0 V VOUT(0) Logical “0” Output Voltage V CC = 5.0V, IO = 10 µA 0 . 5 V VCC = 10V, IO = 10 µA 1 . 0 V IIN(1) Logical “1” Input Current V CC = 15V, VIN = 15V 1.0 µA IIN(0) Logical “0” Input Current V CC = 15V, VIN = 0V −1.0 µA ICC Supply Current V CC = 15V 0.05 300 µA CMOS/LPTTL INTERFACE VIN(1) Logical “1” Input Voltage V CC = 4.75V V CC − 1.5 V VIN(0) Logical “0” Input Voltage V CC = 4.75V 0.8 V VOUT(1) Logical “1” Output Voltage V CC = 4.75V, IO = −360 µA 2.4 V VOUT(0) Logical “0” Output Voltage V CC = 4.75V, IO = 360 µA 0 . 4 V OUTPUT DRIVE (see Family Characteristics Data Sheet) TA = 25°C (short circuit current) ISOURCE Output Source Current V CC = 5.0V, VIN(0) = 0V, VOUT = 0V −1.75 mA ISOURCE Output Source Current V CC = 10V, VIN(0) = 0V, V OUT = 0V −8.0 mA ISINK Output Sink Current V CC = 5.0V, VIN(1) = 5.0V, VOUT = VCC 1.75 mA ISINK Output Sink Current V CC = 10V, VIN(1) = 10V, V OUT = VCC 8.0 mA Symbol Parameter Conditions Min Typ Max Units tpd Propagation Delay Time to V CC = 5.0V 200 300 ns Logical “0” or “1” V CC = 10V 90 140 ns C IN Input Capacitance (Note 3) 5 pF C PD Power Dissipation Capacitance (Note 4) 50 pF

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. MM74C42 BCD-to-Decimal Decoder LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N16E