MM74C240 FAIRCHILD | Alldatasheet

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Features

I Wide supply voltage range (3V to 15V) I High noise immunity (0.45 VCC typ) I Low power consumption I High capacitive load drive capability I 3-STATE outputs I Input protection I TTL compatibility I 20-pin dual-in-line package I High speed 25 ns (typ.) @ 10V, 50 pF (MM74C244) Ordering Code: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagrams MM74C240 (Top View) MM74C244 (Top View) Order Number Package Number Package Description MM74C240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide MM74C240N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide MM74C244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide MM74C244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

www.fairchildsemi.com 2 MM74C240  MM74C244 Logic Diagrams MM74C240 MM74C244 Truth Tables MM74C240 1 = HIGH 0 = LOW MM74C244 X = Don’t Care Z = 3-STATE ODA IA OA 1XZ 1XZ 001 010 ODB IB OB 1XZ 1XZ 001 010 ODA IA OA 1XZ 1XZ 000 011 ODB IB OB 1XZ 1XZ 000 011

3 www.fairchildsemi.com MM74C240  MM74C244 Absolute Maximum Ratings(Note 1) Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics table provides conditions for actual device operation. Min/Max limits apply across temperature range, unless otherwise noted Voltage at Any Pin −0.3V to VCC + 0.3V Operating Temperature Range −55°C to +125°C Storage Temperature Range −65°C to +150°C Power Dissipation Dual-In-Line 700 mW Small Outline 500 mW Operating V CC Range 3V to 15V Absolute Maximum VCC 18V Lead Temperature (Soldering, 10 seconds) 260 °C Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) Logical “1” Input Voltage V CC = 5V 3.5 V VCC = 10V 8.0 VIN(0) Logical “0” Input Voltage V CC = 5V 1.5 V VCC = 10V 2.0 VOUT(1) Logical “1” Output Voltage V CC = 5V, I O = −10 µA4 . 5 V VCC = 10V, IO = −10 µA9 . 0 VOUT(0) Logical “0” Output Voltage V CC = 5V, I O = 10 µA0 . 5 V VCC = 10V, IO = 10 µA1 . 0 IOZ 3-STATE Output Current V CC = 10V, OD = VIH ±10 µA IIN(1) Logical “1” Input Current V CC = 15V, VIN = 15V 0.005 1.0 µA IIN(0) Logical “0” Input Current V CC = 15V, VIN = 0V −1.0 −0.005 µA ICC Supply Current V CC = 15V 0.05 300 µA CMOS/LPTTL INTERFACE V IN(1) Logical “1” Input Voltage V CC = 4.75V V CC − 1.5 V VIN(0) Logical “0” Input Voltage V CC = 4.75V 0.8 V VOUT(1) Logical “1” Output Voltage V CC = 4.75V, IO = −450 µAV CC − 0.4 V VCC = 4.75V, IO = −2.2 mA 2.4 V VOUT(0) Logical “0” Output Voltage V CC = 4.75V, IO = 2.2 mA 0.4 V OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current) I SOURCE Output Source Current V CC = 5V, V OUT = 0V −14 −30 mA (P-Channel) T A = 25°C VCC = 10V, VOUT = 0V −36 −70 mA TA = 25°C ISINK Output Sink Current V CC = 5V, V OUT = VCC 12 20 mA (N-Channel) T A = 25°C VCC = 10V, VOUT = VCC 48 70 mA TA = 25°C

www.fairchildsemi.com 4 MM74C240  MM74C244 TA = 25°C, CL = 50 pF, unless otherwise specified Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: C PD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note, AN-90. Note 4: Capacitance is guaranteed by periodic testing. Symbol Parameter Conditions Min Typ Max Units tPD(1), Propagation Delay tPD(0) (Data In to Out) MM74C240 V CC = 5V, CL = 50 pF 60 90 ns VCC = 10V, CL = 50 pF 40 70 V CC = 5V, CL = 150 pF 80 110 VCC = 10V, CL = 150 pF 60 90 MM74C244 V CC = 5V, CL = 50 pF 45 70 ns VCC = 10V, CL = 50 pF 25 50 VCC = 5V, CL = 150 pF 60 90 VCC = 10V, CL = 150 pF 40 70 t1H , t0H Propagation Delay Output R L = 1k, CL = 50 pF Disable to High Impedance V CC = 5V 45 80 ns State (from a Logic Level) V CC = 10V 35 60 tH1 , tH0 Propagation Delay Output R L = 1k, CL = 50 pF Disable to Logic Level V CC = 5V 50 90 ns (from High Impedance State) V CC = 10V 30 60 tT(HL), tT(LH) Transition Time V CC = 5V, CL = 50 pF 45 80 ns VCC = 10V, CL = 50 pF 30 60 VCC = 5V, CL = 150 pF 75 140 VCC = 10V, CL = 150 pF 50 100 C PD Power Dissipation (Note 3) Capacitance (Output Enabled per Buffer) MM74C240 100 pF MM74C244 100 (Output Disabled per Buffer) MM74C240 10 pF MM74C244 0 C IN Input Capacitance (Note 4) V IN = 0V, f = 1 MHz, TA = 25°C 10 pF (Any Input) C O Output Capacitance (Note 4) V IN = 0V, f = 1 MHz, TA = 25°C 10 pF (Output Disabled)

5 www.fairchildsemi.com MM74C240  MM74C244 Typical Application Typical Performance Characteristics N-Channel Output Drive at 25°C MM74C240 Propagation Delay vs. Load Capacitance P-Channel Output Drive at 25°C MM74C244 Propagation Delay vs. Load Capacitance

www.fairchildsemi.com 6 MM74C240  MM74C244 AC Test Circuits and Switching Time Waveforms tpd0, tpd1 t1H and tH1 t0H and tH0 Note: Delays measured with input tr, tf ≤ 20 ns. CMOS to CMOS t 1H and tH1 Note: VOH is defined as the DC output high voltage when the device is loaded with a 1 kΩ resistor to ground. tOH and tH0 Note: VOL is defined as the DC output low voltage when the device is loaded with a 1 kΩ resistor to VCC .

7 www.fairchildsemi.com MM74C240  MM74C244 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B

www.fairchildsemi.com 8 MM74C240  MM74C244 Inverting  Non-Inverting Octal Buffer and Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com