MM54C221 NSC | Alldatasheet
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Y Wide supply voltage range 4.5V to 15V Y Guaranteed noise margin 1.0V Y High noise immunity 0.45 V CC (typ.) Y Low power TTL compatibility fan out of 2 driving 74L Connection Diagrams Timing Component TL/F/5904–1 Dual-In-Line Package TL/F/5904–2 Top View Order Number MM54C221 or MM74C221 Truth Table Inputs Outputs Clear A B Q Q LX X L H XH X LH XX L LH HL u Éß H v H Éß H e High level L e Low level u e Transition from low to high v e Transition from high to low É e One high level pulse ß e One low level pulse X e Irrelevant C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Voltage at Any Pin b0.3V to V CC a 0.3V Operating Temperature Range MM54C221 b55§Ct o a125§C MM74C221 b40§Ct o a85§C Storage Temperature Range b65§Ct o a150§C Power Dissipation Dual-In-Line 700 mW Small Outline 500 mW Operating V CC Range 4.5V to 15V Absolute Maximum V CC 18V REXT t 80 V CC (X) Lead Temperature (Soldering, 10 seconds) 260 §C Symbol Parameter Conditions Min Typ Max Units CMOS to CMOS VIN(1) Logical ‘‘1’’ Input Voltage V CC e 5V 3.5 V VCC e 10V 8.0 V VIN(0) Logical ‘‘0’’ Input Voltage V CC e 5V 1.5 V VCC e 10V 2.0 V VOUT(1) Logical ‘‘1’’ Output Voltage V CC e 5V, I O eb 10 mA 4.5 V VCC e 10V, I O eb 10 mA 9.0 V VOUT(0) Logical ‘‘0’’ Output Voltage V CC e 5V, I O ea 10 mA 0.5 V VCC e 10V, I O ea 10 mA1 V IIN(1) Logical ‘‘1’’ Input Current V CC e 15V, V IN e 15V 0.005 1.0 mA IIN(0) Logical ‘‘0’’ Input Current V CC e 15V, V IN e 0V b1.0 b0.005 mA ICC Supply Current (Standby) V CC e 15V, R EXT e %, 0.05 300 mAQ1, Q2 e Logic ‘‘0’’ (Note 3) ICC Supply Current V CC e 15V, Q1 e Logic ‘‘1’’, 15 mA(During Output Pulse) Q2 e Logic ‘‘0’’ (Figure 4) VCC e 5V, Q1 e Logic ‘‘1’’, 2m AQ2 e Logic ‘‘0’’ (Figure 4) Leakage Current at R/C EXT Pin V CC e 15V, V CEXT e 5V 0.01 3.0 mA CMOS/LPTTL Interface VIN(1) Logical ‘‘1’’ Input Voltage 54C V CC e 4.5V V CC b 1.5 V 74C V CC e 4.75V V CC b 1.5 V VIN(0) Logical ‘‘0’’ Input Voltage 54C V CC e 4.5V 0.8 V 74C V CC e 4.75V 0.8 V VOUT(1) Logical ‘‘1’’ Output Voltage 54C V CC e 4.5V, I O eb 360 mA 2.4 V 74C V CC e 4.75V, I O eb 360 mA 2.4 V VOUT(0) Logical ‘‘0’’ Output Voltage 54C V CC e 4.5V, I O e 360 mA 0.4 V 74C V CC e 4.75V, I O e 360 mA 0.4 V Output Drive (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current) ISOURCE Output Source Current V CC e 5V b1.75 mA(P-Channel) T A e 25§C, V OUT e 0V ISOURCE Output Source Current V CC e 10V b8m A(P-Channel) T A e 25§C, V OUT e 0V ISINK Output Sink Current V CC e 5V 1.75 mA(N-Channel) T A e 25§C, V OUT e VCC ISINK Output Sink Current V CC e 10V 8m A(N-Channel) T A e 25§C, V OUT e VCC
Symbol Parameter Conditions Min Typ Max Units tpd A, B Propagation Delay from Trigger V CC e 5V 250 500 ns Input (A, B) to Output Q, Q VCC e 10V 120 250 ns tpd CL Propagation Delay from Clear V CC e 5V 250 500 ns Input (CL) to Output Q, Q VCC e 10V 120 250 ns tS Time Prior to Trigger Input (A, B) V CC e 5V 150 50 ns that Clear must be Set V CC e 10V 60 20 ns tW(A, B) Trigger Input (A, B) Pulse Width V CC e 5V 150 50 ns VCC e 10V 70 30 ns tW(CL) Clear Input (CL) Pulse Width V CC e 5V 150 50 ns VCC e 10V 70 30 ns tW(OUT) Qo rQ Output Pulse Width V CC e 5V, R EXT e 10k, 900 nsCEXT e 0p F VCC e 10V, R EXT e 10k, 350 nsCEXT e 0p F VCC e 15V, R EXT e 10k, 320 nsCEXT e 0p F VCC e 5V, R EXT e 10k, 9.0 10.6 12.2 msCEXT e 1000 pF (Figure 1) VCC e 10V, R EXT e 10k, 9.0 10 11 msCEXT e 1000 pF (Figure 1) VCC e 15V, R EXT e 10k, 8.9 9.8 10.8 msCEXT e 1000 pF (Figure 1) VCC e 5V, R EXT e 10k, 900 1020 1200 msCEXT e 0.1 mF (Figure 2) VCC e 10V, R EXT e 10k, 900 1000 1100 msCEXT e 0.1 mF (Figure 2) VCC e 15V, R EXT e 10k, 900 990 1100 msCEXT e 0.1 mF (Figure 2) RON ON Resistance of Transistor V CC e 5V (Note 4) 50 150 X between R/C EXT to C EXT VCC e 10V (Note 4) 25 65 X VCC e 15V (Note 4) 16.7 45 X Output Duty Cycle R e 10k, C e 1000 pF 90 % R e 10k, C e 0.1 mF9 0 % (Note 5) CIN Input Capacitance R/C EXT Input (Note 2) 15 25 pF Any Other Input (Note 2) 5 pF *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Capacitance is guaranteed by periodic testing. Note 3: In Standby (Q e Logic ‘‘0’’) the power dissipated equals the leakage current plus V CC/REXT. Note 4: See AN-138 for detailed explanation R ON. Note 5: Maximum output duty cycle e REXT/REXT a 1000.
TL/F/5904–7 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C221J or MM74C221C
MM54C221/MM74C221 Dual Monostable Multivibrator Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number MM54C221N or MM74C221N LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.
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