MM74C164 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

I Supply voltage range: 3V to 15V I Tenth power TTL compatible: drive 2 LPTTL loads I High noise immunity: 0.45 VCC (typ.) I Low power: 50 nW (typ.) I Medium speed operation: 0.8 MHz (typ.) with 10V supply

Applications

  • Data terminals  Instrumentation  Medical electronics  Alarm systems  Industrial electronics  Remote metering  Computers Ordering Code: Connection Diagram Top View Truth Table Serial Inputs A and B Order Number Package Number Package Description MM74C164M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74C164N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Inputs Output tn tn+1 AB Q A 111 010 100 000

www.fairchildsemi.com 2 MM74C164 Block Diagram

3 www.fairchildsemi.com MM74C164 Absolute Maximum Ratings(Note 1) Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Tempera- ture Range” they are not meant to imply that the devices should be oper- ated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. Min/Max limits apply across temperature range unless otherwise noted Voltage at Any Pin −0.3V to VCC + 0.3V Operating Temperature Range −55°C to +125°C Storage Temperature Range −65°C to +150°C Absolute Maximum VCC 18V Power Dissipation (PD ) Dual-In-Line 700 mW Small Outline 500 mW Operating VCC Range 3V to 15V Lead Temperature (soldering, 10 seconds) 260 °C Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) Logical “1” Input Voltage V CC = 5V 3.5 V VCC = 10V 8.0 VIN(0) Logical “0” Input Voltage V CC = 5V 1.5 V VCC = 10V 2.0 VOUT(1) Logical “1” Output Voltage V CC = 5V, IO = −10 µA4 . 5 V VCC = 10V, IO = −10 µA9 . 0 VOUT(0) Logical “0” Output Voltage V CC = 5V, IO = +10 µA0 . 5 V VCC = 10V, IO = +10 µA1 . 0 IIN(1) Logical “1” Input Current V CC = 15V, VIN = 15V 0.005 1.0 µA IIN(0) Logical “0” Input Current V CC = 15V, VIN = 0V −1.0 −0.005 µA ICC Supply Current V CC = 15V 0.05 300 µA CMOS TO LPTTL INTERFACE VIN(1) Logical “1” Input Voltage V CC = 4.75V V CC − 1.5 V VIN(0) Logical “0” Input Voltage V CC = 4.75V 0.8 V VOUT(1) Logical “1” Output Voltage V CC = 4.75V, IO = −360 µA2 . 4 V VOUT(0) Logical “0” Output Voltage V CC = 4.75V, IO = 360 µA0 . 4 V OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current) ISOURCE Output Source Current V CC = 5V, VIN(0) = 0V −1.75 mA TA = 25°C, VOUT = 0V ISOURCE Output Source Current V CC = 10V, VIN(0) = 0V −8.0 mA TA = 25°C, VOUT = 0V ISINK Output Sink Current V CC = 5V, VIN(1) = 5V 1.75 mA TA = 25°C, VOUT = VCC ISINK Output Sink Current V CC = 10V, VIN(1) = 10V 8.0 mA TA = 25°C, VOUT = VCC

www.fairchildsemi.com 4 MM74C164 TA = 25°C, CL = 50 pF, unless otherwise noted Note 2: AC Parameters are guaranteed by DC correlated testing. Note 3: Capacitance is guaranteed by periodic testing. Note 4: C PD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics application note AN-90. Typical Applications 74C Compatibility Guaranteed Noise Margin as a Function of VCC Symbol Parameter Conditions Min Typ Max Units tpd1 Propagation Delay Time to a Logical “0” or a VCC = 5V 230 310 ns Logical “1” from Clock to Q V CC = 10V 90 120 tpd0 Propagation Delay Time to a Logical “0” from VCC = 5V 280 380 ns Clear to Q V CC = 10V 110 150 tS Time Prior to Clock Pulse that Data V CC = 5V 200 110 ns Must be Present V CC = 10V 80 30 tH Time After Clock Pulse that V CC = 5V 0 0 ns Data Must be Held V CC = 10V 0 0 fMAX Maximum Clock Frequency V CC = 5V 2.0 3 MHz VCC = 10V 5.5 8 tW Minimum Clear Pulse Width V CC = 5V 150 250 ns VCC = 10V 55 90 tr, tf Maximum Clock Rise and Fall Time V CC = 5V 15 µs VCC = 10V 5 C IN Input Capacitance Any Input (Note 3) 5 pF C PD Power Dissipation Capacitance (Note 4) 140 pF

5 www.fairchildsemi.com MM74C164 Logic Waveform AC Test Circuit Switching Time Waveforms CMOS to CMOS tr = tf = 20 ns TTL to CMOS

www.fairchildsemi.com 6 MM74C164 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A

7 www.fairchildsemi.com MM74C164 8-Bit Parallel-Out Serial Shift Register Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com