MK62486 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 12
Technical content
Figure 1. Pin Connection
Figure 2. Block Diagram SG S-THOMSON T-46-23-13
3 ENABLE 3 fa
have been employed for DQos to allow output cache burst write or read cycles. istered on the positive going edge of the clock (K).
52— D Ml 7929237 0038228 430 MESGTH MK62486 ASYNCHRONOUS TRUTH TABLE. BURST COUNT SEQUENCE 7-46-23-13 a 2. For a cache write cycle following a read operation, G must be S G S-THOMSON SYNCHRONOUS TRUTH TABLE [xe ee Te fn Tes | L L x x + | extemal Base Address | Read Cycle - Begin Burst Write Cycle - Extend ee Read Cycle - Extend Lee fe [|= | |e [enn naien [Segoe ee Write Cycle - Continue Lf fe [Le [| 1 [nmenmirnne [raters | Read Cycle - Continue Lf [ef Le [| 1 [pment Seatac | x x H L t Hold Current Burst Write Cycle - Suspend Address Burst Sequence Hold Current Burst Read Cycle - Suspend Lette deft | [icons [eos | Notes : 2. All inputs except G require set-up and hold times to the rising edge (low to high transition) of the external clock (K). 3. All read and write timings are referenced trom G or K. 4. Aread cycle is defined by W high or ADSP low for the required set-up and hold times. A write cycie is defined by W being asserted low for the set-up and hold times. 5. Gis.a don't care when W is registered low from the previous rising clock edge. 6. tip Selects must be true (S0 = high $7 = low) at gach tiga at fre clock while ADSP o¢ ADSC is asserted for the device to remain enabled; Chip Selects are registered whenever or Is asserted low at the rising edge of the clock. Ky S&S:THOMSON ane 747
MK62486_ Soe ) mm 7929237 0038229 377 MMSGTH - ABSOLUTE MAXIMUM RATINGS S G S-THOMSON J-46-23-13 [me Po Yeie Tome | Votage on any Pin Relative to Ground [er Jomo Notes : 1 is ses ang os uncon pate ote vet eat ot ry hr anions tos oes ean Ye operation BESET SORA ag ges Sea tS Sas es oe oa 2. Ouputcuent bale masinn rng specie fr oe ouput a tie, tt excaed a can of second RECOMMENDED DC OPERATING CONDITIONS (0 °C < Tas 470°C) se a Pow [ews ee a DC ELECTRICAL CHARACTERISTICS (0 °C < Tas 470°C; Voc = SV + 5%) ‘Average AC Power Supply Current (G = SO = Vii, ST = mA ‘Vq). All inputs = Vi. = OV and Vin 2 3V |_tsor [cmos stancey Curent so<o2y, 812 Vvec-oa) | | a0 | ma [6 | |__| taourLeakage Curent (Ary input) P= [+ [| «|? | [_to | ovtout Leakage Curent | tT tT mm fe [Vor [Ouputtosictvorageon-—4oma | 2 | fv Tt | 42 1 By Ses-THomsow 748
- Output butters are deselected. 8. For proper operation the RES input should be tied to ground.
- lec: measured as average AC current, with outputs open,
- Allother inputs at Vu. or Vin, f= 0, Voc max.
Figure 3. Equivalent Output Load Circuits
57 Scs:THomson sie
MK62486_ Se SaE ) «MM 7929237 0038231 T2S MBSGTH READ/WRITE CYCLE TIMING - AC OPERATING CONDITIONS AND CHARACTERISTICS (0°C Tas 70°C; Voc = SV + 5%) S G S-THOMSON T-46-23-13 a [er [oan TT Tm || [a fomamnrewe test] || [eo [eentonrwewon fe Te T= | [er [ommtatenmeme Te ff ef |e | [we [owornwomamee te | Pe | f= [| [ex [maemo fe] |e | [=| | Sg [we [omanwonne Te | Lf |e | a Tim [wemssewmme fe TT [|e | a a [iw [wmneonone t= | Te | [fe | [oom [amanowasawtme te | te | [= [a | [om [owenaoenenere fest ts] |= |= | [wm [owomanensnwme te | t= | [=e | [em [Amero te | PP | | | [see [roowomeneores te | | = fe [to [wroeroonme fe | fe | [= [| [in [amnowerowim ot | dt @ | | [a A [wen [owoaremeere fet fel [=|] Notes : 3. snes atecooemea ie requiring that all inputs must meet the specified set-up and hold times with stable logic levels for all rising 62 &. SGS-THOMSON > TT. 994.8 $$ AS 750
dent of W and ADSC) is performed at the new __ flexibility for incoming signals. Figure 4. General 128K Byte Cache Block Diagram SG S-THOMSON
1486 ADV iI
Figure 5. Non-Burst Read/Write 2-2 Cycles S G6 S-THOMSON T-46-23-13
Figure 6. Burst Read Cycle J-46-23-13
Figure 7. Burst Write Cycle S G S-THOMSON T-46-23-13
7 DATA A aN
Figure 8. Combined Burst Read/Write Cycle S 6 S-THOMSON T-46-23-13
MK62486__coe ) mm 7929237 0038237 443 MSGTH - -13 SG S- q-46-23-1 ORDERING INFORMATION & S-THOMSON Example: MK62486 Q 39 Q PLOC44 19 19ns at 4OMHz 24 24ns at 33MHz For a list of available options of Package and Speed refer to the Selector Guide in this Data Book or the current Memory Shortform that will be periodically up-dated. For further information on any aspect of this device, please contact our Sales Office nearest to you. 1212 1 756