MK50396

MK50397 MICREL | Alldatasheet

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Technical content

“<a “a a es MIC50395/50396/50397 - =. | Six Decade Counter / Display Decoder er fee yy fF | Not Recommended for New Designs SS General Description Features The MIC50395 is an ion-implanted, P-channel MOS six- + Single power supply decade synchronous up/down-counter/display driver with + Schmitt-Trigger on the count-input compare-register and storage-latches. The counter as well + Drivescommonanode orcathode displays (CA with buffer) as the register can be loaded digit-by-digit with BCD data. + Six decades of synchronous up/down counting The counter has an asynchronous-clear function. + Look-ahead carry or borrow , _.* Loadable counter Scanning is controlled by the scan oscillator input which is. | gadable compare-register with comparator output self-oscillating or can be driven by an external signal. The, Multiplexed BCD and seven-segment outputs six-decade register is constantly compared to the state of. Internal scan oscillator the six-decade counter and when both the register and the. Direct LED segment drive counter have the same content, an EQUAL signal is gener- , Interfaces directly with CMOS logic ated. The contents of the counter can be transferred into the. | gaging zero blanking 6-digit latch which is then multiplexed from MSD toLSD in , MIC50396 programmed to count time: segment decoder incorporates a leading-zero blanking , MIC50397 programmed to count time: circuit which can be disabled by an external signal. This — 59 hrs. 59 min. 99/100 min . device is intended to interface directly with the standard . : . CMOS logic families. : :

9 Ordering Information

The MIC50396 and MIC50397 operate identically to the MIC50395 except that two digits in each were reprogrammed PartNumber | Temp. Range to provide divide by six circuitry instead of divide by ten. The MIC50395CN 0°C to 70°C 40-pin Plastic DIP MIC50396 is well suited for industrial timer applications while © ae the MIC50397 is best suited for stop watch or real time MIC50396CN 0°C to 70°C 40-pin Plastic DIP computer clock applications. micso397cN | oCto 70°C | 40-pin Plastic DIP Pin Connection Vss e [40] UP/DOWN set [2] [ss] ZERO i BI ba] CARRY a [4] COUNT INHIBIT » [5] [36] COUNT scovents ° 2 ps} Ra d 34] Rp REGISTER BCD e [a] 3] Ro IN ‘BI MiCSO395CN b2] Ro Segment Identification

9 MIC50397CN LOAD COUNTER

A [30] LOAD REGISTER a so «8 bs] 05 mso ‘| |e our ¢ fa] bs] 05 g o [4] l27] D4 bier e c STORE [26] D3 STROBES Cp 25] D2 d Beco Cp [ral 23] EQUAL Ca Yop CLEAR [eo] SCAN 8-4 August 1998

MIC50395/50396/50397 Micrel Operations: following a negative transition of Load Counter or Load Register. Six Decade Counter, Latch g The carry output goes high with the leading edge of the The six decade counter is synchronously incremented or count input at the count of 000000 when counting up or at decremented on the positive edge of the count input signal. _999999* when counting down and goes low with the negative A Schmitt trigger on this input provides hysteresis for protec- going edge of the same count input. tion against both a noisy environment and double triggering ; due to a slow rising edge at the count input. A count frequency of 1 MHz can be achieved if the equal output, zero output and carry output are not used. These The count inhibit can be changed in coincidence with outputs do not respond at this frequency due to their output the positive transition of the count input; the count input is delay illustrated on the timing diagram. inhibited when the count inhibit is high. Six Decade Compare Register The counter will increment when up/down input is high (V..) . . and will decrement when up/down input is low. The up/down __ The register is loaded identically to the load counter paragraph input can be changed 0.75 us prior to the positive transition described previously. The register may be loaded of the count input. independently of the counter, however, the clear input will ; ; not remove the register contents. Contents of the register The clear input is asynchronous and will reset alldecades to are not displayed by the BCD or seven segment outputs. zero when brought high but does not affect the six digit latch or the scan counter. BCD Seven Segment Outputs As long as store input is low, data is continuously transferred | BCD or seven segment outputs are available. Digit strobes from the counter to the display. Data in the counter will be are decoded internally by a divide by six Johnson counter. latched and displayed when store input is high. Store canbe This counter scans from MSD to LSD. By bringing the SET changed in coincidence with the positive transition of the input low, this counter will be forced to the MSD decade count input. count. During this time the segment outputs are blanked to The counter is loaded digit by digit corresponding to the digit Protect against display burn out, strobe outputs. BCD thumb wheel switches with four diodes BCD outputs are valid for MSD when SET is low. Applying per decade connected between the digit strobe outputs and Vg, to SET allows normal scan to resume. Digit 6 output is the BCD inputs is one method to supply BCD data for active (V.,.) until the next scan clock pulse brings up digit 5 loading the counter decades. output. The load counter pulse must be at V,, 2 us prior to the The segment outputs and digit strobes are blanked during positive transition of the digit strobe of the digit to be loaded. _ the interdigit blanking time. Leading zero blanking affects The load counter pulse may be removed after the positive only the segment outputs. This option is disabled by bringing transition of the digit strobe since the chip internally latches _ the LZB input high. Typically the interdigit blanking time is 5 this signal. The BCD data to be loaded must be valid through _—_to 25 js when using the internal scan oscillator. the negative transition of the digit strobe. BCD output data changes at the beginning of the interdigit | Inputs, Outputs blanking time. Therefore the BCD output data is valid when the positive transition of a digit output occurs. The seven segment outputs are open drain capable of sourcing 10mA average current per segment over one digit +Scan Oscillator cycle. Segments are on when at Vc. The Carry, Equal, the iic50395 has an internal scan oscillator. The frequency 7210. rd ana cuit strobe outputs are a pul ana of the scan oscillator is determined by an external capacitor and SCAN inputs are high impedance CMOS compatible between V., or V., and scan input. The wave form present . on the scan oscillator input is triangular in the self oscillate Three basic outputs originate from the counter: zero output, mode. equal output, and carry output. Each output goes high onthe jy, external oscillator may also be used to drive the scan are Wes), going edge of the count input under the input. In either case, external capacitors of 150pF each will ollowing conditions: be required from V... to Counter BCD inputs and register Zero output goes high for one count period when alldecades BCD inputs. This will allow asynchronous loading of the contain zero. During a load counter operation the zero BCD inputs. Output is inhibited. In the internal drive mode the interdigit blanking time will be Equal output goes high for one count period when the con- _ the sum of the negative dwell period of the external oscillator tents of the counter and compare register are equal. The and the normal self oscillate blanking time. (5-»25 us). Dis- equal output is inhibited by a load counter or load register Play brightness can be controlled by the duty cycle of the operation, which lasts until the next interdigit blanking period external scan oscillator. *Carry occurs at 99:59:59 for the 50396 and 59:59:99 for the 50397 August 1998 8-5

MIC50395/50396/50397 Micrel If external capacitors on the BCD inputs are undesirable, it [cw dT Min ST x will be necessary to synchronize the negative going edge of the load register and/or load counter command to coincide 820 pF 1.4 kHz 4.8 kHz with the positive going edge of the scan input signal. Also Typically, the scan oscillator will oscillate at the following |_120 PF 7.0 kHz 20 kHz frequencies with these nominal capacitor values from V.. to scan input. Functional Diagram LED Dis — —, —, Itt! ous4son a Lf aes STORE © 5— scan coi E ‘COMPARATOR 8-6 August 1998

MIC50395/50396/50397 Micrel Absolute Maximum Ratings Voltage on Any Terminal Relative to V.. +0.3V to -20V Operating Temperature Range (Ambient) —_0°C to +70°C. Storage Temperature Range (Ambient) -40°C to +100°C Maximum Operating Conditions By Break Down Voltage (Segment only @ 10 pA) Vgg — 26 Vv

Electrical Characteristics

(Vop = OV, Veg = +10.0V to +15.0, 0°C < T, < 70°C) Static Operating Conditions Symbot_ [Parameter | Min | Max | Units | Notes lon Output Current “1” Digit strobes 3.0 mA 6 Segment outputs 10.0 mA 7 Note 1: With 150 pF capacitor to V¢< from counter BCD and register BCD inputs. Note 2: |, with inputs and outputs open at 0°C. 33 mA at 25°C and 28 mA at 70°C. This does not include segment current. Total power per segment must be limited not to exceed power dissipation of package. (8,, = 100°C/Watt) Note 3: All outputs loaded. Note 4: MIN V,, from R, R, R, R, C, C, C, C, inputs is V, — 2.5 V. Those inputs have internal pulldown resistors to V,,.. Note 5: This applied to the push pull CMOS compatible outputs. Does not include digit strobes or segment outputs. Note 7: For Voy; = Veg ~ 3.0 Volts. Average value over one digit cycle. August 1998 8-7

MIC50395/50396/50397 Micrel Timing 1 2 3 4 5 6 7 8 9 10 W COUNT —_I+ tups 1 |+ tups UP/DOWN 1 tos > [fe tcis COUNT INHIBIT ++ tss STORE i+ teow = #41 tspw CLEAR Feel tos COUNT ton —> top ZERO CARRY tea tEH > EQUAL SCAN ae ee ee [™ / 8b ST LOAD COUNTER Sa. t»-§ —— LOAD REGISTER Loading Counter, Register (1 Digit) otis LOAD COUNTER, - OR REGISTER 5 ie tov PP) tg 2.01s min NOTE: REF. TO POSITIVE led SRA 4208 min BCD DATA INPUT, _ _ TT a | TRANSITION OF DIGIT OUTPUT DIGIT OUTPUT 6 toy 2.0 us min NOTE: REF. TO NEGATIVE —— EDGE OF DIGIT OUTPUT DIGIT OUTPUT 5 ETC a | LL, COUNT INPUT, CARRY }+——+| ia EQUAL, ZERO OUTPUT see INHIBITED DURING THIS. i ~ee eee TIME COUNT INPUT _--, toa I LI ton ZERO OUTPUT 1 toa NOTE: + ito The inhibit function of the zero or equal outputs CARRY OUTPUT 4 does not end when the Load Counter input goes to a0" unless that transition occurs during interdigit ---4 tea ot ei ten blanking period at least 2.0 us prior to a positive EQUAL OUTPUT : transition of a digit output. This same timing restriction holds for Equal and Load Register 8-8 August 1998

MIC50395/50396/50397 Micrel Dynamic Operating Conditions Note 8: Measured at 50% duty cycle. Note 9: If carry, equal, or zero outputs are used, the count frequency will be limited by their respective output times. Note 10: The count pulse width must be greater than the carry access time when using the carry output. Note 11: The positive edge of the count input is the t = 0 reference. Note 12: Measured from negative edge of count input. August 1998 8-9

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40-Pin Plastic DIP (N) Note: Pin 1 is denoted by one or more ofthe following: a notch, a printed triangle, or a mold mark 11-8 M@ £048819 0001944 617 EEE EE EE EEE