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Doc No. TD4-EA-01805 Revision. 1 Publication date: 2012-10-19 MIP2F20MTSCF 種別／Type シリコン ＭＯＳ形集積回路／Silicon MOSFET type Integrated Circuit 用途／Application スイッチング電源制御用／For Swi tching Power Supply Control 構造／Structure ＣＭＯＳ形／CMOS type 等価回路／Equivalent Circuit 添付図／See Figure．6 外形／Out Line Ｄ Ｉ Ｐ 7 － Ａ 1 － Ｂ ﾏ ｰ ｸ 記号／ﾏｰｷﾝｸﾞ／Marking ＭＩＰ２Ｆ２ Ａ．絶対最大定格／ABSOLUTE MAXIMUM RATINGS （Ｔａ＝２５℃±３℃） NO. 項目／Item 記号／ 定格／Ratings 単位／ 備考／Note Symbol Unit ド レ イ ン 電 圧 ※ １ ：
1 DRAIN Voltage ＶＤ －０．３ ～ ７００ Ｖ 下記パルス幅以内での
ＶＣＣ電圧 保証とする
2 VCC Voltage ＶＣＣ －０．３ ～ ４５ Ｖ (It is guaranteed within
ＶＤＤ電圧 the pulse as below.)
3 VDD Voltage ＶＤＤ －０．３ ～ ８ Ｖ
フィードバック電圧
4 FEEDBACK Voltage ＶＦＢ －０．３ ～ ８ Ｖ オン時ブランキング幅
フィードバック電流 ＋過電流保護遅れ時間
5 FEEDBACK Current ＩＦＢ ５００ ｕＡ Leading Edge Blanking
ＣＬ端子電圧 Pulse + Current Limit
6 CL Voltage ＶＣＬ －０．３ ～ ８ Ｖ Delay
ＣＬ端子電流 ton(BLK)＋td(OCL)
7 CL Current ＩＣＬ １５０ ｕＡ
出力ピーク電流
8 Output Peak Current ＩＤP ６５０（※１） ｍＡ
チャネル部温度
9 Channel Temperature Ｔｃｈ １５０ ℃
保存温度
10 Storage Temperature Ｔｓｔｇ －５５ ～ ＋１５０ ℃
Ｂ．電気的特性／ELECTRICAL CHARACTERISTICS 測定条件／Measure condition (TC=25℃±2℃) No. 項目／Item 記号／ 測定条件／Measure Condition Typ. Limit Unit Symbol （測定図-1 参照／See Figure 1） Min Max 【コントロール機能／CONTROL FUNCTIONS】 1 出力周波数 fosc VCC=15 V, VD=5 V, IFB=20 uA, ICL=50 uA 100 90 110 kHz Output Frequency fosc（L） VCC=15 V, VD=5 V, IFB:OPEN, ICL<ICL1 12 9 15 kHz 最大デューティサイクル 2 M a x i m u m D u t y C y c l e M A X D C VCC=15 V, VD=5 V, IFB=20 uA, ICL=50 uA 47.5 45 50 % ＶＤＤ基準電圧 3 V D D V o l t a g e V D D VCC=15 V, VD=5 V, IFB=20 uA, ICL=50 uA 5.9 5.4 6.4 Ｖ ＶＤＤ停止電圧 4 U V L o c k o u t T h r e s h o l d V o l t a g e V U V VD=5 V, IFB=20 uA, ICL=50 uA 5.1 4.6 5.6 Ｖ
Doc No. TD4-EA-01805 Revision. 1 Publication date: 2012-10-19 MIP2F20MTSCF No. 項目／Item 記号／ 測定条件／Measure Condition Typ. Limit Unit Symbol （測定図-1 参照／See Figure 1） Min Max 【コントロール機能／CONTROL FUNCTIONS】 ＶＣＣ起動電圧 5 V C C S t a r t V o l t a g e V C C ( O N )VD=5 V, IFB=20 uA, ICL=50 uA 7.5 6.5 8.5 V ＶＣＣ充電停止電圧 6 V C C C h a r g e S t o p T h r e s h o l d V o l t a g e V C C 1 VD=40 V, FB:OPEN, CL:OPEN 12 11 13 V フィードバック電流 O N → O F F
7 F e e d b a c k T h r e s h o l d C u r r e n t I F B １ VCC=15 V, VD=5 V, ICL=50 uA 45 25 65 uA
フィードバック電流ヒステリシス
8 F e e d b a c k H y s t e r e s i s C u r r e n t I F B H Y S VCC=15 V, VD=5 V, ICL=50 uA 2 uA
重負荷時ＦＢ端子電流 I C C 0 → I C C
9 FB Pin Current at Heavy Load IFB0 VCC=15 V, VD=5 V, ICL=50 uA 11 7 15 uA
ＦＢ端子電圧 10 FB Pin Voltage VFB VCC=15 V, VD=5 V, IFB=20 uA, ICL=50 uA 1.0 0.7 1.3 V 回路消費電流 11 Supply Current ICC VCC=15 V, VD=5 V, IFB=20 uA, ICL=50 uA 0.35 0.25 0.45 mA 軽負荷時回路消費電流 VCC=15 V, VD=5 V 12 Supply Current at Light Load ICC(OFF) IFB=IFB1+5 uA, ICL=50 uA 0.25 0.18 0.32 mA 重負荷時回路消費電流 13 Supply Current at Heavy Load ICC0 VCC=15 V, VD=5 V, IFB=OPEN, ICL=50 uA 0.54 0.4 0.68 mA ＶＤＤ充電電流 Ich1 VDD=0 V, VD=40 V, FB:OPEN, CL:OPEN 3 1 4.6 mA 14 VDD Charging Current Ich2 VDD=4 V, VD=40 V, FB:OPEN, CL:OPEN 1.0 0.3 1.7 mA ＣＬ端子電圧 15 CL Pin Voltage VCL VCC=15 V, VD=5 V, FB:OPEN, ICL=15 uA 2.3 2.0 2.6 Ｖ fosc 低下時ＣＬ端子電流 f o s c → f o s c （ L ） ※ F i g u r e 3
16 Dropped fosc CL Pin Current ICL1 VCC=15 V, VD=5 V, FB:OPEN 11 8 14 uA
fosc 低下時ＣＬ端子電流ヒステリシス ※ F i g u r e 3 17 CL Pin Hysteresis Current ICLHYS VCC=15 V, VD=5 V, FB:OPEN 1.0 uA 【保護機能／CIRCUIT PROTECTIONS：*は設計保証項目/Design Guarantee Item】 過電流保護検出 ※Figure 2/Figure 4 18 Self Protection Current Limit ILIMIT VCC=15 V, FB:OPEN, ICL=50 uA,DUTY=30％ 0.35 0.315 0.385 Ａ ILIMIT 補正係数 ※Figure 2/Figure 4
19 ILIMIT modified coefficient R_slope VCC=15 V, FB:OPEN, ICL=50 uA 28 mA/us
最小ＩＬＩＭＩＴ Ton=3 usec
20 Minimum ILIMIT ILIMITmin VCC=15 V, FB:OPEN, ICL=0 uA 55 20 100 mA
- 軽負荷時ドレイン電流 Ton=3 usec
21 Drain Current at Light Load ID(OFF) VCC=15 V, IFB=IFB1+IFBHYS, ICL=50 uA 90 30 150 mA
- オン時ブランキング幅
22 Leading Edge Blanking Delay ton(BLK) VCC=15 V, FB:OPEN, ICL=50 uA 240 170 310 Ns
- 過電流保護遅れ時間
23 Current Limit Delay td(OCL) 150 100 200 Ns
過電圧保護検出
24 Over Voltage Protection VCC(OV) VDD=5 V, FB:OPEN, ICL=50 uA 24 21 27 Ｖ
- 過熱保護温度
25 Thermal Shutdown Temperature TOTP 140 130 150 ℃
Doc No. TD4-EA-01805 Revision. 1 Publication date: 2012-10-19 MIP2F20MTSCF No. 項目／Item 記号／ 測定条件／Measure Condition Typ. Limit Unit Symbol （測定図-1 参照／See Figure 1） Min Max 【出力／OUTPUT】 ラッチリセット電圧 26 Power-up Reset Threshold Voltage VDDreset 2.6 1.8 3.5 Ｖ オ ン 抵 抗
27 ON-State Resistance RDS(ON) ID=50 mA 20 27 Ω
オフ時ドレイン端子リーク電流
28 OFF-State Current IDSS VCC=27 V, VD=650 V, FB:OPEN, CL:OPEN 10 20 uA
ドレイン耐圧
29 Breakdown Voltage VDSS VCC=27 V, ID=100 uA, FB:OPEN, CL:OPEN 700 Ｖ
立ち上がり時間 ※ F i g u r e 5
30 Rise Time tr VCC=15 V, VD=5 V, FB:OPEN, ICL=50 uA 100 Ns
立ち下がり時間 ※ F i g u r e 5
31 Fall Time tf VCC=15 V, VD=5 V, FB:OPEN, ICL=50 uA 50 Ns
【電源電圧／SUPPLY】 最小ドレイン電圧
32 Drain Supply Voltage VD(MIN) VCC：OPEN, FB:OPEN, CL:OPEN 50 Ｖ
【Ｆｉｇ．１：測定回路図／Measure Circuit】 S D VCC CL VDD FBS 0.1uF 0.1uF 56k 22kS D VCC CL VDD FBS S D VCC CL VDD FBS 0.1uF 0.1uF 56k 22k 270 uH
Doc No. TD4-EA-01805 Revision. 1 Publication date: 2012-10-19 MIP2F20MTSCF 【Ｆｉｇ．２：ＩＬＩＭＩＴ ｖｓ． ＩＣＬ Typical Characteristic】 【 Ｆ ｉ ｇ ． ３ ： ｆ ｏ ｓ ｃ ｖ ｓ ． Ｉ Ｃ Ｌ T y p i c a l C h a r a c t e r i s t i c 】 【Ｆｉｇ．４： ILIMIT Measurement】 R _ s l o p e ; { ( I L I M I T a t D u t y = 3 0 % ) – (ILIMIT at Duty=10%)} / {(Ton at Duty=30%) – (Ton at Duty=10%)} ＩD ｔ ILIMIT ILIMIT vs. ICL 100 200 300 400 01 0 2 0 3 0 4 0 ICL[uA] ILIMIT[mA] fosc vs. ICL 100 120 01 0 2 0 3 0 4 0 ICL[uA] fosc[kHz]
Doc No. TD4-EA-01805 Revision. 1 Publication date: 2012-10-19 MIP2F20MTSCF 90% 10% ｔｆ ｔｒ VD 90% 10% ｔｆ ｔｒ VD 【Ｆｉｇ．５ ： tr、tf Measurement】 【Ｆｉｇ．６： Block Diagram】 SOURCE DRAINVCC R SQ Q Bla nki ng pulse gen erat ion circuit in on-state Gate driver Res tart trigger Light load detection For intermittent Oscillation control Drain current for detection power MOSFET Oscillator ＩＬＩＭＩＴ variable circuit（15～100%） VDD FB VDD UV 5.7V regulator 5.9V 5.1V 27% 22% CL MAXDC CLOCK 12kHz VCL_OUT clamp circuit （ILIMIT setting） VCL ICL_LOW IN Overheat protection VCC OVP VCC UV 24V 7.5V Constant current resource 6.6V VDD clamp circuit R SQ Q IL IMIT compensation SOURCE DRAINVCC R SQ QR SQ Q Bla nki ng pulse gen erat ion circuit in on-state Gate driver Res tart trigger Light load detection For intermittent Oscillation control Drain current for detection power MOSFET Oscillator ＩＬＩＭＩＴ variable circuit（15～100%） VDD FB VDD UV 5.7V regulator 5.9V 5.1V 27% 22% CL MAXDC CLOCK 12kHz VCL_OUT clamp circuit （ILIMIT setting） VCL ICL_LOW IN Overheat protection VCC OVP VCC UV 24V 7.5V Constant current resource 6.6V VDD clamp circuit R SQ QR SQ Q IL IMIT compensation
Doc No. TD4-EA-01805 Revision. 1 Publication date: 2012-10-19 MIP2F20MTSCF 【使用上の注意１／Precautions for Use 1】 VDD 端子－ＧＮＤ間には、０．１ｕＦのセラミックコンデンサを使用してください。 Connect a 0.1uF ceramic capacitor between VDD pin and GND. 【使用上の注意２／Precautions for Use ２】 以下のような条件では破損し、場合によっては破裂、発煙の可能性があります。以下の使用は避けてください。 T h e I P D h a s r isks for break-down or burst or giving off smoke in following conditions. Avoid the following use. （1） DRAIN 端子と VDD 端子を逆にして、電源基板へ挿入する。 Reverse the DRAIN pin and VDD pin connection to the power supply board. （2） DRAIN 端子と VDD 端子をショートする。 DRAIN pin short to VDD pin. （3） ＤＲＩＮ端子と FB 端子をショートする。 DRAIN pin short to FB pin. （4） ＤＲＩＮ端子とＣＬ端子をショートする。 DRAIN pin short to ＣＬ pin. （5） ＤＲＩＮ端子と VCC 端子をショートする。 DRAIN pin short to VCC pin. （6） VCC 端子と VDD 端子をショートする。 VCC pin short to VDD pin. （7） VCC 端子と CL 端子をショートする。 VCC pin short to CL pin. （8） VCC 端子と FB 端子をショートする。 VCC pin short to FB pin.
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