MID1W0505A MPS | Alldatasheet

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Technical content

1W, 1.5kVDC/3kVDC, Semi-Regulated Isolated DC/DC Converter MID1W0505A Rev. 1.1 MonolithicPower.com 1 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

DESCRIPTION

The MID1W0505A is a semi-regulated, isolated DC/DC converter that can support 4.5V to 5.5V input voltage (V IN) applications across a -40°C to +125°C operating temperature range . It has excellent load regulation, line regulation , and supports up to 1W of output power (POUT). The device integrates a power MOSFET, transformer, and feedback (FB) circuit all in one chip. The MID1W0505A is a small solution that provides high reliability compared to traditional isolated power modules. Full protection f eatures include short -circuit protection (SCP), over -current protection (OCP), and OTP protection. The MID1W0505A requires a minimal number of readily available, stand ard external components. It is available in a low-profile, wide body SOICW-16 package.

FEATURES

  • 4.5V to 5.5V Operating Input Voltage (VIN) Range
  • 1.5KVDC or 3kVDC Isolation Voltage
  • Up to 1W Output Power (POUT)
  • Max 54% Efficiency at Full Loads
  • 0.4% Load Regulation
  • 1.5% Line Regulation
  • Excellent Transient Performance
  • Continuous Short-Circuit Protection (SCP) with Hiccup Mode
  • Over-Temperature Protection (OTP)
  • Meets CISPR32 Class B Emissions
  • UL1577 Certified
  • CB Certified per IEC62368-1 3rd Edition
  • -40°C to +125°C Operating Temperature Range
  • Available in an SOICW-16 Package

APPLICATIONS

  • Industrial Automation Systems
  • Isolated Bias Power for Digital Isolators
  • Isolated Bias Power for RS-485, RS-422, and CAN Interfaces
  • Isolated Sensor Power Supplies
  • Telecom and Network Devices (e.g. 5G RRUs, Industrial CPE, and Network Gateways) All MPS parts are lea d-free, halogen -free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are trademarks of Monolithic Power Systems, Inc. or its subsidiaries. TYPICAL APPLICATION VIN VOUT CIN 10μF VIN COUT 10μF VOUT GND1 GND2 4.5V to 5.V 5V GND1 GND2 MID1W0505A -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0 50 100 150 200 LOAD REGULATION (%) LOAD CURRENT (mA) Load Regulation VIN = VOUT = 5V

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 2 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

ORDERING INFORMATION

Part Number Isolation Voltage Package Top Marking MSL Rating MID1W0505AGY-2S* 1.5kVDC SOICW-16 See Below 3 MID1W0505AGY-3S** 3kVDC * For Tape & Reel, add suffix -Z (e.g. MID1W0505AGY-2S-Z). ** For Tape & Reel, add suffix -Z (e.g. MID1W0505AGY-3S-Z). TOP MARKING (MID1W0505AGY-2S) MPS: MPS prefix YY: Year code WW: Week code 1W0505A2: First eight digits of the part number LLLLLLLLL: Lot number TOP MARKING (MID1W0505AGY-3S) MPS: MPS prefix YY: Year code WW: Week code 1W0505A3: First eight digits of the part number LLLLLLLLL: Lot number PACKAGE REFERENCE TOP VIEW PGND1 PGND1 VOUT PGND2 5 12 TM VIN VIN SGND1 SGND1 SGND1 SGND1 SGND2 PGND2 VOUT SGND2 SGND2 SOICW-16

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 3 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1, 2 PGND1 Power ground side 1. Connect the PGND1 pin using large copper traces and multiple vias to improve thermal performance. 3, 4 VIN Power input pin. Connect the VIN pin to a 4.5V to 5.5V power supply. Connect a 10μF capacitor and a 0.1μF capa citor between the VIN and PGND 1 pins to stabilize the IC. 5, 6, 7, 8 SGND1 Signal ground side 1 . Connect the SGND1 and PGND1 pins using large copper traces to improve thermal performance. 9, 11, 12 SGND2 Signal ground side 2. Connect the SGND2 and PGND2 pins using a thin trace. Do not connect SGND2 using large copper traces, as this can increase EMI. 10 TM Test mode pin. Factory use only. Float this pin in applications. 13, 14 VOUT Power output pin. It is recommended to connect a 10 μF capacitor and a 0.1μF capacitor between VOUT and PGND2 to decrease the output voltage ( VOUT) ripple and noise. 15, 16 PGND2 Side 2 power ground pin. Do not connect PGND2 using large copper areas, as this can increase EMI. ABSOLUTE MAXIMUM RATINGS (1) Continuous power dissipation (TA = 25°C) (2) (4) ESD Ratings Recommended Operating Conditions (3) Operating junction temp (TJ) .... -40°C to +125°C Thermal Resistance θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the j unction-to- ambient thermal resistance θ JA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambie nt temperature is calculated by P D (MAX) = (T J (MAX) - TA) / θ JA. Exceeding the maximum allowable power dissipation can produce an excessive die temperature, which may cause the converter to go into thermal shutdown. Internal thermal shutdown circuitry pro tects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on EV 1W0505A-Y-00A (51mmx51mm), 1oz, 2- layer PCB. 5) The value of θJA given in this table is only valid for comparison with other packages and cannot be used for design purposes. These values were calculated in accordance with JESD51 -7, and simulated on a specified JEDEC board. They do not represent the performance obtained in an actual application.

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 4 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

ELECTRICAL CHARACTERISTICS

VIN = VOUT = 5V, TJ = -40°C to +125°C (6), typical values are tested at TJ = 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Under-voltage lockout (UVLO) rising threshold VUVLO_RISING Rising 2.4 2.61 2.8 V UVLO hysteresis VUVLO_HYS 190 mV Input current IIN Load = 0A 7 mA Load = 0.2A 370 mA Output voltage (VOUT) accuracy VOUT_ACC VIN = 4.5V to 5.5V, load = 0A, TJ = 25°C 4.925 5 5.075 V VIN = 4.5V to 5.5V, load = 0A, TJ = -40°C to +125°C 4.9 5 5.1 V Load Regulation Load = 0A to 0.2A 0.4 2.5 % Line Regulation Load = 0.2A, VIN = 4.75V to 5.25V 1.5 % Load = 0.2A, VIN = 4.5V to 5.5V 3 % Efficiency Load = 0.2A 54 % Ripple Load = 0A to 0.2A, TA = 25°C 50 100 mV Capacitive Load With 40Ω resistance load 330 μF Isolation voltage (MID1W0505AGY-2S) VISO_2S VTEST = VISO for 60s (qualification), VTEST = 1.2 x VISO for 1s (100% production) 1.5 kVDC Isolation voltage (MID1W0505AGY-3S) VISO_3S VTEST = VISO for 60s (qualification), VTEST = 1.2 x VISO for 1s (100% production) 3 kVDC Thermal shutdown (7) TSD 160 °C Thermal shutdown hysteresis (7) TSD_HYS 20 °C PACKAGE PARAMETERS Parameter Symbol Condition Min Typ Max Units Minimum external air gap (clearance) LIO1 8 mm Minimum external tracking (creepage) LIO2 8 mm Input to output capacitance (7) CI-O Measure as a 2 -terminal device, pin 1 to pin 8 are shorted together, pin 9 to pin 16 are shorted together, fSW = 1MHz 7 pF Input to output resistance (7) RI-O Measure as a 2 -terminal device, pin 1 to pin 8 are shorted together, pin 9 to pin 16 are shorted together, VTEST = 500VDC 50 GΩ Notes: 6) Guaranteed by over-temperature correlation. Not tested in production. 7) Guaranteed by sample characterization. Not tested in production.

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 5 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL CHARACTERISTICS VIN = 5V, VOUT = 5V, CIN = COUT = 10μF, TA = 25°C, unless otherwise noted. 0 50 100 150 200 EFFICIENCY (%) LOAD CURRENT (mA) Efficiency vs. Load Current VIN = VOUT = 5V -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0 50 100 150 200 LOAD REGULATION (%) LOAD CURRENT (mA) Load Regulation VIN = VOUT = 5V LINE REGULATION (%) INPUT VOLTAGE (V) Line Regulation IOUT = 0.2A 85 C 100 150 200 250 -50 -25 0 25 50 75 100 125 LOAD CURRENT (mA) TEMPERATURE ( C) Load Current vs. Temperature -1.5 -0.5 0.5 1.5 -50 -25 0 25 50 75 100 125 OUTPUT VOLTAGE ACCURACY (%) TEMPERATURE ( C) Output Voltage Accuracy vs. Temperature IOUT = 0A Radiated Emission 30MHz to 1GHz, CISPR32 Class B (8) Note: 8) See Figure 2 on page 9 and Figure 3 on page 10 for details on the EMI circuit and PCB layout. 30M 50 60 80 100M 200 300 400 500 800 1G Level in dBuV/m Frequency in Hz CISPR32 CLASSB QP 3m

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 6 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS VIN = 5V, VOUT = 5V, CIN = COUT = 10μF, TA = 25°C, unless otherwise noted. VOUT Ripple IOUT = 0.2A Load Transient IOUT = 0A to 0.2A CH1: VOUT/AC CH2: VIN CH4: IOUT CH1: VOUT/AC CH4: IOUT Start-Up through VIN IOUT = 0.1A Shutdown through VIN IOUT = 0.1A CH1: VOUT CH2: VIN CH4: IOUT CH1: VOUT CH2: VIN CH4: IOUT SCP Entry SCP Recovery CH1: VOUT CH2: VIN CH4: IOUT CH1: VOUT CH2: VIN CH4: IOUT

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 7 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. FUNCTIONAL BLOCK DIAGRAM VIN SGND1 PGND2 VOUT VOUT 5 12 TM SGND2 VIN DC/AC AC/DC EncodeDecode FB PGND1 PGND1 SGND1 SGND1 SGND1 SGND2 SGND2 PGND2 Figure 1: Functional Block Diagram

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 8 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. OPERATION The MID1W0505A is a semi-regulated, isolated DC/DC converter that can support 4.5V to 5.5V input voltage (VIN) applications across a -40°C to +125°C operating temperature range. It has excellent load regulation, line regulation , and supports up to 1W of output power (POUT). Under-Voltage Lockout (UVLO) Protection The MID1W0505A has input under -voltage lockout (UVLO) protection to ensure reliable POUT. The MID1W0505A starts up once VIN exceeds the UVLO rising threshold. The device shuts down when VIN drops below the UVLO falling threshold. T his function prevents the device from operating at an insufficient voltage. UVLO is a non-latch protection. Isolation Power Conversion The MID1W0505A integrates a power MOSFET, transformer , and feedback (FB) circuit all in one chi p, ma king it a high - performance, small-sized solution. If VOUT is below the target voltage, the IC starts switching to deliver power from V IN to V OUT. If VOUT exceeds the target voltage, the device stops switching. Power Converter Soft Start (SS) and Short- Circuit Protection (SCP) To avoid overshoot and inrush current during start-up, the MID1W0505A has built -in internal soft start (SS) that gradually ramps up the output current (IOUT). The soft-start time (tSS) is internally set to about 15ms. If VOUT does not exceed 2.61V after tSS due to a short circuit or large capacitive load , the MID1W0505A enters hiccup mode. The hiccup off time (tOFF) is about 150ms . After the hiccup mode tOFF, the MID1W0505A initiates another SS. If the short circuit is removed, then the MID1W0505A resumes normal operation. Semi-Regulated Output Voltage Regulation The MID1W0505A is a 1W (5V/ 200mA), isolated converter with 0.4% VOUT regulation accuracy at typical input voltage s (e.g. 5V) across the full 0A to 200mA load range. Under corner cas e conditions, such as low input high temperature s (e.g. T A = 85°C ), VOUT regulation accuracy may drop to 10%. Therefore, VOUT is considered semi-regulated. Semi-regulated output accuracy is adequate for most applications. In applications with a smaller VOUT regulation requirement (<2%), it is recommended t o operate the device at input voltages above 4.75V. A semi-regulated device is more advantageous than an un regulated device . An unregulated device can cause damage to downstream devices, and may require an external dummy load. Thermal Protection The MID1W0505A monitors the IC temperature internally. If the die temperature exceeds 160°C, the driver outputs are d isabled. Once the junction temperature (T J) drops to 140 °C, the driver outputs are enabled again and the device resumes normal operation.

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 10 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. PCB Layout Guidelines Efficient PCB layout is critical for stable operation. For the best results, refer to Figure 3 and follow the guidelines below: 1. For safety, the primary side and secondary side should be physically separated. Ensure that the creepage/clearance meet s the standards for the specified application. 2. To reduce output noise, m inimize the loop area between VIN, the input capacitor, and PGND1, as well as VOUT, the output capacitor, and PGND2. 3. Place enough copper and via s around the IC’s primary pin out put to improve thermal performance. 4. Connect SGND1 and PGND1 using large copper traces and multiple vias to improve thermal dissipation. 5. Connect SGND2 and PGND2 using a thin trace (below the red trace in Figure 3 ) to reduce radiation. VOUT VOUT PGND2 SGND1 SGND1 SGND1 SGND1 VIN VIN PGND1 PGND1C1A B1A PGND1VINSGND1 Top layer Bottom layer Via C1B C2B GND2VOUTGND2 MID1W0505A C2A B1B SGND2 layer 2 layer 3 SGND2 TM SGND2 SGND2 PGND2 Top Layer and Bottom Layer SGND2 TM SGND2 SGND2 VOUT VOUT PGND2 PGND2 SGND1 SGND1 SGND1 SGND1 PGND1 VIN VIN PGND1C1A B1A PGND1 C1B C2B GND2 MID1W0505A C2A B1B Mid-Layer 1 SGND2 TM SGND2 SGND2 VOUT VOUT PGND2 PGND2 SGND1 SGND1 SGND1 VIN VIN PGND1 PGND1C1A B1A PGND1 C1B C2B GND2 MID1W0505A C2A B1B SGND1 Mid-Layer 2 Figure 3: Recommended PCB Layout

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 11 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUIT VIN VOUT 10μF VIN 10μF VOUT GND1 GND2 4.5V to 5.5V 5V 0.1μF 0.1μF GND1 GND2 C1A C1B C2B C2A MID1W0505A Figure 4: Application Circuit

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 12 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

PACKAGE INFORMATION

PACKAGE OUTLINE DRAWING FOR 16-SOICW-HV MF-PO-D-0480 revision0.0 TOP VIEW FRONT VIEW SIDE VIEW RECOMMENDED LAND PATTERN DETAIL "A" NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-013, VARIATION AA. 6) DRAWING IS NOT TO SCALE. PIN 1 ID SEE DETAIL "A"

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER MID1W0505A Rev. 1.1 MonolithicPower.com 13 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. CARRIER INFORMATION Pin1 ABCD ABCD ABCD ABCD1 1 1 1 Feed Direction Part Number Package 2S-Z SOICW-16 1000 44 N/A 13in 24mm 12mm MID1W0505AGY- 3S-Z

MID1W0505A – 1W, SEMI-REGULATED, ISOLATED CONVERTER Notice: The information in this document is subject to change without notice. Please contact MPS for curren t specifications. Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MID1W0505A Rev. 1.1 MonolithicPower.com 14 6/12/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

REVISION HISTORY

Revision # Revision Date Description Pages Updated 1.0 2/10/2023 Initial Release - 1.1 6/12/2023 Corrected typo in page 1 header 1 Updated descriptions for TM, VOUT, and PGND2 pins; minor formatting updates 3