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ADSP-BF506F EZ-KIT Lite® Evaluation System Manual Revision 1.0, December 2009 Part Number 82-000226-01 Analog Devices, Inc. One T echnology Way Norwood, Mass. 02062-9106 a

© 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This docu- ment may not be reproduced in an y form without prior , express written consent from Analog Devices, Inc. Printed in the USA. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no re sponsibility is assumed by Analog Devices for its use; nor for any infrin gement of patents or other rights of third parties which may result from its us e. No license is granted by impli- cation or otherwise under the pate nt rights of Analog Devices, Inc. Trademark and Service Mark Notice The Analog Devices logo, VisualDSP++, Blackfin, the Blackfin logo, EZ-KIT Lite, and EZ-Extender are r egistered tradem arks of Analog Devices, Inc. All other brand and product names ar e trademarks or service marks of their respective owners.

The ADSP-BF506F EZ-KIT Lite is designed to be used solely in a labora- tory environment. The board is not intended for use as a consumer end product or as a portion of a consume r end product. The board is an open system design which does not include a shielded enclosure and therefore may cause interference to other elect rical devices in close proximity. This board should not be used in or near any medical equipment or RF devices. The ADSP-BF506F EZ-KIT Lite is curren tly being processed for certifica- tion that it complies with the esse ntial requirements of the European EMC directive 89/336/EEC amended by 93/68/EEC and therefore carries the “CE” mark. The EZ-KIT Lite evaluation system co ntains ESD (electrostatic discharge) sensitive devices. Electr ostatic charges readily a ccumulate on the human body and equipment and can discha rge without detection. Permanent damage may occur on devices subjecte d to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ -KIT Lite boards in the protective shipping package.

ADSP-BF506F EZ-KIT Lite Evaluation System Manual ix PREFACE Thank you for purchasing the ADSP-BF506F EZ-KIT Lite ®, Analog Devices, Inc. evaluation system for the ADSP-BF504/BF506(F) Blackfin ® processors. Blackfin processors embody a new ty pe of embedded processor designed specifically to meet the computationa l demands and power constraints of today’s embedded audio, video, and communications applications. They deliver breakthrough signal-processin g performance and power efficiency within a reduced instruction set co mputing (RISC) programming model. Blackfin processors support a medi a instruction set computing (MISC) architecture. This architecture is th e natural merging of RISC, media functions, and digital signal processi ng (DSP) characteristics. Blackfin processors deliver signal-processing performance in a microprocessor-like environment. Based on the Micro Signal Architec ture (MSA), Blackfin processors com- bine a 32-bit RISC instruction set, dual 16-bit mult iply accumulate (MAC) DSP functionality, and eight -bit video processing performance that had previously been the exclusive domain of very-long instruction word (VLIW) media processors.

x ADSP-BF506F EZ-KIT Lite Evaluation System Manual The evaluation board is de signed to be used in co njunction with the Visu- alDSP++ ® development environment to test capabilities of the ADSP-BF504/BF506(F) Blackfin processors. The VisualDSP++ develop- ment environment aids advanced ap plication code development and debug, such as:  Create, compile, assemble, and link application programs written in C++, C, and ADSP-BF506F assembly  Load, run, step, halt, and set br eakpoints in application programs  Read and write data and program memory  Read and write core and peripheral registers  Plot memory Access to the processor from a personal computer (PC) is achieved through a USB port or an external JTAG emulator. The USB interface provides unrestricted access to th e ADSP-BF506F processor and evalua- tion board peripherals. Analog Devi ces JTAG emulators offer faster communication between the host PC and target hardware. Analog Devices carries a wide range of in-circuit emul ation products. To learn more about Analog Devices emulators and processor development tools, go to http://www.analog.com/dsp/tools/ . The ADSP-BF506F EZ-KIT Lite provid es example programs to demon- strate the evaluation board capabilities. LAn EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 day s. For details about evaluation license restrictions after the 90 days, refer to “Evaluation License Restrictions” on page 1-7 in this manual and the VisualDSP++ Installation Quick Reference Card .

ADSP-BF506F EZ-KIT Lite Evaluation System Manual xi Preface Product Overview The board features:  Analog Devices ADSP-BF50 6F Blackfin processor D Core performance up to 400 MHz D External bus performance up to 80 MHz D 120-pin LQFP package D 25 MHz crystal  Programmable VDDINT core power D Analog Devices AD5258 TWI digital potentiometer D Analog Devices ADP1715 low dropout linear regulator  Internal parallel flash memory D Numonyx M58WT032 – 4 MB (2M x 16 bits)  SPI flash memory D Numonyx M25P16 – 16 Mb  Internal ADC D Analog Devices AD7266 2 MSPS, 12-bit, 3-channel SAR analog-to-digital converter D Twelve single-ended inputs D Six differential inputs  Universal asynchronous re ceiver/transmitter (UART) D ADM3202 RS-232 line driver/receiver D DB9 female connector

xii ADSP-BF506F EZ-KIT Lite Evaluation System Manual L E D s D Five LEDs: one board reset (red), three general-purpose (amber), and one power (green)  Push buttons D Three push buttons: one reset and two programmable flags with debounce logic  Expansion interface II D Next generation of the expansion interface design, provides access to most of the processor signals  Land grid array D Easy probing of all port pins  Other features D JTAG ICE 14-pin header D Processor power measurement jumpers For information about the hardware components of the EZ-KIT Lite, refer to “ADSP-BF506F EZ-KIT Lite Bill Of Materials” on page A-1 . Purpose of This Manual The ADSP-BF506F EZ-KIT Lite Evaluation System Manual provides instructions for installing the pr oduct hardware (board). The text describes operation and configuration of the board components and pro- vides guidelines for running yo ur own code on the ADSP-BF506F EZ-KIT Lite. Finally, a schematic and a bill of materials are provided for reference.

ADSP-BF506F EZ-KIT Lite Eval uation System Manual xiii Preface The product software installation is detailed in the VisualDSP++ Installa- tion Quick Reference Card . Intended Audience The primary audience for this manu al is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appro priate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices processors can use this manual but sh ould supplement it with other texts (such as the ADSP-BF50x Blackfin Proc essor Hardware Reference and Blackfin Processor In struction Set Reference ) that describe your target architecture. Programmers who are unfa miliar with VisualDSP++ should refer to the VisualDSP++ online Help and user’s or getting started guides. For the locations of these documents, see “Related Documents” . Manual Contents The manual consists of:  Chapter 1, “Using ADSP-BF506F EZ-KIT Lite” on page 1-1 . Describes EZ-KIT Lite functional ity from a programmer’s perspec- tive and provides an ea sy-to-access memory map.  Chapter 2, “ADSP-BF506F EZ-KIT Lite Hardware Reference” on page 2-1 . Provides information on the EZ -KIT Lite hardware components.  Appendix A, “ADSP-BF506F EZ-KIT Lite Bill Of Materials” on page A-1 . Provides a list of components used to manufacture the EZ-KIT Lite board.

What’s New in This Manual xiv ADSP-BF506F EZ-KIT Lite Evaluation System Manual  Appendix B, “ADSP-BF506F EZ-KIT Lite Schematic” on page B-1 . Provides the resources to allow boar d-level debugging or to use as a reference guide. Appendix B is part of the online Help. What’s New in This Manual This is the first edition of the ADSP-BF506F EZ-KIT Lite Evaluation Sys- tem Manual . Technical or Customer Support You can reach Analog Devices, Inc. Customer Support in the following ways:  Visit the Embedded Processing and DSP products Web site at http://www.analog.com/processors/technicalSupport  E-mail tools questions to processor.tools.support@analog.com  E-mail processor questions to processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support)  Phone questions to 1-800-ANALOGD  Contact your Analog Devices, Inc. local sales office or authorized distributor  Send questions by mail to: Analog Devices, Inc. One Technology Way

ADSP-BF506F EZ-KIT Lite Evaluation System Manual xv Preface P.O. Box 9106 Norwood, MA 02062-9106 USA Supported Processors This evaluation system suppo rts Analog Devices ADSP-BF504, ADSP-BF504F, and ADSP-BF506F Blackfin embedded processors. Product Information Product information can be obtained from the Analog Devices Web site, VisualDSP++ online Help system, and a technical library CD. Analog Devices Web Site The Analog Devices Web site, www.analog.com, provides information about a broad range of products—anal og integrated circ uits, amplifiers, converters, and digital signal processors. To access a complete technical librar y for each processor family, go to http://www.analog.com/processors/technical_library . The manuals selection opens a list of current manuals related to the product as well as a link to the previous revi sions of the manuals. Whe n locating your manual title, note a possible errata check mark next to the title that leads to the current correction report against the manual. Also note, MyAnalog.com is a free feature of the Analog Devices Web site that allows customization of a Web pa ge to display only the latest infor- mation about products you are intere sted in. You can ch oose to receive weekly e-mail notifications containing updates to the We b pages that meet

xvi ADSP-BF506F EZ-KIT Lite Evaluation System Manual your interests, including documentat ion errata against all manuals. MyAnalog.com provides access to books, application notes, data sheets, code examples, and more. Visit MyAnalog.com to sign up. If you are a r egistered user, just log on. Your user name is your e-mail address. VisualDSP++ Online Documentation Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manu als, processor manuals, Dinkum Abridged C++ library, and FLEXnet License Tools software documenta- tion. You can search easily across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary Portable Documentation Format ( .pdf) files for all manuals are provided on the VisualDSP++ installation CD. Each documentation file type is described as follows. Technical Library CD The technical library CD contains seminar material s, product highlights, a selection guide, and documentation files of processor manuals, Visu- alDSP++ software manuals, and hardwa re tools manuals for the following processor families: Blackfin, SH ARC, TigerSHARC, ADSP-218x, and ADSP-219x. File Description .chm Help system files and manuals in Microsoft help format .htm or .html Dinkum Abridged C++ library and FLEX net License T ools software documenta- tion. Viewing and printing the .html files requires a browser, such as Internet Explorer 6.0 (or higher). .pdf VisualDSP++ and processor manuals in PDF format. Viewing and printing the .pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).

processor, click the request CD check mark, and fill out the order form. latest manual revisions and as sociated documentation errata. Table 1. Related Processor Publications tecture and all register functions. Table 2. Related VisualDSP++ Publications

commands for Blackfin processors. services’ functions and commands. mand appears on the File menu). that. One or the other is required. rated by vertical bars; read the example as an optional this or that. optional comma-sep arated list of this. filename Non-keyword placeholders appear in text with italic style format. Table 2. Related VisualDSP++ Publications (Cont’d)

ADSP-BF506F EZ-KIT Lite Eval uation System Manual xix Preface Note: For correct operation, ... A Note provides supplementary information on a related topic. In the online version of th is book, the word Note appears instead of this symbol. Caution: Incorrect device operation may result if ... Caution: Device damage may result if ... A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage. In the online version of this book, the word Caution appears instead of this symbol. Warning: Injury to device users may result if ... A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users. In the online ve rsion of this book, the word Warning appears instead of this symbol. Example Description L a

xx ADSP-BF506F EZ-KIT Lite Evaluation System Manual

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-1

1 USING ADSP-BF506F EZ-KIT

This chapter provides specific informati on to assist you with development of programs for the ADSP-BF506F EZ -KIT Lite evalua tion system. The following topics are covered.  “Package Contents” on page 1-2  “Default Configuration” on page 1-3  “EZ-KIT Lite Instal lation” on page 1-3  “EZ-KIT Lite Session Startup” on page 1-5  “Evaluation License Re strictions” on page 1-7  “Memory Map” on page 1-7  “Internal Flash Memory Interface” on page 1-8  “SPI Flash Memory Interface” on page 1-9  “Power-On-Self Test” on page 1-9  “LEDs and Push Buttons” on page 1-10  “JTAG Interface” on page 1-10  “Expansion Interface II” on page 1-11  “VDDINT Programmable R egulator” on page 1-12  “Power Measurements” on page 1-12

1-2 ADSP-BF506F EZ-KIT Lite Evaluation System Manual  “Example Programs” on page 1-13  “Background Telemetry Channel” on page 1-13  “Reference Design Information” on page 1-14 For information about the graphical user interface, including the boot loading, target options, and other fa cilities of the EZ-KIT Lite system, refer to the online Help. For more detailed information abou t the ADSP-BF506F Blackfin proces- sor, see documents referred to as “Related Documents” . Package Contents Your ADSP-BF506F EZ-KIT Lite packa ge contains the following items.  ADSP-BF506F EZ-KIT Lite board  VisualDSP++ Installati on Quick Reference Card  CD containing: D VisualDSP++ software D ADSP-BF506F EZ-KIT Lite debug software D USB driver files D Example programs  USB cable Contact the vendor where you purcha sed your EZ-KIT Lite or contact Analog Devices, Inc. if any item is missing.

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-3 Using ADSP-BF506F EZ-KIT Lite Default Configuration The ADSP-BF506F EZ-KIT Lite board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your computer case. When removing the EZ-KIT Lite board from the package, handle the board carefully to avoid the discharge of static electricity, which can dam- age some components. Figure 1-1 shows the default jumper settings, switches, connector locations, and LE Ds used in installation. Confirm that your board is in the default configuration before using the board. EZ-KIT Lite Installation For correct operation, install the soft ware and hardware in the order pre- sented in the VisualDSP++ Installation Quick Reference Card . Substitute instructions in step 3 with instructions in this section. There are two options to connect the EZ-KIT Lite hardware to a personal computer (PC) running VisualDSP+ + 5.0: via an Analog Devices emula- tor or va a standalone debug module. The standalone debug agent allows a debug agent to interface to the AD SP-BF506F EZ-KIT Lite. The standal- one debug agent is shipped with the kit. The EZ-KIT Lite evaluation system co ntains ESD (electrostatic discharge) sensitive devices. Electrostatic charge s readily accumulate on the human body and equipment and can discharge withou t detection. Permanent damage may occur on devices subjected to high-ene rgy discharges. Proper ESD precautions are recommended to avoid performance de gradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.

1-4 ADSP-BF506F EZ-KIT Lite Evaluation System Manual To connect the EZ-KIT Lite to a PC via an emulator: 1. Plug the 5V adaptor into connector P9 (labeled 5V) or plug the USB cable into ZP1 (labeled USB). 2. Attach the emulator to the header connector P1 (labeled JTAG) on the EZ-KIT Lite. Figure 1-1. EZ-KIT Lite Hardware Setup

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-5 Using ADSP-BF506F EZ-KIT Lite To connect the EZ-KIT Lite to a PC via the debug agent: 1. Plug one side of the provided US B cable into the USB connector of the debug agent ZP1 (labeled USB). Plug the other side of the cable into a USB port of the PC running VisualDSP++ . 2. Verify that the yellow USB mo nitor LED on the debug agent, ZLED2, is lit. This signifies that th e board is communicating prop- erly with the host PC and ready to run VisualDSP++. EZ-KIT Lite Session Startup 1. If you are running VisualDSP++ fo r the first time, navigate to the VisualDSP++ environment via the Start–>Programs menu. The main window appears. Note that VisualDSP++ does not connect to any session. Skip the rest of this step to step 2. If you have run Visual DSP++ previously, the last opened session appears on the screen. You can ov erride the default behavior and force VisualDSP++ to start a new session by pressing and holding down the Ctrl key while starting VisualDSP++. Do not release the Ctrl key until the Session Wizard appears on the screen. Go to step 3. 2. To connect to a new EZ -KIT Lite session, start Session Wizard by selecting one of the following.  From the Session menu, New Session .  From the Session menu, Session List . Then click New Ses- sion from the Session List dialog box.  From the Session menu, Connect to Target .

EZ-KIT Lite Session Startup 1-6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual 3. The Select Processor page of the wizard a ppears on the screen. Ensure Blackfin is selected in Processor family . In Choose a target processor , select ADSP-BF506F . Click Next. 4. The Select Connection Type page of the wizard appears on the screen. Select EZ-KIT Lite and click Next. 5. The Select Platform page of the wizard appears on the screen. Ensure that the selected platform is ADSP-BF506F EZ-KIT Lite via Debug Agent . Specify your own Session name for your session or accept the default name. The session name can be a string of any length; although, the box displays approximately 32 chara cters. The session name can include space characters. If you do not specify a session name, VisualDSP++ creates a session name by combining the name of the selected platform with the select ed processor. The only way to change a session name later is to delete the session and open a new session. Click Next. 6. The Finish page of the wizard appears on the screen. The page dis- plays your selections. Check the sele ctions. If you are not satisfied, click Back to make changes; otherwise, click Finish. VisualDSP++ creates the new session and connects to the EZ-KIT Lite. Once connected, the main window’s title is changed to include the ses- sion name set in step 6. LTo disconnect from a session, click the disconnect button or select Session –>Disconnect from Target . To delete a session, select Session –> Session List . Select the ses- sion name from the list and click Delete. Click OK.

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-7 Using ADSP-BF506F EZ-KIT Lite Evaluation License Restrictions The ADSP-BF506F EZ-KIT Lite instal lation is part of the the Visu- alDSP++ installation. The EZ -KIT Lite is a licensed product that offers an unrestricted evaluation license for th e first 90 days. Once the initial unre- stricted 90-day evaluati on license expires:  VisualDSP++ restricts a connect ion to the ADSP-BF506F EZ-KIT Lite via the USB debug agent interface only. Connections to simu- lators and emulation products are no longer allowed.  The linker restricts a user progr am to to ¼ of internal memory (16 Kbytes), which is 4 Kbytes for code space with no restrictions for data space.  The EZ-KIT Lite hardware must be connected and powered up to use VisualDSP++ with a valid evaluation or permanent license. Refer to the VisualDSP++ Installation Quick Reference Card for details. Memory Map The ADSP-BF506F processor has internal static random access memory (SRAM) used for instruction or data storage. See Table 1-1 . The internal memory details can be found in the ADSP-BF50x Blackfin Processor Hard- ware Reference. The ADSP-BF506F EZ-KIT Lite board inc ludes external se rial peripheral interconnect (SPI) flash and internal flash memories. See Table 1-2 ; see also the following “Internal Flash Memory Interface” and “SPI Flash Memory Interface” .

Internal Flash Memory Interface 1-8 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Internal Flash Memory Interface Internal parallel flash memory of the ADSP-BF506F EZ-KIT Lite is a

4 MB (2M x 16 bits) Numonyx M58WT032 de vice, which is internal to

the processor. The address range for flash memory is 0x2000 0000 to 0x203F FFFF. Table 1-1. EZ-KIT Lite Internal Memory Map Start Address Content 0xFFE0 0000 CORE MEMORY MAPPED REGISTERS 0xFFC0 0000 SYSTEM MEMORY MAPPED REGISTERS 0xFFB0 1000 Reserved 0xFFB0 0000 INTERNAL SCRATCHPAD RAM (4K BYTES) 0xFFA1 4000 Reserved 0xFFA0 8000 Reserved 0xFFA0 4000 L1 INSTRUCTION SRAM/CACHE (16K BYTES) 0xFFA0 0000 L1 INSTRUCTION BANK A SRAM (16K BYTES) 0xFF80 8000 Reserved 0xFF80 4000 L1 DATA BANK A SRAM/CACHE (16K BYTES) 0xFF80 0000 L1 DATA BANK A SRAM (16K BYTES) 0xEF00 1000 Reserved Table 1-2. EZ-KIT Lite External (I nterface-Accessible) Memory Map Start Address Content 0xEF00 0000 BOOT ROM (4K BYTES) 0x2040 0000 Reserved 0x2000 0000 SYNC FLASH (32M BITS) 0x0000 0000 Reserved

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-9 Using ADSP-BF506F EZ-KIT Lite By default, the EZ-KIT Lite boots from SPI flas h memory. The processor boots from internal parallel flash me mory if the boot mode select switch (SW2) is set to position 1 or 2; see “Boot Mode Select Switch (SW2)” on page 2-8 . Flash memory code can be modified. For instructions, refer to the online Help and example program included in the EZ-KIT Lite installation directory. SPI Flash Memory Interface SPI flash memory of the ADSP-BF506F EZ-KIT Lite is a 16 Mb Num- onyx M25P16 device. The device is selected via SPI0_SEL1. SPI flash memory is pre-loaded with boot code for the power-on-self test (POST) program. For more information, refer to “Power-On-Self Test” on page 1-9 . Power-On-Self Test The power-on-self-test program (POST) tests all EZ-KIT Lite peripherals and validates functionality as well as connectivity to the processor. Once assembled, each EZ-KIT Lite if fully test ed for an extended period of time with a POST. All EZ-KIT Lite boards are shipped with a POST pre-loaded into one of their on-board flash memories. The POST is exe- cuted by resetting the board and pres sing the proper push button(s). The POST also can be used for reference fo r a custom software design or hard- ware troubleshooting. Note that the source code for the POST program is included in the VisualDSP++ instal lation directory along with the readme.txt file, which describes how the board is configured to run a POST.

1-10 ADSP-BF506F EZ-KIT Lite Evaluation System Manual LEDs and Push Buttons The EZ-KIT Lite provides two push buttons and three LEDs for gen- eral-purpose I/O. The three LEDs, labeled LED2 through LED4, are accessed via the PF0–2 GPIO ports of the processor. For info rmation on how to program the flag pins, refer to the ADSP-BF50x Blackfin Proc essor Hardware Reference Manual. The two general-purpose pu sh buttons are labeled PB0 and PB1. The status of each individual button can be read through programmable flag inputs PF3 and PF4. The flag reads a ‘1’ when a corresponding switch is being pressed. When the switch is released , the flag reads a ‘0’. A connection between the push buttons and proces sor inputs is established through a DIP switch, SW3. The switch should be turned off when another source is driving the signals. An example program is included in the ADSP-BF506F installation direc- tory to demonstrate functionality of the LEDs and push buttons. The LED and push button signals al so are connected to the expansion interface II; see “Expansion Interface II Connectors (P2 and P4)” on page 2-18 and “Expansion Interface II Conne ctor (P3)” on page 2-18 . JTAG Interface The board contains an on-board debug agent that operates via a USB port. The ADSP-BF506F EZ-KIT Lite receives all of its power via USB; there- fore, no power supply is required. For debugging, the JTAG connector ( P1) allows an external emulator (USB-ICE or HPUSB-ICE) to connect to the board, instead of the on-board debug agent.

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-11 Using ADSP-BF506F EZ-KIT Lite For more information about emulators, contact Analog Devices or go to: http://www.analog.com/en/embedded-processing-dsp/Blackfin/pro- cessors/Blackfin_development_tools/fca.html . Expansion Interface II The expansion interface II allows an Analog Devices EZ-Extender or a custom-design daughter board to be te sted across various hardware plat- forms that have the same expansion interface. The expansion interface II implem ented on the ADSP-BF506F EZ-KIT Lite consists of three connectors, which are 0.1 in. shrouded headers ( P2– 4). The connectors contain a majority of the ADSP-BF506F processor’s signals. For pinout information, go to “ADSP-BF506F EZ-KIT Lite Sche- matic” on page B-1 . The mechanical dimensions of the expansion connectors can be obtained by contacting “Technical or Customer Support”. For more information about daughter boards, visit the Analog Devices Web site at: http://www.analog.com/en/embedded-processing-dsp/Blackfin/pro- cessors/Blackfin_development_tools/fca.html . Limits to current and interface speed must be taken into consideration when using the expansion interface. Cu rrent for the expansion interface II is sourced from the EZ-KIT Lite; theref ore, the current should be limited to 1A for 5V and 500 mA for the 3.3V planes. If more cu rrent is required, then a separate power connector and a regulator must be designed on a daughter card. Additional circuitry can add extra loading to signals, decreasing their maximum effective speed. LAnalog Devices does not support and is not responsible for the effects of additional circuitry.

VDDINT Programmable Regulator 1-12 ADSP-BF506F EZ-KIT Lite Evaluation System Manual VDDINT Programmable Regulator By default, the EZ-KIT Lite runs at 1.4V. The board contains a program- mable regulator that supplies the processor’s core with a voltage between 1.1 and 1.4. The voltage is adjusted by writing to the AD5258 digital potentiometer via the 2-wire interface (TWI) signals. Table 1-3 shows the appropriate step and corresponding voltage values. For an example of writing to the AD5258 potentiometer, refer to the POST example. For more information on the acceptable vo ltage/frequency values, refer to the ADSP-BF604/BF506(F) Blackfin Embedded Processor data sheet and ADSP-BF50x Blackfin Proc essor Hardware Reference manual. For more information about the digital poten tiometer, refer to the AD5258 data sheet. Power Measurements Several locations are provided for me asuring the current draw from vari- ous power planes. Precision 0.1 ohm sh unt resistors are available on the VDDINT, VDDEXT, and VDDFLASH voltage domains. For current draw, the jumper is removed, voltage across the resistor can be measured Table 1-3. Table 5. Voltage Values Step Value Voltage (V) 57 1.10 46 1.15 36 1.20 27 1.25 18 1.30 10 1.35 31 . 4 0

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-13 Using ADSP-BF506F EZ-KIT Lite using an oscilloscope, and the value of the resistor can be measured using a precision multi-meter. Once the voltage and resistance are measured, the current can be calculated by dividing the voltage by the resistance. For the highest accuracy, a differential probe should be used for measuring the voltage across the resistor. Example Programs Example programs are provided with the ADSP-BF506F EZ-KIT Lite to demonstrate various capabilities of the product. The programs are installed with the ADSP-BF506F specia l kit installation, on top of the VisualDSP++ 5.0 base kit or any VisualDSP++ and can be found in the <install_path >\\Blackfin\\Examples\\ADSP-BF506F EZ-KIT Lite direc- tory. Refer to a readme file prov ided with each example for more information. Background Telemetry Channel The USB debug agent supports the ba ckground telemetry channel (BTC), which facilitates data exchange betw een VisualDSP++ and the processor without interrupting processor execution. The BTC allows you to view a variable as it is update d or changed, all while the processor continues to exec ute. For increased performance of the BTC, including faster reading and writin g, please check our latest line of processor emulators at: http://www.analog.com/en/embedded-processing-dsp/black- fin/USB-EMULATOR/products/product.html . For more information about the BTC, see the online Help.

Reference Design Information 1-14 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Reference Design Information A reference design info package is available for download on the Analog Devices Web site. The package provid es information on the design, lay- out, fabrication, and assembly of the EZ-KIT Lite. The information can be found at: http://www.analog.com/en/embedded-processing-dsp/con- tent/reference_designs/fca.html .

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-1

2 ADSP-BF506F EZ-KIT LITE

This chapter describes the hardware design of the ADSP-BF506F EZ-KIT Lite board. The following topics are covered.  “System Architecture” on page 2-2 Describes the board’s configuration and explains how the board components interface with the processor.  “Programmable Flags” on page 2-3 Shows the locations and describes the programming flags (PFs).  “Push Buttons and Switches” on page 2-7 Shows the locations and describes the push buttons and switches.  “Jumpers” on page 2-11 Shows the locations and descri bes the configuration jumpers.  “LEDs” on page 2-14 Shows the locations and describes the LEDs.  “Connectors” on page 2-16 Shows the locations and provides part numbers for the on-board connectors. In addition, the manu facturer and part number infor- mation is provided for the mating parts.

2-2 ADSP-BF506F EZ-KIT Lite Evaluation System Manual System Architecture This section describes the processor’ s configuration on the EZ-KIT Lite board ( Figure 2-1 ). The EZ-KIT Lite is desi gned to demonstrate th e ADSP-BF506F Blackfin processor capabilities. The processor has an I/O vo ltage of 3.3V. The core voltage of the processor is contro lled by an Analog Devices ADP1715 low dropout regulator (LDO) and an An alog Devices AD5258 digipot, which Figure 2-1. System Architecture

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-3 ADSP-BF506F EZ-KIT Lite Hardware Reference is configurable over the 2-wire inte rface (TWI) signals. Refer to the power-on-self test (POST) example in the ADSP-BF506F installation directory of VisualDSP++ for informa tion on how to set up the TWI interface. The core voltage and clock rate can be set up on the fly by the processor. The input clock is 25 MHz. The defaul t boot mode for the processor is SPI flash boot. See “Boot Mode Select Switch (SW2)” for information on how to change the default boot mode. Programmable Flags The processor has 35 gen eral-purpose input/outp ut (GPIO) signals spread across three ports ( PF, PG, and PH). The pins are multi-functional and depend on the ADSP-BF506F processor setup. The following tables show how the programmable flag pins are used on the EZ-KIT Lite.  PF programmable flag pins – Table 2-1 PG programmable flag pins – Table 2-2 PH programmable flag pins – Table 2-3 Table 2-1. Port F Programmable Flag Connections Processor Pin Other Processor Function EZ-KIT Lite Function PF0 TSCLK0/UA0_RX_ALT/TMR6/ CUD0 Default: LED0 Land grid array, expansion interface II PF1 RSCLK0/UA0_TX_ALT/TMR5/ CDG0 Default: LED1 Land grid array, expansion interface II PF2 DT0PRI/PWM0_BH/PPI_D8/ CZM0 Default: LED2 Land grid array, expansion interface II PF3 TFS0/PWM0_BL/PPI_D9/ CDG0 Default: PB0 Land grid array, expansion interface II

2-4 ADSP-BF506F EZ-KIT Lite Evaluation System Manual PF4 RFS0/PWM0_CH/PPI_D10/ TACLK0 Default: PB1 Land grid array, expansion interface II PF5 RFS0/PWM0_CH/PPI_D10/ TACLK0 Default: not used Land grid array, expansion interface II PF6 UA1_TX/PWM0_TRIP/ PPI_D12 Default: not used Land grid array, expansion interface II PF7 UA1_RX/PWM0_SYNC/ PPI_D13/TACI3 Default: not used Land grid array, expansion interface II PF8 UA1_RTS/DT0SEC/PPI_D7 Default: not used Land grid array, expansion interface II PF9 UA1_CTS/DR0SEC/PPI_D6/ CZM0 Default: not used Land grid array, expansion interface II PF10 SPI0_SCK/TMR2/PPI_D5 Default: SPI0_SCK Land grid array, expansion interface II PF11 SPI0_MISO/PWM0_TRIP/ PPI_D4/TACLK2 Default: SPI0_MISO Land grid array, expansion interface II PF12 SPI0_MOSI/PWM0_SYNC/ PPI_D3 Default: SPI0_MOSI Land grid array, expansion interface II PF13 SPI0_SEL1/TMR3/PPI_D2/ SPI0_SS Default: SPI0_SEL1 Land grid array, expansion interface II PF14 SPI0_SEL2/PWM0_AH/ PPI_D1 Default: not used Land grid array, expansion interface II PF15 SPI0_SEL3/PWM0_AL/ PPI_D0 Default: not used Land grid array, expansion interface II Table 2-1. Port F Programmable Flag Connections (Cont’d) Processor Pin Other Processor Function EZ-KIT Lite Function

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-5 ADSP-BF506F EZ-KIT Lite Hardware Reference Table 2-2. Port G Programmable Flag Connections Processor Pin Other Processor Function EZ-KIT Lite Function PG0 SPI1_SEL3/TMRCLK/ PPI_CLK/ UA1_RX_ALT/ TACI4 Default: CAN_ERR Land grid array, expansion interface II PG1 SPI1_SEL2/PPI_FS3/ CAN_RX/ TACI5 Default: CAN_RX Land grid array, expansion interface II PG2 SPI1_SEL1/TMR4/CAN_TX/ SPI1_SS Default: CAN_TX Land grid array, expansion interface II PG3 HWAIT/SPI1_SCK/DT1SEC/ UA1_TX_ALT Default: not used Land grid array, expansion interface II PG4 SPI1_MOSI/DR1SEC_ALT/ PWM1_SYNC/TACLK6 Default: SD_WP Land grid array, expansion interface II PG5 SPI1_MISO/TMR7/ PWM1_TRIP Default: SD_CD Land grid array, expansion interface II PG6 PG6 ACM_SGLDIFF/SD_D3/ PWM1_AH Default: ACM_SGLDIFF SD_D3, land grid array, expansion interface II PG7 ACM_RANGE/SD_D2/PWM1_AL Default: ACM_RANGE SD_D2, land grid array, expansion interface II PG8 DR1SEC/SD_D1/PWM1_BH Default: ADC_DOUTB SD_D1, land grid array, expansion interface II PG9 DR1PRI/SD_D0/PWM1_BL Default: ADC_DOUTA SD_D0, land grid array, expansion interface II PG10 RFS1/SD_CMD/PWM1_CH/ TACI6 Default: ADC_CS SD_CMD, land grid array, expansion interface II PG11 RSCLK1/SD_CLK/PWM1_CL/ TACLK7 Default: ADC_SCLK SD_CLK, land grid array, expansion interface II PG12 UA0_RX/SD_D4/PPI_D15/ TACI2 Default: UART0_RX DS_D4, land grid array, expansion interface II PG13 UA0_TX/SD_D5/PPI_D14/ CZM1 Default: UART0_TX DS_D5, land grid array, expansion interface II

2-6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual PG14 /UA0_RTS/SD_D6/TMR0/ PPI_FS1/CUD1 Default: UART0_RTS DS_D5, land grid array, expansion interface II PG15 /UA0_CTS/SD_D7/TMR1/ PPI_FS2/CDG1 Default: UART0_CTS DS_D7, land grid array, expansion interface II Table 2-3. Port H Programmable Flag Connections Processor Pin Other Processor Function EZ-KIT Lite Function PH0 ACM_A2/DT1PRI/SPI0_SEL3 /WAKEUP Default: ACM_A2 Land grid array, expansion interface II PH1 ACM_A1/TFS1/ SPI1_SEL3_ALT/TACLK3 Default: ACM_A1 Land grid array, expansion interface II PH2 ACM_A0/TSCLK1/ SPI1_SEL2_ALT/TACI7 Default: ACM_A0 Land grid array, expansion interface II Table 2-2. Port G Programmable Flag Connections (Cont’d) Processor Pin Other Processor Function EZ-KIT Lite Function

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-7 ADSP-BF506F EZ-KIT Lite Hardware Reference Push Buttons and Switches This section describes operation of the push buttons and switches. The push button and switch locations are shown in Figure 2-2 . Figure 2-2. Push Button and Switch Locations

2-8 ADSP-BF506F EZ-KIT Lite Evaluation System Manual UART Setup Switch (SW1) The UART setup switch ( SW1) configures the UART0 signals between the DCE connector ( J1) and processor. Table 2-5 shows the switch settings. Boot Mode Select Switch (SW2) The boot mode select switch ( SW2) determines the boot mode of the pro- cessor. Table 2-5 shows the available boot mode settings. By default, the ADSP-BF506F processor boots from SPI flash memory. Table 2-4. UART Setup Switch (SW1) SW1 Position Function 1 and 3 Enable flow control

2 Disconnects the

UART_RX signal from the processor; the UART_RX signal can be used for another function

4 Connects the RTS and CTS signals together

5 Allows the host to reset the EZ-KIT Lite via the CTS signal

6 and 7 Selects the source for the CTS signal

8 Loops the TX and RX signals together for testing

Table 2-5. Boot Mode Select Switch (SW2) SW2 Position Processor Boot Mode

0 Idle—no boot

1 Boots from stacked parallel fl ash in asynchronous mode

2 Boots from stacked parallel flash in synchronous mode

3 Boots through SPI0 master from SPI memory

4 Boots through SPI0 slave from host device

5 Boots through PPI from host

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-9 ADSP-BF506F EZ-KIT Lite Hardware Reference Push Button Enable Switch (SW3) The push button enable switch ( SW3) disconnects the associated push but- ton circuit from the general-purpose I/O (GPIO) pins of the processor and allows the signals to be used on the expansion interface. ADC Enable Switch (SW4) The ADC enable switch ( SW4) disconnects the ADC from the SPORT1 interface of the processor and allows the ADC signals to be used on the SD connector or the expansion interface. CAN Enable Switch (SW5) The CAN enable switch ( SW5) disconnects the CAN transceiver from the processor and allows the CAN signal s to be used on the expansion interface. Reset Push Button (SW6) The reset push button ( SW6) resets the processor via a hardware reset. The reset push button does not reset th e on-board debug agent. The only way to reset the debug agent is to cycle power.

6 Reserved

7 Boots through UART0 slave from host device

Table 2-5. Boot Mode Select Switch (SW2) (Cont’d) SW2 Position Processor Boot Mode

2-10 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Programmable Flag Push Buttons (SW7–8) Two momentary pu sh buttons ( SW7 and SW8) are provided for general-pur- pose user input. The butt ons are connected to the PF3–4 GPIO pins of the processor. The push buttons are act ive high and, when pressed, send a high (1) to the processor. The GPIO enable switch ( SW3) disconnects the push buttons from the associated push button sign als (refer to “Push But- ton Enable Switch (SW3)” on page 2-9 for more information). ADC Loopback Switches (SW9–10) The ADC loopback switches ( SW9 and SW10) are used for testing only. The switches connect a test signal to the ADC inputs.

2-12 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Voltage Reference Select Jumper (JP2) The voltage reference select jumper ( JP2) selects between a 2.5V on-chip reference and an external voltage reference. When the jumper is installed on positions 2 and 3, the on-chip 2.5V reference is used. When the jumper is installed on positions 1 and 2, an external reference can be con- nected to the ADC through the DCAPA and DCAPB signals (see “ADC Voltage Reference (JP6)” on page 2-13 ). By default, JP2 is installed on positions 2 and 3. VDDEXT Power Jumper (JP3) The VDDEXT power jumper ( JP3) is used to measure the processor’s I/O voltage and current. By default, JP3 is ON, and the current flows through the two-pin IDC header. To measure power, remove the jumper on JP3 and measure the voltage across the precision resistor and resistance value. For more information, refer to “Power Measurements” on page 1-12 . VDDINT Power Jumper (JP4) The VDDINT power jumper ( JP4) is used to measure the processor’s core voltage and current. By default, JP4 is ON, and the current flows through the two-pin IDC header. To measure power, remove the jumper on JP4 and measure the voltage across the precision resistor and resistance value. For more information, refer to “Power Measurements” on page 1-12 . VDDFLASH Power Jumper (JP5) The VDDFLASH power jumper ( JP5) is used to measur e the internal par- allel flash voltage and current. By default, JP5 is ON, and the current flows through the two-pin IDC header. To measure power, remove the jumper on JP5 and measure the voltage across the precision resistor and resistance value. For more information, refer to “Power Measurements” on page 1-12 .

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-13 ADSP-BF506F EZ-KIT Lite Hardware Reference ADC Voltage Reference (JP6) The ADC voltage reference jumper ( JP6) is used to supply a reference voltage to the ADC. In order to use an external voltage reference, a jumper must be placed on po sitions 1 and 2 of JP2. To use the on-board AD780 precision voltage reference, install a ju mpers at position 1, 2 and 3, 4. To supply your own voltage refere nce, remove all jumpers from JP6 and con- nect your voltage reference to pins 1 and 3. By default, no jumpers are installed on JP6.

2-14 ADSP-BF506F EZ-KIT Lite Evaluation System Manual LEDs This section describes the on-board LEDs. Figure 2-3 shows the LED locations. Figure 2-4. LED Locations

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-15 ADSP-BF506F EZ-KIT Lite Hardware Reference Reset LED (LED1) When LED1 is lit, it indicates that the master reset of all the major ICs is active. The reset signal is controlled by the Analog Devices ADM708 supervisory reset circuit. GPIO LEDs (LED2–4) Three LEDs connect to the three genera l-purpose I/O pins of the proces- sor (see Table 2-6 ). The LEDs are active high and lit by writing a “ 1” to the correct programmable flag signal. Power LED (LED5) When LED5 is lit solid, it indicates that power is being properly supplied to the board. Table 2-6. GPIO LEDs LED Reference Designator Processor Programmable Flag Pin LED2 PF0 LED3 PF1 LED4 PF2

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-17 ADSP-BF506F EZ-KIT Lite Hardware Reference RS-232 Connector (J1) CAN Connector (J2) SD Connector (J3) JTAG Connector (P1) The JTAG header ( P1) is the connecting point between the JTAG inter- face and ADSP-BF506F processor. Pin 3 is missing to provide keying. Pi n 3 in the mating connector should have a plug. Part Description Manufacturer Part Number DB9, female, vertical mount NORCOMP 191-009-213-L-571 Mating Cable 2m female-to-female cable DIGI-KEY AE1020-ND Part Description Manufacturer Part Number RJ11 modular jack AMP 5558872-1 Mating Cable 4-conductor modular jack cable L-COM TSP3044 Part Description Manufacturer Part Number SD 8-bit MORETHANALL MHC-W21-601-LF Memory Card

256 MB SANDISK-STACK SDSDB-256-A10

2-18 ADSP-BF506F EZ-KIT Lite Evaluation System Manual When an emulator is used with the EZ-KIT Lite, the on-board debug agent is bypassed. Expansion Interface II Connectors (P2 and P4) P2 and P4 are board-to-board connectors providing signals for the SPI, TWI, UART, SPORT, and GPIO signals of the processor. The connec- tors are located on the upper edge of the board (one connector is on the top and one is on the bottom). For more information, see “Expansion Interface II” on page 1-11 . Expansion Interface II Connector (P3) P3 is a board-to-board connector prov iding signals for the PPI and GPIO signals of the processor. The connector is located on the upper edge of the board. For more information, see “Expansion Interface II” on page 1-11 . Part Description Manufacturer Part Number 50-position 0.1’’, SMT header SAMTEC TSSH-125-01-L-DV-A Mating Connector 50-position 0.1’’, SMT socket SAMTEC SSW-125-22-F-D-VS Part Description Manufacturer Part Number 70-position 0.1’’, SMT header SAMTEC TSSH-135-01-L-DV-A Mating Connector 70-position 0.1’’, SMT socket SAMTEC SSW-135-22-F-D-VS

ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-19 ADSP-BF506F EZ-KIT Lite Hardware Reference DMAX Land Grid Array Connectors (P5–6) The DMAX land g rid array areas ( P5 and P6) are intended for the probing of the processor signals. The pads are exposed and designed to attach a Tektronix logic analyzer to the connect ors listed in the following table. For more information about the land grid array, consult the Tektronix web site. ADC Input Connector (P7) Power Connector (P9) Part Description Manufacturer Part Number Primary retention T ektronix 020290800 Alternate retention T ektronix 020291000 Part Description Manufacturer Part Number 24-position 0.1’’, TH header SAMTEC TSSH-112-01-L-D Part Description Manufacturer Part Number 0.65 mm power jack CUI 045-0883R Mating Connector 5.0VDC@3.6A power supply GLOBETEK GS-1750(R)

2-20 ADSP-BF506F EZ-KIT Lite Evaluation System Manual

ADSP-BF506F EZ-KIT Lite Evaluation System Manual A-1 A ADSP-BF506F EZ-KIT LITE BILL OF MATERIALS The bill of materials corresponds to “ADSP-BF506F EZ-KIT Lite Sche- matic” on page B-1 . Ref. Qty. Description Reference Designator Manufacturer Part Number 117 4 L V C 1 4 A SOIC14 U1 TI 74LVC14AD 2 1 IDT74FCT3244A PY SSOP20 U5 IDT IDT74FCT3244APYG 3 1 25MHZ OSC003 U15 EPSON SG-8002CA MP 4 2 SN74LVC1G08 SOT23-5 U18,U20 TI SN74LVC1G08DBVR 5 1 TJA1041 SOIC14 U19 PHILIPS TJA1041T/N1 6 1 SI4411DY SO-8 U3 VISHAY Si4411DY-T1-E3 7 1 BF506F M25P16 U4 ST MICRO M25P16-VMW6G 8 1 MIC94042 MLF4 U6 MICREL MIC94042YFL 9 1 ADM708SARZ SOIC8 U17 ANALOG DEVICES ADM708SARZ 10 1 ADM3202ARNZ SOIC16 U16 ANALOG DEVICES ADM3202ARNZ 11 1 ADSP-BF506F LQFP120 U7 ANALOG DEVICES ADSPBF506FBSWZ- ENG 12 1 ADP1864AUJZ SOT23-6 VR1 ANALOG DEVICES ADP1864AUJZ-R7

A-2 ADSP-BF506F EZ-KIT Lite Evaluation System Manual 13 1 ADP1715 MSOP8 VR3 ANALOG ADP1715ARMZ-R7 14 1 AD5258 MSOP10 U2 ANALOG DEVICES AD5258BRMZ10 15 1 ADP1715 MSOP8 VR4 ANALOG DEVICES ADP1715ARMZ-1.8- 16 6 AD8022 MSOP8 U9-14 ANALOG DEVICES AD8022ARMZ 17 1 ADP1613 MSOP8 VR2 ANALOG DEVICES ADP1613ARMZ-R7 18 1 DIP8 SWT016 SW1 C&K TDA08H0SB1 19 2 DIP6 SWT017 SW9-10 CTS 218-6LPST 20 2 DIP4 SWT018 SW4-5 ITT TDA04HOSB1 21 1 DB9 9PIN CON038 J1 NORCOMP 191-009-213-L-571 22 1 RJ11 4PIN CON039 J2 TYCO 5558872-1 23 1 DIP2 SWT020 SW3 C&K CKN9064-ND 24 4 IDC 2X1 IDC2X1 JP1,JP3-5 FCI 90726-402HLF 25 1 IDC 3X1 IDC3X1 JP2 FCI 90726-403HLF 26 1 IDC 7X2 IDC7X2 P1 SAMTEC TSW-107-07-T-D 27 1 IDC 12X2 IDC12X2 P7 SAMTEC SSW-112-01-T-D 28 1 3A RESETABLE FUS004 F1 TYCO SMD300F-2 29 6 IDC 2PIN_JUMPER_ SHORT SJ1-6 DIGI-KEY S9001-ND Ref. Qty. Description Reference Designator Manufacturer Part Number

ADSP-BF506F EZ-KIT Lite Evaluation System Manual A-3 ADSP-BF506F EZ-KIT Lite Bill Of Materials 30 1 PWR .65MM CON045 P9 DIG CP1-023-ND 31 3 MOMENTARY SWT024 SW6-8 PANASONIC EVQ-Q2K03W 32 1 ROTARY SWT027 SW2 COPAL S-8110 33 1 SD_CONN 8-BIT CON067 J3 MORETHA- NALL MHC-W21-601-LF 34 3 YELLOW LED001 LED2-4 PANASONIC LN1461C 35 2 100 1/10W 5% 0805 R92,R94 VISHAY CRCW0805100RJNEA 36 2 600 100MHZ 500MA 1206 FER2-3 STEWARD HZ1206B601R-10 37 2 0 1/10W 5% 0805 R71,C101 VISHAY CRCW08050000Z0EA 38 1 190 100MHZ 5A FER002 FER4 MURATA DLW5BSN191SQ2 39 2 0.47UF 16V 10% 0805 C76-77 AVX 0805YC474KAT2A 40 2 1UF 10V 10% 0805 C87-88 AVX 0805ZC105KAT2A 41 8 10UF 6.3V 10% 0805 C7,C13,C21,C33,C71, C73-74,C121 AVX 08056D106KAT2A 42 1 4.7UF 6.3V 10% 0805 C113 AVX 08056D475KAT2A 43 34 0.1UF 10V 10% 0402 C72,C75,C89-92,C109, C118 AVX 0402ZD104KAT2A 44 24 0.01UF 16V 10% 0402 C122 AVX 0402YC103KAT2A Ref. Qty. Description Reference Designator Manufacturer Part Number

A-4 ADSP-BF506F EZ-KIT Lite Evaluation System Manual 45 42 10K 1/16W 5% 0402 R3-6,R9,R11,R14,R19, R79,R81-83,R88-91, R95,R98-101,R108, R128,R133-134,R137 VISHAY CRCW040210K0FKED 46 3 4.7K 1/16W 5% 0402 R15-17 VISHAY CRCW04024K70JNED 47 25 0 1/16W 5% 0402 R21-22,R25-26,R39-40, R63-64,R66-67,R130 PANASONIC ERJ-2GE0R00X 48 11 33 1/16W 5% 0402 R7-8,R18,R20,R135- 136,R138-142 VISHAY CRCW040233R0JNEA 49 2 2.2UF 10V 10% 0805 C119-120 AVX 0805ZD225KAT2A 50 2 1A SK12 DO-214AA D8,D10 DIODES INC B120B-13-F 51 24 10PF 50V 5% 0805 C34-36,C49-69 AVX 08055A100JAT2A 52 1 1UF 16V 10% 0603 C96 PANASONIC ECJ-1VB1C105K 53 1 68PF 50V 5% 0603 C112 AVX 06035A680JAT2A 54 3 4.7UF 6.3V 20% 0603 C106-107,C110 PANASONIC ECJ-1VB0J475M 55 1 470PF 50V 5% 0603 C111 AVX 06033A471JAT2A 56 1 220UF 6.3V 20% D2E CT1 SANYO 10TPE220ML 57 5 330 1/10W 5% 0603 R80,R84-87 VISHAY CRCW0603330RJNEA 58 1 0 1/10W 5% 0603 R111 PHYCOMP 232270296001L Ref. Qty. Description Reference Designator Manufacturer Part Number

ADSP-BF506F EZ-KIT Lite Evaluation System Manual A-5 ADSP-BF506F EZ-KIT Lite Bill Of Materials 59 15 10 1/10W 5% 0603 R65,R68,R75,R77,R113 VISHAY CRCW060310R0JNEA 60 1 4700PF 16V 10% 0603 C79 DIGI-KEY 311-1083-2-ND 61 2 100PF 50V 5% 0603 C78,C80 AVX 06035A101JAT2A 62 1 1000PF 50V 5% 0603 C104 PANASONIC ECJ-1VC1H102J 63 2 62.0 1/10W 1% 0603 R74,R76 DIGI-KEY 311-62.0HRTR-ND 64 1 4.99K 1/16W 1% 0603 R112 VISHAY CRCW06034K99FKEA 65 1 24.9K 1/10W 1% 0603 R123 DIGI-KEY 311-24.9KHTR-ND 66 5 0.05 1/2W 1% 1206 R121-122,R125-126, R131 SEI CSF 1/2 0.05 1%R 67 7 10UF 16V 10% 1210 C97-100,C102,C114, C117 AVX 1210YD106KAT2A 68 1 GREEN LED001 LED5 PANASONIC LN1361CTR 69 1 RED LED001 LED1 PANASONIC LN1261CTR 70 2 1000PF 50V 5% 1206 C115-116 AVX 12065A102JAT2A 71 1 255.0K 1/10W 1% 0603 R127 VISHAY CRCW06032553FK 72 1 80.6K 1/10W 1% 0603 R124 DIGI-KEY 311-80.6KHRCT-ND 73 1 22000PF 25V 10% 0402 C94 DIGI-KEY 490-3252-1-ND 74 2 5A MBRS540T3G SMC D6-7 ON SEMI MBRS540T3G Ref. Qty. Description Reference Designator Manufacturer Part Number

A-6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual 75 1 2.5UH 30% IND013 L3 COILCRAFT MSS1038-252NLB 76 1 33.0K 1/16W 1% 0402 R2 ROHM MCR01MZPF3302 77 1 1.0K 1/16W 1% 0402 R120 PANASONIC ERJ-2RKF1001X 78 1 220PF 50V 10% 0402 C1 DIGI-KEY 311-1035-2-ND 79 2 100K 1/16W 5% 0402 R1,R114 DIGI-KEY 541-100KJTR-ND 80 1 2.2UF 25V 10% 0805 C103 DIGI-KEY 490-3331-1-ND 81 2 1A MBR130LSFT1G SOD-123FL D4-5 ON SEMI MBR130LSFT1G 82 2 1UH 20% IND019 L1-2 COILCRAFT ME3220-102MLB 83 2 33 1/16W 5% RNS003 RN1-2 PANASONIC EXB-2HV330JV 84 3 1.2K 1/16W 1% 0402 R12-13,R117 VISHAY CRCW04021K20FKED 85 2 4.3 1/4W 5% 1206 R116,R119 PANASONIC ERJ-8GEYJ4R3V 86 1 2.67K 1/16W 1% 0402 R118 PANASONIC ERJ-2RKF2671X 87 1 22UH 20% IND024 L4 COILCRAFT MSD7342-223MLC 88 1 330 100MHZ 1.5A 0805 FER1 MURATA BLM21PG331SN1D 89 1 3300PF 50V 5% 0603 C95 PANASONIC ECJ-1VB1H332K Ref. Qty. Description Reference Designator Manufacturer Part Number

ADSP-BF506F EZ-KIT Lite Evaluation System Manual A-7 ADSP-BF506F EZ-KIT Lite Bill Of Materials 90 1 27.4K 1/10W 1% 0603 R115 PANASONIC ERJ-3EKF2742V 91 1 20.0K 1/16W 1% 0402 R109 VISHAY CRCW040220K0FKED 92 1 30A GSOT05 SOT23-3 D2 VISHAY GSOT05-GS08 93 1 30A GSOT03 SOT23-3 D3 VISHAY GSOT03-GS08 94 1 40A ESD5Z2.5T1 SOD-523 D9 ON SEMI ESD5Z2.5T1G 95 1 7A VESD01-02V-GS

08 SOD-52

IDC25x2_SMTA P2 SAMTEC TSSH-125-01-L-DV-A 97 1 35x2 IDC35x2_SMTA P3 SAMTEC TSSH-135-01-L-DV-A Ref. Qty. Description Reference Designator Manufacturer Part Number

A-8 ADSP-BF506F EZ-KIT Lite Evaluation System Manual

17-12-2009_16:20 1 10 D A B C

20 Cotton Road

Nashua, NH 03063 A B C D PH: 1-800-ANALOGD C Title Size Board No. Date Sheet of DEVICES ANALOG RevA0226-2009 ADSP-BF506F EZ-KIT LITE 1.0 SCHEMATIC ADSP-BF506F EZ-KIT LITE

DA_5V 3.3V 0402 R139 33 R13 1.2K 0402 3.3V R11 10K 0402 DEFAULT=INSTALLED SJ1 JUMPER SHORTING 10K 0402 0.01UF 0402 3.3V 0.01UF 0402 3.3V 10K 0402 R19 R15 4.7K 0402 R16 4.7K 0402 R17 4.7K 0402 R14 10K 0402 33.0K 0402 220PF 0402 100K 0402 TP1 3.3V R12 1.2K 0402 3.3V 10K 0402 0402 10K 3.3V 10K 0402 DSP + SPI FLASH 1017-12-2009_16:20 2 D A B C Nashua, NH 03063 A B C D PH: 1-800-ANALOGD C Title Size Board No. Date Sheet of DEVICES ANALOG RevA0226-2009 ADSP-BF506F EZ-KIT LITE 1.0 25MHZ OSC003 U15 4 GND OE OUT VDD IDC7X2 0402 10K SW2 ROTARY SWT027 1 C 123 IDC2X1 JP1 SO8W M25P16 GND SCK SI SO VCC CS HOLD WP 3.3V R20 0402 RNS003 RN2 107 116 125 134 143 152 161R1A R1B R2A R2B R3A R3B R4A R4B R5A R5B R6A R6B R7A R7B R8A R8B R7 33 0402 0402 33R138 R8 33 0402 R140 33 0402 0402 33R18 EXT_PS DA_5V DSP_TCK DSP_TDI DSP_TDO DSP_TMS GND JTAG_CONN_TCK JTAG_CONN_TDI JTAG_CONN_TMS DA_USB_PWR DA_SOFT_RESET DSP_EMU DSP_TRST JTAG_CONN_EMU JTAG_CONN_SELECT JTAG_CONN_TRST JTAG_CONN_TDO DEBUG_AGENT ADSP-BF506F LQFP120_EP 111 110 114 115 113 119 118 120EXTCLK EXT_WAKE RESET NMI BMODE0 BMODE1 PF0/TSCLK0/UA0_RX/TMR6/CUD0 PF1/RSCLK0/UA0_TX/TMR5/CDG0 PF10/SPI0_SCK/TMR2/PPI_D5 PF11/SPI0_MISO/PWM0_TRIP/PPI_D4/TACLK2 PF12/SPI0_MOSI/PWM0_SYNC/PPI_D3 PF13/SPI0_SEL1/TMR3/PPI_D2/SPI0_SS PF14/SPI0_SEL2/PWM0_AH/PPI_D1 PF15/SPI0_SEL3/PWM0_AL/PPI_D0 PF2/DT0PRI/PWM0_BH/PPI_D8/CZM0 PF3/TFS0/PWM0_BL/PPI_D9/CDG0 PF4/RFS0/PWM0_CH/PPI_D10/TACLK0 PF5/DR0PRI/PWM0_CL/PPI_D11/TACLK1 PF6/UA1_TX/PWM0_TRIP/PPI_D12 PF7/UA1_RX/PWM0_SYNC/PPI_D13/TACI3 PF8/UA1_RTS/DT0SEC/PPI_D7 PF9/UA1_CTS/DR0SEC/PPI_D6/CZM0 PG0/SPI1_SEL3/TMRCLK/PPI_CLK/UA1_RX/TACI4 PG1/SPI1_SEL2/PPI_FS3/CAN_RX/TACI5 PG10/RFS1/SD_CMD/PWM1_CH/TACI6 PG11/RSCLK1/SD_CLK/PWM1_CL/TACLK7 PG12/UA0_RX/SD_D4/PPI_D15/TACI2 PG13/UA0_TX/SD_D5/PPI_D14/CZM1 PG14/UA0_RTS/SD_D6/TMR0/PPI_FS1/CUD1 PG15/UA0_CTS/SD_D7/TMR1/PPI_FS2/CDG1 PG2/SPI1_SEL1/TMR4/CAN_TX/SPI1_SS PG3/HWAIT/SPI1_SCK/DT1SEC/UA1_TX PG4/SPI1_MOSI/DR1SEC/PWM1_SYNC/TACLK6 PG5/SPI1_MISO/TMR7/PWM1_TRIP PG6/ACM_SGLDIFF/SD_D3/PWM1_AH PG7/ACM_RANGE/SD_D2/PWM1_AL PG8/DR1SEC/SD_D1/PWM1_BH PG9/DR1PRI/SD_D0/PWM1_BL PH0/ACM_A2/DT1PRI/SPI0_SEL3/WAKEUP PH1/ACM_A1/TFS1/SPI1_SEL3/TACLK3 SCL TDO SDA TMS TDI PH2/ACM_A0/TSCLK1/SPI1_SEL2/TACI7 TRST TCK EMU CLKIN XTAL PG BMODE2 SDA SCL EXT_WAKE DA_USB_PWREXT_PS UART0_CTS/SD_D7 UART0_RTS/SD_D6 UART0_TX/SD_D5 UART0_RX/SD_D4 ACM_SGLDIFF/SD_D3 ACM_RANGE/SD_D2 ADC_DOUTB/SD_D1 ADC_DOUTA/SD_D0 LED0 LED1 LED2 PB0 PB1 PF5 PF6 PF7 PF8 PF9 SPI0_MISO SPI0_MISO SPI0_MOSI SPI0_MOSI SPI0_SEL1 SPI0_SEL1 PF14 PF15 RESET ACM_A0 ACM_A1 ACM_A2 ADC_SCLK/SD_CLK ADC_CS/SD_CMD SD_CD SD_WP PG3 CAN_TX CAN_RX CAN_ERR DSP_TMS DSP_TMS DSP_TDI DSP_TDI DSP_TCK DSP_TCK DSP_TDO DSP_TDO DSP_EMU DSP_EMU DSP_TRST DSP_TRST DA_SOFT_RESET SPI0_SCK SPI0_SCK PG PG http://www.analog.com Engineer to Engineer Note EE-68 which can be found at When designing your JTAG interface please refer to the All USB interface circuitry is considered proprietary and has been omitted from this schematic. "JTAG"

16 Mb SPI FLASH

0 Idle-No Boot

Boot through SPI0 master from SPI memory Boot through SPI0 slave from host device Boot through PPI from host Reserved Boot thorugh UART0 slave from host device Default "BOOT MODE" "SPI FLASH CS ENABLE" SW2: Boot Mode Select Switch Boot from internal parallel flash in async mode Boot from internal parallel flash in sync mode

0.01UF 0402 0402 0.01UF C26 C27 0.01UF 0402 C28 0.01UF 0402 0402 0.01UF C29 0402 0.01UF C30 0402 0.1UF C31 0402 0.1UF C32 10UF 0805 C21 0402 0.1UF C22 0402 0.1UF C23 0402 0.1UF C24 0805 10UF 0805 10UF C13 0.1UF 0402 0.1UF 0402 0.1UF 0402 C20 0.1UF 0402 0402 0.01UF C14 0402 0.01UF C16C15 0.01UF 04020402 0.01UF C12 0.1UF 0402 C11 0.1UF 0402 C10 0.1UF 0402 0.1UF 0402 0402 0.01UF C18 C17 0.01UF 0402 0402 0.01UF C19 DSP POWER, BYPASS CAPS 10317-12-2009_16:20 D A B C Nashua, NH 03063 A B C D PH: 1-800-ANALOGD C Title Size Board No. Date Sheet of DEVICES ANALOG RevA0226-2009 ADSP-BF506F EZ-KIT LITE 1.0 ADSP-BF506F LQFP120_EP 117 121 109 108 112 116VDDEXT16 VDDEXT15 VDDEXT14 VDDEXT13 VDDEXT12 GND1 GND2 GND3 GND4 GND5 VDDEXT1 VDDEXT2 VDDEXT3 VDDEXT4 VDDEXT5 VDDEXT6 VDDEXT7 VDDEXT8 VDDEXT9 VDDFLASH1 VDDFLASH2 VDDINT1 VDDINT2 VDDINT3 VDDINT4 VDDINT5 VDDINT6 VDDINT7 VDDEXT10 VDDEXT11 VDDFLASH3 VDDFLASH VDDFLASH VDDEXT VDDEXT VDDEXT VDDINTVDDINT

0.1UF C43 C44 0.1UF 0402 0402 0.1UF C45 C46 0.1UF 04020402 0.1UF C47C48 0.1UF 04020402 0.1UF C40 C41 0.1UF 0402 C39 0.1UF 04020402 0.1UF C38 AGND 0603 R24 0402 R25 R26 0402 0402 R21 R22 0402 R23 0603 AGND 0805 10PF C68 0603 R68 AGNDAGND R54 0603 C59 10PF 0805 R55 0402 0402 R56 AGND 0603 R57 0805 10PF C61 0402 R58 R59 0402 0402 R60 R61 0402 C64 10PF 0805 R62 0603 AGND 0402 R64 0805 10PF C66 0603 R65 AGND R48 0603 C55 10PF 0805 R49 0402 AGND 0603 R51 0805 10PF C57 0402 R52 R53 0402 R46 0402 C54 10PF 0805 R47 0603 AGND 0402 R43 0805 10PF C52 0603 R44 AGND AGND R41 0603 C49 10PF 0805 R39 0402 0402 R40 0805 10PF C51 C53 10PF 0805 C60 10PF 0805 0805 10PF C62 C56 10PF 0805 0805 10PF C58 0805 10PF C65 C63 10PF 0805 C50 10PF 0805 0805 10PF C67 C69 10PF 0805 0805 10PF C36 C37 0.1UF 0402 U10 AD8022 MSOP8 MSOP8 AD8022 U113 U11 AD8022 MSOP8 U12 AD8022 MSOP8 MSOP8 AD8022 U133 U13 AD8022 MSOP8 MSOP8 AD8022 U123 AGND 0805 10PF C35 C34 10PF 0805 0402 R67 AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND R42 0402 0402 0.1UF C42 0402 R45 0402 R50 R63 0402 R66 0402 R27 10K 0402 R28 10K 0402 R29 10K 0402 R30 10K 0402 R34 10K 0402 R33 10K 0402 R32 10K 0402 R31 10K 0402 R36 10K 0402 R35 10K 0402 R38 10K 0402 R37 10K 0402 AGND ADC BUFFERS 4 1017-12-2009_16:20 D A B C Nashua, NH 03063 A B C D PH: 1-800-ANALOGD C Title Size Board No. Date Sheet of DEVICES ANALOG RevA0226-2009 ADSP-BF506F EZ-KIT LITE 1.0 AD8022 MSOP8 MSOP8 AD8022 U95 MSOP8 AD8022 U143 MSOP8 AD8022 U103 IN_VB1 IN_VB2 VA1 IN_VA1 VB1 VB2 VA2 IN_VA2 VA6 VB6 VB3 VB4 VB5 +AVCC -AVCC VA5 IN_VA3 IN_VB3 IN_VB4 IN_VA4 IN_VA5 IN_VA6 IN_VB6 IN_VB5 VA3 VA4

3.3V 0402 10K R70 SW9 DIP6 SWT017 12456 ON 3.3V C76 0.47UF 0805 AGND 0805 0.47UF C77 330 0805 FER1 C70 0.1UF 0402 C71 10UF 08050402 0.1UF C72 0805 10UF C73C74 10UF 0805 AGND C75 0.1UF 0402 SW10 DIP6 SWT017 12456 ON 0402 10K R69 AGND SWT018 DIP4 SW4 ON 1234 3.3V 3.3V AGND ADC D A B C Nashua, NH 03063 A B C D PH: 1-800-ANALOGD C Title Size Board No. Date Sheet of DEVICES ANALOG RevA0226-2009 ADSP-BF506F EZ-KIT LITE 1.0 JP2 IDC3X1 3.3V DEFAULT=2 & 3 SJ2 JUMPER SHORTING ADSP-BF506F LQFP120_EP 106 107 102 103 105 104 101 122 100A0 AGND1 AGND2 AGND3 AGND4 AGND5 AGND7 AVDD CS DCAPA DCAPBDGND1 DGND2 DOUTA DOUTB RANGE REF_SELECT SCLK SGL/DIFF VA1 VA2 VA3 VA4 VA5 VA6 VB1 VB2 VB3 VB4 VB5 VB6 VDD VDRIVE AGND6 IDC12X2 2423 2221 1817 1615 1413 1211 VR5 AD780 SOIC8 8 3TEMPOP_SEL GND VIN VOUT TRIM C123 0.1UF 0402 C124 10UF 0805 AGND 0402 0.1UF C125 JP6 IDC3X2_SMT SJ7 JUMPER SHORTING PS_5V PS_5V PS_5V ACM_SGLDIFF/SD_D3 ACM_RANGE/SD_D2 ADC_DOUTB/SD_D1 ADC_DOUTA/SD_D0 ACM_A0 ACM_A1 ACM_A2 ADC_SCLK/SD_CLK ADC_CS/SD_CMD IN_VB1 IN_VB1 IN_VB2 IN_VB2 VA1 IN_VA1 IN_VA1 VB1 VB2 VA2 IN_VA2 IN_VA2 VA6 VB6 VB3 VB4 VB5 VA5 IN_VA3 IN_VA3 IN_VB3 IN_VB3 IN_VB4 IN_VB4 IN_VA4 IN_VA4 IN_VA5 IN_VA5 IN_VA6 IN_VA6 IN_VB6 IN_VB6 IN_VB5 IN_VB5 VA3 VA4 AVDD_ADC "ADC INPUTS" "VOLTAGE REFERENCE SELECT" SW4 disconnects the DSP from the ADC "ADC ENABLE" "EXT VREF" "ADC LOOPBACK" SW9 & 10 are only used for POST DEFAULT=NOT INSTALLED DEFAULT=NOT INSTALLED 17-12-2009_16:20 5 10

3.3V 3.3V 3.3V R72 10K 0402 R73 0402 10K C78 100PF 0603 0603 62.0 R74 R75 0603 0603 4700PF C79 R76 62.0 0603 0603 R77 C80 100PF 0603 CON039 0402 0.01UF C81 C82 0.01UF 0402 0603 10K R78 DNP U19 SOIC14 TJA1041 14 9 114 13CANH CANL EN ERR GND INH RXD SPLIT TXD VBAT VDD VIO WAKESTB CAN D A B C Nashua, NH 03063 A B C D PH: 1-800-ANALOGD C Title Size Board No. Date Sheet of DEVICES ANALOG RevA0226-2009 ADSP-BF506F EZ-KIT LITE 1.0 SW5 SWT018 DIP4 ON 1234 PS_5V PS_5V CAN_TX CAN_RX CAN_ERR "CAN" SW5 disconnects the DSP from the CAN IC "CAN ENABLE" 17-12-2009_16:20 6 10

0.01UF 0402 3.3V 3.3V 0402 10K R98R99 10K 0402 3.3V 0402 0.1UF C89 0402 0.1UF C90 U16 SOIC16 ADM3202ARNZ 710 1411 9 8 12 13 1C1+ C1- C2+ C2- R1INR1OUT R2INR2OUT T1IN T1OUT T2IN T2OUT 3.3V CON038 0402 0.1UF C92 3.3V 0805 100 R92 100 0805 R94 MOMENTARY SWT024 SW8 0603 330 R84 0603 330 R85R86 330 0603 R87 330 0603 3.3V 0402 0.01UF C86 R90 0402 10K GREEN LED001 LED5 3.3V C85 0.01UF 0402 R82 0402 10K 3.3V LED001 RED LED1 10K 0402 R79 0402 0.01UF C83 3.3V R89 0402 10K R88 0402 10K 74LVC14A SOIC14 R83 0402 10K YELLOW LED001 LED4 LED001 YELLOW LED3 YELLOW LED001 LED2 SWT024 MOMENTARY SW7 SW3 DIP2 SWT020 ON R81 0402 10K SOIC14 74LVC14A 74LVC14A SOIC14 1011 SOIC14 74LVC14A 1213 3.3V RESET, LEDS, PUSH BUTTONS, UART, SD 7 1017-12-2009_16:20 D A B C Nashua, NH 03063 A B C D PH: 1-800-ANALOGD C Title Size Board No. Date Sheet of DEVICES ANALOG RevA0226-2009 ADSP-BF506F EZ-KIT LITE 1.0 3.3V 10K 0402 R91 10K 0402 R95 1UF 0805 C87 C88 0805 1UF 0603 330 R80 C93 0.01UF 0402 0805 10UF C121 R101 10K 0402 0402 10K R108 CON067

5 CLK

MINI_SD_CLK MINI_SD_CMD MINI_SD_DAT0 MINI_SD_DAT1 MINI_SD_DAT2 MINI_SD_DAT3 VDD1 VDD2 CD WP SSOP20 IDT74FCT3244APY 21A1 1A2 1A3 1A4 1Y1 1Y2 1Y3 1Y4 2A1 2A2 2A3 2A4 2Y1 2Y2 2Y3 2Y4 OE1 OE2 SOIC8 U17 ADM708SARZ 1 8 4PFI RESETMR PFO RESET SWT024 MOMENTARY SW6 SOIC14 74LVC14A SOIC14 74LVC14A SOT23-5 U18 SN74LVC1G08 SN74LVC1G08 U20 SOT23-5 0402 0.01UF C84 3.3V SW1 DIP8 SWT016 8 124567 ON 0.1UF 0402 C91 R137 10K 0402 0402 33R136 RNS003 RN1 107 116 125 134 143 152 161R1A R1B R2A R2B R3A R3B R4A R4B R5A R5B R6A R6B R7A R7B R8A R8B R135 33 0402 0402 10K R134 0402 10K R100 R142 33 0402 0402 33R141 UART0_CTS/SD_D7 UART0_CTS/SD_D7 UART0_RTS/SD_D6 UART0_RTS/SD_D6 UART0_TX/SD_D5 UART0_TX/SD_D5 UART0_RX/SD_D4 UART0_RX/SD_D4 ACM_SGLDIFF/SD_D3 ACM_RANGE/SD_D2 ADC_DOUTB/SD_D1 ADC_DOUTA/SD_D0 LED0 LED1 LED2 PB0 PB1 RESET ADC_SCLK/SD_CLK ADC_CS/SD_CMD SD_CD SD_WP DA_SOFT_RESET CTS CTS "DCE" "UART0 SETUP" "PB2" "PB1" "POWER" "RESET" "PB ENABLE" "RESET" "SD CARD" (UART 0)

3.3V 3.3V 3.3V DMAX_ALT DNP A27 A24 A21 A18 A15 A12 B25 B22 B19 B16 B13 B10 B5A5 B27 B26 A26 A25 B24 B23A23 A22 A20 A19 B18 B17 A17 A16 B15 B14A14 A13 B12 B11A11 A10 B20 B21 A7CLK1+ CLK1- CLK2+ CLK2- D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D5 D6 GND0 GND1 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 DMAX_ALT DNP A27 A24 A21 A18 A15 A12 B25 B22 B19 B16 B13 B10 B5A5 B27 B26 A26 A25 B24 B23A23 A22 A20 A19 B18 B17 A17 A16 B15 B14A14 A13 B12 B11A11 A10 B20 B21 A7CLK1+ CLK1- CLK2+ CLK2- D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D5 D6 GND0 GND1 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 EXPANSION INTERFACE, DMAX 8 1017-12-2009_16:20 D A B C Nashua, NH 03063 A B C D PH: 1-800-ANALOGD C Title Size Board No. Date Sheet of DEVICES ANALOG RevA0226-2009 ADSP-BF506F EZ-KIT LITE 1.0 IDC35X2_SMTA 109 1413 25 26 23 24 21 22 19 20 33 34 31 32 29 30 27 28 3635 6867 70RSVD7 RSVD2 SDA RSVD1 RSVD4 RSVD5 RSVD3 RSVD6 GND6 TIMER2/GPIO TIMER1/GPIO GND1 GND2 GND3 GND4 PWR_IN2 VDDIO1 PPI0D0 PPI0CLK PPI0D1 PPI0D10PPI0D11 PPI0D12PPI0D13 PPI0D14PPI0D15 PPI0D16PPI0D17 PPI0D2PPI0D3 PPI0D4PPI0D5 PPI0D6PPI0D7 PPI0D8PPI0D9 PPI0FS1 PPI0FS2 PPI0FS3 PPI1CLK PPI1D10 PPI1D14 PPI1D16 PPI1D8 TIMER3/GPIO PPI1FS2 PP1D0/PPI0D18 PPI1D2/PPI0D20 PPI1D4/PPI0D22 PPI1D6 PPI1D12 PPI1FS1 PPI1FS3 PPI1D1/PPI0D19 PPI1D3/PPI0D21 PPI1D5/PPI0D23 PPI1D9 RESET PWR_IN1 GND5 3.3V1 3.3V2 VDDIO2 NC PPI1D7 PPI1D13 PPI1D11 PPI1D15 PPI1D17 SCL IDC25X2_SMTA 49 50 103.3V1 3.3V2 DRPRI DRSEC GND1 GND2 GND3 GND4 GND5 GND6 GPIO2 GPIO4 NC RFS RSCLK RSVD1 RSVD3 RSVD5 RSVD7 SDA SPISEL1 SPISEL3 SPISS TFS TIMER UARTCTS UARTRX PWR_IN1 PWR_IN2 VDDIO1 VDDIO2 RSVD9RSVD8 SPISEL2 SPICLK DTPRI TSCLK DTSEC SPIMOSI SPIMISO SCL UARTTX UARTRTS RESET GPIO1 GPIO3 WAKE RSVD2 RSVD4 RSVD6 IDC25X2_SMTA DNP 49 50 103.3V1 3.3V2 DRPRI DRSEC GND1 GND2 GND3 GND4 GND5 GND6 GPIO2 GPIO4 NC RFS RSCLK RSVD1 RSVD3 RSVD5 RSVD7 SDA SPISEL1 SPISEL3 SPISS TFS TIMER UARTCTS UARTRX PWR_IN1 PWR_IN2 VDDIO1 VDDIO2 RSVD9RSVD8 SPISEL2 SPICLK DTPRI TSCLK DTSEC SPIMOSI SPIMISO SCL UARTTX UARTRTS RESET GPIO1 GPIO3 WAKE RSVD2 RSVD4 RSVD6 PS_5VPS_5V PS_5V SDA SDA SDASDA SCL SCL SCLSCL EXT_WAKEEXT_WAKE UART0_CTS/SD_D7 UART0_CTS/SD_D7 UART0_CTS/SD_D7 UART0_RTS/SD_D6 UART0_RTS/SD_D6 UART0_RTS/SD_D6UART0_RTS/SD_D6 UART0_RTS/SD_D6 UART0_TX/SD_D5 UART0_TX/SD_D5 UART0_TX/SD_D5 UART0_RX/SD_D4 UART0_RX/SD_D4 UART0_RX/SD_D4 ACM_SGLDIFF/SD_D3 ACM_SGLDIFF/SD_D3 ACM_RANGE/SD_D2 ACM_RANGE/SD_D2 ADC_DOUTB/SD_D1 ADC_DOUTB/SD_D1 ADC_DOUTB/SD_D1 ADC_DOUTA/SD_D0 ADC_DOUTA/SD_D0 ADC_DOUTA/SD_D0 LED0 LED0 LED0LED0 LED0 LED1 LED1 LED1 LED1 LED1 LED2 LED2 LED2 PB0 PB0 PB0 PB1 PB1 PB1 PF5 PF5 PF5 PF6 PF6 PF6 PF7 PF7 PF7 PF8 PF8 PF8 PF8 PF9 PF9 PF9 PF9 SPI0_MISO SPI0_MISO SPI0_MISO SPI0_MOSI SPI0_MOSI SPI0_MOSI SPI0_SEL1 SPI0_SEL1 SPI0_SEL1 SPI0_SEL1 PF14 PF14 PF14 PF15 PF15 PF15 RESET RESET RESETRESET ACM_A0 ACM_A0 ACM_A1 ACM_A1 ACM_A2 ACM_A2 ADC_SCLK/SD_CLK ADC_SCLK/SD_CLK ADC_SCLK/SD_CLK ADC_CS/SD_CMD ADC_CS/SD_CMD ADC_CS/SD_CMD SD_CD SD_CD SD_CD SD_CD SD_CD SD_CD SD_WP SD_WP SD_WP SD_WP SD_WP PG3 PG3 PG3 CAN_TX CAN_TX CAN_TX CAN_RX CAN_RX CAN_RX CAN_ERR CAN_ERR CAN_ERR SPI0_SCK SPI0_SCK SPI0_SCK SPORT1 SPI0 UART1 SPORT0 SPI1 UART0 PWM1

27.4K 0603 R115 R114 0402 100K C104 0603 1000PF SOD-123FL MBR130LSFT1G 0603 R111 DNP 0603 R110 22000PF 0402 C940603 1UF C96 C105 1UF 0603 DNP 20.0K 0402 R109 3300PF 0603 C95 0805 2.2UF C103 C98 10UF 1210 1210 10UF C97 1210 10UF C100 C102 10UF 1210 1UH IND019 DNP 22UH IND024 R112 0603 4.99K 0603 R113 22UH IND024 MBR130LSFT1G SOD-123FL DUAL POWER REGULATOR 9 1017-12-2009_16:20 D A B C Nashua, NH 03063 A B C D PH: 1-800-ANALOGD C Title Size Board No. Date Sheet of DEVICES ANALOG RevA0226-2009 ADSP-BF506F EZ-KIT LITE 1.0 C99 10UF 1210 IND019 1UH PS_5V +AVCC -AVCC

DA_5V IDC2X1 JP5 IDC2X1 JP4 JP3 IDC2X1 TP2 TP7 1206 0.05 R131 3.3V C118 0.1UF 04020805 2.2UF C119 C120 2.2UF 0805 TP8 DEFAULT=INSTALLLED SJ6 JUMPER SHORTING D10 SK12 DO-214AA ESD5Z2.5T1 SOD-523 MH5 0.125 MH6 0.125 MH7 0.125 1000PF 1206 C116 1000PF 1206 C115 SHGND 1206 FER3 600 FER2 1206 600 SHGND R123 24.9K 0603 C111 470PF 0603 C112 68PF 0603 R124 80.6K 0603 R126 0.05 1206 PGND PGND 0805 4.7UF C113 D2E 220UF CT1 SI4411DY SO-8 IND013 2.5UH C114 10UF 1210 R127 255.0K 0603 VR1 ADP1864AUJZ SOT23-6 3 6 5IN CS PGATEFB COMP GND PGND TP3 1206 0.05 R121 1206 4.3 R116 C106 4.7UF 0603 C107 4.7UF 0603 C108 0.01UF 0402 C109 0.1UF 0402 0402 1.2K R117 R118 2.67K 0402 R119 4.3 1206 0603 4.7UF C110 R120 1.0K 0402 VR3 ADP1715 MSOP8 7GND3 GND4 EN IN OUT ADJ GND1 GND2 FER4 FER002 190 R130 0402 1206 0.05 R125 C117 10UF 1210D7 MBRS540T3G SMC VESD01-02V-GS08 SOD-523 DO-214AA SK12 3.3V TP5 GSOT05 SOT23-3 R122 0.05 1206 SJ4 DEFAULT=INSTALLLED JUMPER SHORTING GSOT03 SOT23-3 MBRS540T3G SMC COPPER 10K 0402 R129 DNP R128 0402 10K PGND 10K 0402 R133 TP4 TP6 SJ3 DEFAULT=INSTALLED JUMPER SHORTING VR4 ADP1715 MSOP8 8GND4 GND3 GND2 EN OUT GND1 IN SS POWER 1017-12-2009_16:20 10 D A B C Nashua, NH 03063 A B C D PH: 1-800-ANALOGD C Title Size Board No. Date Sheet of DEVICES ANALOG RevA0226-2009 ADSP-BF506F EZ-KIT LITE 1.0 FUS004 DEFAULT=INSTALLLED SJ5 JUMPER SHORTING 3.3V CON045 POWER MSOP10 AD5258 10A AD0 AD1 B GND SCL SDA VCC VLOGIC W MH8 0.125 MH1 0.156 MH2 0.156 MH3 0.156 MH4 0.156 VDDFLASH PS_5V PS_5V PS_5V SDA SCL VDDEXT VDDINT EXT_WAKE DA_USB_PWR EXT_PS 1.8V @ 500mA "VDDFLASH" 3.3V @ 2A "5V" 1.1 - 1.4V @ 500mA "VDDINT" "VDDEXT" Remove JP3 when measuring VDDEXT Remove JP5 when measuring VDDFLASH Remove JP4 when measuring VDDINT

ADSP-BF506F EZ-KIT Lite Evaluation System Manual I-1 II N D E X A ADC enable switch (SW4), 2-9 ADC input connector (P7), 2-19 ADC loopback switches (SW9-10), 2-10 ADC voltage ref (JP6), 2-13 architecture, of this EZ-KIT Lite, 2-2 audio codec enable switch (SW4), 2-9 input connector (P7), 2-19 loopback switches (SW9-10), 2-10 B background telemetry channel (BTC), 1-13 bill of materials, A-1 board schematic (ADSP-BF506F), B-1 boot modes, 2-8 mode select switch (SW2), 2-8 C CAN interface connector (J2), 2-17 enable switch (SW5), 2-9 clock in (CLK IN) signal, 2-3 configuration, of this EZ-KIT Lite, 1-3 connectors diagram of locations, 2-16 J1 (RS-232), 2-17 J2 (CAN), 2-17 J3 (SD), 2-17 P2 (expansion), 2-18 P3 (expansion), 2-18 P4 (expansion), 2-18 P5-6 (land grid array), 2-19 P7 (ADC input), 2-19 P9 (power), 1-4, 2-19 contents, of this EZ-KIT Lite package, 1-2 customer support, xiv D default configuration, of this EZ-KIT Lite, 1-3 design reference info, 1-14 DIP switch (SW3), 2-9, 2-10 DMAX land grid array connectors (P5-6), 2-19 E example programs, 1-13 expansion interface, 1-11, 2-18 external memory, 1-8 F flag pins, See programmable flags by name (PFx, PGx, and PHx)

I-2 ADSP-BF506F EZ-KIT Lite Evaluation System Manual G general-purpose IO pins (GPIO), 1-10, 2-9, 2-15 general-purpose push buttons (PB0-1), 1-10 I installation, of this EZ-KIT Lite, 1-3 internal flash memory interface, 1-8 IO voltage, 2-2 J JTAG interface, 1-10 connector (P1), 1-4, 1-10, 2-17 jumpers diagram of locations, 2-11 JP1 (SPI flash enable), 2-11 JP2 (voltage reference select), 2-12 JP3 (VDDEXT power), 2-12 JP4 (VDDINT power), 2-12 JP5 (VDDFLASH power), 2-12 JP6 (ADC voltage ref), 2-13 L LEDs diagram of locations, 2-14 LED1 (reset), 2-15 LED5 (power), 2-15 LED8 (reset), 2-15 license restrictions, x, 1- M Media Instruction Set Computing (MISC), ix memory map, of this EZ-KIT Lite, 1-7 Micro Signal Architecture (MSA), ix N notation conventions, xviii P package contents, 1-2 PF0-2 (IO) signals, 2-3, 2-15 PF3-15 signals, 2-3 PG0-15 signals, 2-5 PH0-2 signals, 2-6 power connector (P9), 1-4, 2-19 LED (LED5), 2-15 measurements, 1-12 power-on-self test (POST), 1-9 programmable flag (PF) inputs PF3-4, 1-10 push buttons (SW7-8), 2-10 R Reduced Instruction Set Computing (RISC), ix reset LEDs (LED1), 2-15 push button (SW6), 2-9 restriction, of the evaluation license, 1-7 RS-232 connector (J1), 2-17 S schematic, of ADSP-BF506F EZ-KIT Lite, B-1 SD connector (J3), 2-17 SPI flash memory interface, 1-9 CS enable jumper (JP1), 2-11 SRAM memory, 1-7 See also memory map startup, of this EZ-KIT Lite, 1-5 SW1 (UART setup) switch, 2-8 SW2 (boot mode select) switch, 2-8

ADSP-BF506F EZ-KIT Lite Evaluation System Manual I-3 Index SW3 (push button enable) DIP switch, 1-10, 2-9, 2-10 SW4 (ADC enable) switch, 2-9 SW5 (CAN enable) switch, 2-9 SW6 (reset) push button, 2-9 SW9-10 (ADC) loopback switches, 2-10 switches, diagram of locations, 2-7 system architecture, of this EZ-KIT Lite, 2-2 U UART setup switch (SW1), 2-8 V VDDEXT, 1-12 pin, 1-12 power jumper (JP3), 2-12 VDDFLASH, 1-12 pin, 1-12 power jumper (JP5), 2-12 VDDIN pin, 1-12 VDDINT power jumper (JP4), 2-12 programmable regulator, 1-12 very-long instruction word (VLIW), ix VisualDSP++ environment, 1-5 voltage reference select jumper (JP2), 2-12 values, 1-12