MIC502_11 MICREL | Alldatasheet
Document overview
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- PDF pages: 15
Technical content
Features
- Temperature-proportional fan speed control
- Low-cost, efficient PWM fan drive
- 4.5V to 13.2V IC supply range
- Controls any voltage fan
- Overtemperature detection with fault output
- Integrated fan startup timer
- Automatic user-specified sleep mode
- Supports low-cost NTC/PTC thermistors
- 8-pin DIP and SOIC packages
Applications
- NLX and ATX power supplies
- Personal computers
- File servers
- Telecom and networking hardware
- Printers, copiers, and office equipment
- Instrumentation
- Uninterruptible power supplies
- Power amplifiers Typical Application VT1 CF VSLP GND VDD OUT OTF VT2 R1T1 CF 12V RBASE Overtemperature Fault Output MIC502 Secondary Fan-contro l Input Fan
Micrel, Inc. MIC502 November 2006 2 M9999-112206
Ordering Information
Part Number Temperature Range Package Lead Finish MIC502BN –40° to +85°C 8-Pin Plastic DIP Standard MIC502YN –40° to +85°C 8-Pin Plastic DIP Pb-Free MIC502BM –40° to +85°C 8-Pin SOIC Standard MIC502YM –40° to +85°C 8-Pin SOIC Pb-Free Pin Configuration VDD OUT OTF VT2 VT1 CF VSLP GND 8-Pin SOIC (M) 8-Pin DIP (N) Pin Description Pin Number Pin Name Pin Function
1 VT1 Thermistor 1 (Input): Analog input of approximately 30% to 70% of VDD
produces active duty cycle of 0% to 100% at driver output (OUT). Connect to external thermistor network (or other temperature sensor). Pull low for shutdown.
2 CF PWM Timing Capacitor (External Component): Positive terminal for the PWM
triangle-wave generator timing capacitor. The recommended CF is 0.1µF for 30Hz PWM operation. 3 VSLP Sleep Threshold (Input): The voltage on this pin is compared to VT1 and VT2. When VT1 < VSLP and VT2 < VSLP the MIC502 enters sleep mode until VT1 orVT2 rises above VWAKE. (VWAKE = VSLP + VHYST). Grounding VSLP disables the sleep- mode function. 4 GND Ground.
5 VT2 Thermistor 2 (Input): Analog input of approximately 30% to 70% of VDD
produces active duty cycle of 0% to 100% at driver output (OUT). Connect to motherboard fan control signal or second temperature sensor. 6 /OTF Overtemperature Fault (Output): Open-collector output (active low).Indicates overtemperature fault condition (VT1 > VOT) when active. 7 OUT Driver Output: Asymmetrical-drive active-high complimentary PWM output. Typically connect to base of external NPN motor control transistor. 8 VDD Power Supply (Input): IC supply input; may be independent of fan power supply.
Micrel, Inc. MIC502 November 2006 3 M9999-112206 Absolute Maximum Ratings(1) ESD Rating(3) Operating Ratings(2) Power Dissipation at 25°C Derating Factors
Electrical Characteristics
4.5V ≤ VDD ≤ 13.2V, Note 4; TA = 25°C, bold values indicate –40°C ≤ TA < +85°C, unless noted. Symbol Parameter Condition Min Typ Max Units IDD Supply Current, Operating VSLP = GND, OTF, OUT = open, CF = 0.1µF, VT1 = VT2 = 0.7 VDD 1.5 mA IDD(slp) Supply Current, Sleep VT1 = GND, VSLP, OTF, OUT = open, CF = 0.1µF 500 µA Driver Output tR Output Rise Time, Note 5 IOH = 10mA 50 µs tF Output Fall Time, Note 5 IOL = 1mA 50 µs IOL Output Sink Current V OL = 0.5V 0.9 mA 4.5V ≤ VDD ≤ 5.5V, VOH = 2.4V 10 mA IOH Output Source Current 10.8V ≤ VDD ≤ 13.2V, VOH = 3.2V 10 mA IOS Sleep-Mode Output Leakage V OUT = 0V 1 µA Thermistor and Sleep Inputs VPWM(max) 100% PWM Duty Cycle Input Voltage 67 70 73 %VDD VPWM(span) V PWM(max) – VPWM(min) 37 40 43 %VDD VHYST Sleep Comparator Hysteresis 8 11 14 %VDD VIL VT1 Shutdown Threshold 0.7 V VIH VT1 Startup Threshold 1.1 V VOT VT1 Overtemperature Fault Threshold Note 6 74 77 80 %VDD IVT, IVSLP VT1, VT2, VSLP Input Current –2.5 1 µA tRESET Reset Setup Time minimum time VT1 < VIL, to guarantee reset, Note 5 30 µs Oscillator 4.5V ≤ VDD ≤ 5.5V, CF = 0.1µF 24 27 30 Hz f Oscillator Frequency, Note 7 10.8V ≤ VDD ≤ 13.2V, CF = 0.1µF 27 30 33 Hz fMIN, fMAX Oscillator Frequency Range Note 7 15 90 Hz tSTARTUP Startup Interval 64/f S
- Exceeding the absolute maximum rating may damage the device.
- The device is not guaranteed to function outside its operating rating.
- Devices are ESD sensitive. Handling precautions recommended.
correspond to nominal VDD of 5V and 12V, respectively.
- VOT is guaranteed by design to always be higher than VPWM(max).
- Logic time base and PWM frequency. For other values of CF, f(Hz) = 30Hz C
Figure 1. Typical System Behavior Note A. Output duty-cycle is initially determined by V T1, as it is greater than VT2. Note B. PWM duty-cycle follows V T1 as it increases. Note C. V T1 drops below VT2. VT2 now determines the output duty-cycle. Note D. The PWM duty-cycle follows V T2 as it increases. Note E. Both V T1 and VT2 decrease below VSLP but above VIL. The device enters sleep mode. high for 64 clock periods. (VWAKE = VSLP + VHYST. See “Electrical Characteristics”). Note G. Following the startup interval, the PWM duty-cycle is the higher of V T1 and VT2.
Figure 2. MIC502 Typical Power-Up System Behavior Note I. The PWM duty-cycle follows the higher of VT1 and VT2, in the case, VT1. Note J. The PWM duty-cycle follows VT1 as it increases. Note K. PWM duty-cycle is 100% (OUT constantly on) anytime VT1 > VPWM(max). Note L. /OTF is asserted anytime VT1 > VOT. (The fan continues to run at 100% duty-cycle). Note M. /OTF is deasserted when VT1 falls below VOT; duty-cycle once again follows VT1. normal operation continues. (Both VT1 and VT2 must be below VSLP to active sleep mode). Note O. All functions cease when VT1 < VIL; this occurs regardless of the state of VT2.
Micrel, Inc. MIC502 November 2006 6 M9999-112206 Typical Characteristics 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 2 4 6 8 1 01 21 4 I DD )Am( VDD (V) Supply Current vs. Supply Voltage 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20 0246 8 1 0 1 2 1 4 V LO )V( VDD (V) VOL vs. Supply Voltage IOL = 0.9mA 0246 8 1 0 1 2 1 4 V LO )Vm( VDD (V) VOL vs. Supply Voltage IOL = 100 µA 0.05 0.10 0.15 0.20 0.25 - 4 0 - 2 00 2 04 06 08 0 1 0 0 V LO )V( TEMPERATURE (°C) VOL vs. Temperature VDD =12V VDD = 5V 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 - 4 0 - 2 00 2 04 06 08 0 1 0 0 I DD )Am( TEMPERATURE (°C) Supply Current vs. Temperature VDD = 12V VDD = 5V 0.05 0.1 0.15 0.2 0.25 0.3 - 4 0 - 2 00 2 04 06 08 0 1 0 0 DDI PEELS )Am( TEMPERATURE (°C) IDDSLEEP vs. Temperature VDD = 12V VDD = 5V 0.5 1.5 2.5 3.5 0246 8 1 0 1 2 1 4 V HO )V( VDD (V) VOH vs. Supply Voltage IOH = 10mA 0.5 1.5 2.5 3.5 4.5 0246 8 1 0 1 2 1 4 V HO )V( VDD (V) VOH vs. Supply Voltage IOH = 100 µA 0.5 1.5 2.5 3.5 4.5 - 4 0 - 2 00 2 04 06 08 0 1 0 0 V HO )V( TEMPERATURE (°C) VOH vs. Temperature VDD = 12V VDD = 5V
Micrel, Inc. MIC502 November 2006 7 M9999-112206 Typical Characteristics (cont.) -40 -20 0 20 40 60 80 100V )XAM(MWP )V( TEMPERATURE (°C) VPWM(max) vs. Temperature VDD =12V VDD = 5V 0 2 4 6 8 1 01 21 4 V TO )V( VDD (V) VOT vs. Supply Voltage 100 1000 3000 0.001 0.01 0.1 1 )zH(YCNEUQERF CAPACITANCE (µF) PWM Frequency vs . Timing Capacitor Value 0.2 0.4 0.6 0.8 1.2 -40 -20 0 20 40 60 80 100 F MWP )DEZILAMRON( TEMPERATURE (°C) PWM Frequency (normalized) vs. Temperature VDD = 12V VDD = 5V -40 -20 0 20 40 60 80 100 V TO )V( TEMPERATURE (°C) VOT vs. Temperature VDD = 12V VDD = 5V
Micrel, Inc. MIC502 November 2006 8 M9999-112206 Functional Diagram Oscillator Start-Up Timer CLK R ESET OUT VT2 VT1 CF OTF OUT Driver GND VSLP Power-On Reset ENABLE Sleep Control VDD Overtemperature Reset Sleep Bias VIL PWM
will not be affected by changes in the supply voltage. by design to always be higher than VPWM(max). be activated if the system temperature rises. T1 or VT2 rises above VWAKE.
- A complete reset occurs when power is applied.
- OUT is off (low) and /OTF is inactive (high/floating).
- If V T1 < VIL, the MIC502 remains in shutdown.
- The startup interval begins. OUT will be on (high) for 64 clock cycles (64 × tPWM).
- Following the startup interval, normal operation begins. Reset Startup Timer; Deassert /OTF; OUT Off (Low) . VT1 >V OT POWER ON VT1 <V IL NO NO OUT Held On (High) During Startup Interval. Startup Interval Finished Deassert OUT (OUT = Low) YES NO Assert /OTF While VT1 >V OT NORMAL OPERATION YES YES
Figure 3. Power-Up Behavior
Micrel, Inc. MIC502 November 2006 12 M9999-112206 Design Example The thermistor-resistor interface network is shown in the Typical Application drawing. The following example describes the design proce ss: A thermistor datasheet specifies a thermistor that is a candidate for this design as having an R25 resistance of 100k Ω. The datasheet also supports calculation of resistance at arbitrary tem- peratures, and it was discovered the candidate thermistor has a resistance of 13.6k at 70°C (R70). Accuracy is more important at the higher temperature end of the operating range (70°C) than the lower end because we wish the overtemperature fault output (/OTF) to be reasonably accurate — it may be critical to operating a power supply crow bar or other shutdown mechanism, for example. The lower temperature end of the range is less important because it simply establishes minimum fan speed, which is when less cooling is required. Referring to the “Typical Application,” the following approach can be used to design the required thermistor interface network: let R1 = ∞ R T1 = 13.6k (at 70°C) and V T = 0.7VDD (70% of VDD) since () R2R1||R R2VV DD T + () R2R R20.7 T1 += 0.7R T1 + 0.7R2 = R2 0.7R T1 = 0.3R2 and R2 = 2.33R T1 = 2.33 × 13.6k = 31.7k ≈ 33k Let’s continue by determi ning what the temperature- proportional voltage is at 25°C. let R1 = ∞ and R T1 = 100k (at 25°C). from () R2R R2VV DD T + () 33k100k 33kVV DD T + V T = 0.248VDD Recalling from above discussion that the desired V T for 25°C should be about 40% of V DD, the above value of 24.8% is far too low. This would produce a voltage that would stop the fan (recall from the above that this occurs when V T is about 30% of V DD. To choose an appropriate value for R1 we need to learn what the parallel combination of RT1 and R1 should beat 25°C: again () R2R1||R R2VV DD T + () R2R1||R R20.4 T1 += and R T1 || R1 = 1.5R2 = 1.5 × 33k = 49.5k since R T1 = 100k and R T1 || R1 = 49.5k ≈ 50k let R1 = 100k While that solves the low te mperature end of the range, there is a small effect on t he other end of the scale. The new value of V T for 70°C is 0.734, or about 73% of V DD. This represents only a 3% shift from the design goal of 70% of VDD. In summary, R1 = 100k, and R2 = 33k. The candidate thermistor used in this design example is the RL2010-54.1K-138-D1, manufactured by Keystone Thermometrics. The R25 resistance (100k Ω) of the chosen thermistor is probably on the high side of the range of potential thermistor resistances. The result is a moderately high- impedance network for connecting to the V T1 and/or V T2 input(s). Because these input s can have up to 1µA of leakage current, care must be taken if the input network impedance becomes higher t han the example. Leakage current and resistor accuracy could require consideration in such designs. Note that the V SLP input has this same leakage current specification. Secondary Fan-Control Input The above discussions also apply to the secondary fan- control input, V T2, pin 5. It is possible that a second thermistor, mounted at another temperature-critical location outside the power supply, may be appropriate. There is also the possibilit y of accommodat ing the NLX “FanC” signal via this input. If a second thermistor is the desired solution, the V T2 input may be treated exactly like the V T1 input. The above discussions then apply directly. If, however, the NLX FanC signal is to be
Micrel, Inc. MIC502 November 2006 14 M9999-112206
Package Information
0–8 0.244 (6.20) 0.228 (5.79) 0.197 (5.0) 0.189 (4.8) SEATIN G P LAN E 0.026 (0.65) MAX) 0.010 (0.25) 0.007 (0.18) 0.064 (1.63) 0.045 (1.14) 0.0098 (0.249) 0.0040 (0.102) 0.020 (0.51) 0.013 (0.33) 0.157 (3.99) 0.150 (3.81) 0.050 (1.27) TYP PIN 1 DIMENSIONS: INCHES (MM) 0.050 (1.27) 0.016 (0.40) 8-Pin SOIC (M) 0.380 (9.65) 0.125 (3.18) PIN 1 DIMENSIONS: INCH (MM) 0.018 (0.57) 0.100 (2.54) 0.013 (0.330) 0.010 (0.254) 0.300 (7.62) 0.255 (6.48) 0.245 (6.22) 0.380 (9.65) 0.320 (8.13) 0.0375 (0.952) 0.130 (3.30) 8-Pin Plastic DIP (N)
Micrel, Inc. MIC502 November 2006 15 M9999-112206 MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believ ed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life suppo rt devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significan t injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2003 Micrel, Incorporated.