MIC4101BM

MIC4100 MICREL | Alldatasheet

Document overview

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Technical content

Features

• Bootstrap supply max voltage to 118V DC
• Supply voltage up to 16V
• Drives high- and low-side N-Channel MOSFETs with independent inputs
• CMOS input thresholds (MIC4100)
• TTL input thresholds (MIC4101)
• On-chip bootstrap diode
• Fast 30ns propagation times
• Drives 1000pF load with 10ns rise and fall times
• Low power consumption
• Supply under-voltage protection
• 3 Ω pull up , 3Ω pull down output resistance
• Space saving SOIC-8L package
• –40 °C to +125°C junction temperature range

Applications

• High voltage buck converters
• Push -pull converters
• Full- and half-bridge converters
• Active clamp forward converters Typical Application HI MIC4100 SO-8PWM Controller LI HO HS LO HBVDD 9V to 16V Bias 100V Supply GND VOUT 100V Buck Regulator Solution

Micrel, Inc. MIC4100/1 March 2006 2 M9999-031506

Ordering Information

Standard Pb-Free Input Junction Temp. Range Package MIC4100BM MIC4100YM CMOS –40° to +125°C SOIC-8L MIC4101BM MIC4101YM TTL –40° to +125°C SOIC-8L Pin Configuration 1VDD HB HO HS 8L O VSS LI HI SOIC-8L (M) Pin Description Pin Number Pin Name Pin Function 1 VDD Positive Supply to lower gate drivers. Decouple this pin to VSS (Pin 7). Bootstrap diode connected to HB (pin 2). 2 HB High-Side Bootstrap supply. External bootstrap capacitor is required. Connect positive side of bootstrap capacitor to this pin. Bootstrap diode is on-chip. 3 HO High-Side Output. Connect to gate of High-Side power MOSFET. 4 HS High-Side Source connection. Connect to source of High-Side power MOSFET. Connect negative side of bootstrap capacitor to this pin. 5 HI High-Side input. 6 LI Low-Side input. 7 VSS Chip negative supply, generally will be ground. 8 LO Low-Side Output. Connect to gate of Low-Side power MOSFET.

Micrel, Inc. MIC4100/1 March 2006 3 M9999-031506 Absolute Maximum Ratings(1) Operating Ratings(2) Junction Thermal Resistance Electrical Characteristics(4) VDD = VHB = 12V; VSS = VHS = 0V; No load on LO or HO; TA = 25°C; unless noted. Bold values indicate –40°C< TJ < +125°C. Parameter Symbol Condition Min Typ Max Units Supply Current VDD Quiescent Current IDD LI = HI = 0V 40 150 200 µA VDD Operating Current IDDO f = 500kHz 2.5 3.4 mA Total HB Quiescent Current IHB LI = HI = 0V 25 150 200 µA Total HB Operating Current IHBO f = 500kHz 1.4 2.5 3 mA HB to VSS Current, Quiescent IHBS VHS = VHB = 110V 0.05 1 µA HB to VSS Current, Operating IHBSO f = 500kHz 10 µA Input Pins: MIC4100 (CMOS Input ) Low Level Input Voltage Threshold VIL 5.3 V High Level Input Voltage Threshold VIH 5.7 7 8 V Input Voltage Hysteresis VIHYS 0.4 V Input Pulldown Resistance RI 100 200 500 KΩ Input Pins: MIC4101 (TTL) Low Level Input Voltage Threshold VIL 0.8 1.5 V High Level Input Voltage Threshold VIH 1.5 2.2 V Input Pulldown Resistance RI 100 200 500 KΩ

Micrel, Inc. MIC4100/1 Parameter Symbol Condition Min Typ Max Units Under Voltage Protection VDD Rising Threshold VDDR 6.5 7.4 8.0 V VDD Threshold Hysteresis VDDH 0.5 V HB Rising Threshold VHBR 6.0 7.0 8.0 V HB Threshold Hysteresis VHBH 0.4 V Bootstrap Diode Low-Current Forward Voltage VDL IVDD-HB = 100µA 0.4 0.55 0.70 V High-Current Forward Voltage VDH IVDD-HB = 100mA 0.7 0.8 1.0 V Dynamic Resistance RD IVDD-HB = 100mA 1.0 1.5 2.0 Ω LO Gate Driver Low Level Output Voltage VOLL ILO = 100mA 0.22 0.3 0.4 V High Level Output Voltage VOHL ILO = -100mA, VOHL = VDD - VLO 0.25 0.3 0.45 V Peak Sink Current IOHL VLO = 0V 2 A Peak Source Current IOLL VLO = 12V 2 A HO Gate Driver Low Level Output Voltage VOLH IHO = 100mA 0.22 0.3 0.4 V High Level Output Voltage VOHH IHO = -100mA, VOHH = VHB – VHO 0.25 0.3 0.45 V Peak Sink Current IOHH VHO = 0V 2 A Peak Source Current IOLH VHO = 12V 2 A March 2006 4 M9999-031506

Micrel, Inc. MIC4100/1 Parameter Symbol Condition Min Typ Max Units Switching Specifications Lower T urn-Off Propagatio n Delay (LI Falling to LO Falling) tLPHL (MIC4100) 27 45 ns Upper T urn-Off Propagatio n Delay (HI Falling to HO Falling) tHPHL (MIC4100) 27 45 ns Lower T urn-On Propag ation Delay (LI Rising to LO Rising) tLPLH (MIC4100) 27 45 ns Upper T urn-On Propag ation Delay (HI Rising to HO Rising) tHPLH (MIC4100) 27 45 ns Lower T urn-Off Propagatio n Delay (LI Falling to LO Falling) tLPHL (MIC4101) 31 55 ns Upper T urn-Off Propagatio n Delay (HI Falling to HO Falling) tHPHL (MIC4101) 31 55 ns Lower T urn-On Propag ation Delay (LI Rising to LO Rising) tLPLH (MIC4101) 31 55 ns Upper T urn-On Propag ation Delay (HI Rising to HO Rising) tHPLH (MIC4101) 31 55 ns Delay Matching: Lower Turn-On and Upper Turn-Off tMON 3 8 10 ns Delay Matching: Lower Turn-Off and Upper Turn-On tMOFF 3 8 10 ns Either Output Rise/Fall Time tRC , tFC CL = 1000pF 10 ns Either O utput Rise/F all T ime (3V to 9V) tR , tF CL = 0.1µF 0.4 0.6 0.8 µs Minimum Input Pulse Width that Changes the Output tPW Note 6 50 ns Bootstrap Di ode T urn-On or Turn-Off Time tBS 10 ns Notes: 1. Exceeding the absolute maximum rating may damage the device. 2. The device is not guaranteed to function outside its operating rating. 4. Specification for packaged product only. 5. All voltages relative to pin7, VSS unless otherwise specified 6. Guaranteed by design. Not production tested. March 2006 5 M9999-031506

Micrel, Inc. MIC4100/1 Timing Diagrams tHPLH tLPLH HI, LI HO,LO LI HI LO HO tHPLH tLPLH tMON tMOFF Note: All propagation delays are measured from the 50% voltage level. March 2006 6 M9999-031506

Micrel, Inc. MIC4100/1 Typical Characteristics March 2006 7 M9999-031506

Micrel, Inc. MIC4100/1 Typical Characteristics (cont.) March 2006 8 M9999-031506

Figure 1. MIC4100 Functional Block Diagram

Micrel, Inc. MIC4100/1 Functional Description The MI C4100 is a high voltage, non-inverting, dual MOSFET dri ver that is desig ned to indep endently drive both hig h-side and l ow-side N-Chan nel MOSFET s. The block diagram of the MIC4100 is shown in Figure 1. Both drivers contain an input buffer with hysteresi s, a UVLO ci rcuit and an out put buffer. The high -side output buffer incl udes a hig h sp eed level-shif ting circuit that is referenced to the HS pin. An internal diode is used as part of a b ootstrap ci rcuit to provide th e drive voltage fo r the high-side output. Startup and UVLO The UVL O circuit force s the driver output low until the supply voltage exceeds the UVLO threshold. The low-side UVLO circuit monitors the voltage bet ween the VDD and VSS pins. The high-side UVLO circuit m onitors the voltage between the HB and HS pins. Hysteresis in the UVLO circuit p revents n oise an d finite circuit impeda nce from causing chatter during turn-on. Input Stage The MIC4 100 and MIC4 101 have different input stages, which let s these pa rts cover a wide ra nge of drive r applications. Both the HI a nd LI pins are referenced to the VSS pin. The voltage state of the input signal does not change the quiescent current draw of the driver. The MIC41 00 has a high impedan ce, CMOS comp atible input ran ge and is reco mmended for applicatio ns where the input si gnal is noi sy or where the input sig nal swings the full range of voltag e (fro m Vd d to Gnd ). T here is typically 400mV of hysteresis on the in put pins throughout the VDD range. Th e hy steresis imp roves noise i mmunity and prevents input signals with slow rise times from falsely triggering th e outp ut. T he th reshold voltage of the MIC4100 varies p roportionally with the VDD supply voltage. The amplitude of the input signal affects the VDD supply current. Vin voltages th at are a di ode dro p le ss th an the VDD supply voltage will cause an increase in the VDD pi n current. The grap h in Figure 2 shows the t ypical dependence between IVDD and Vin for Vdd=12V. Figure 2 The MIC410 1 ha s a TTL com patible i nput rang e a nd i s recommended for use with inputs signals whose amplitude is less than the supply voltage. The threshold le vel is independent of the VDD supply voltag e and the re is no dependence betwe en IVDD and the inp ut signal amplitude with the MIC4101. Thi s feat ure m akes the MIC4 101 an excellent level translator t hat will drive high threshold MOSFETs from a low voltage PWM IC. Low-Side Driver A block dia gram of the low-si de driver is sho wn in Figure 3. The low-si de driver is d esigned to drive a groun d (Vss pin) refe renced N-cha nnel MOSF ET. Low driver impedances allow the ext ernal M OSFET to be turned on and off quickly. The rail-to-rail drive capability of the output ensures a low Rdson from the external MOSFET. A high level applied to LI pi n causes the upper driver fet to turn o n a nd Vdd voltag e is applied t o the gate of the external MOSFET. A low level on th e LI pin tu rns off the upper driver and turns on the low side driver to ground the gate of the external MOSFET. March 2006 10 M9999-031506

Micrel, Inc. MIC4100/1 March 2006 12 M9999-031506

Application Information

Power Dissipation Considerations Power dissipation in the driver can be separated into three areas:

• Internal diode dissipation in the bootstrap circuit
• Internal driver dissipation
• Quiescent current dissipation used to supply the internal logic and control functions. Bootstrap Circuit Power Dissipation Power dissipation of the i nternal bootstrap diode primarily comes fro m the averag e cha rging curre nt of the C B capacitor tim es the fo rward voltage drop of the diode. Secondary source s of di ode po wer dissipation a re the reverse le akage current and reverse recovery effe cts of the diode. The avera ge current dra wn by repe ated cha rging of the high-side MOSFET is calculated by: frequency switching drive gate Vat ChargeGateTotalQ:where HBgate S SgateAVEF f fQI The average power dissipated by the forward voltage drop of the diode equals: drop voltageforward DiodeV:where F ×= FAVEFfwd VIPdiode The va lue of V F should be taken at the pea k current through the diode, ho wever, this cu rrent is difficult to calculate because of diffe rences in source imp edances. The peak current ca n either be me asured or the val ue of VF at the average current can be used and will yield a good approximation of diode power dissipation. The reverse leakage current of the internal bootstrap diode is typically 1 1uA at a re verse voltage of 100V and 125C. Power dissipation due to reverse leakage is typically much less than 1mW and can be ignored. Reverse recovery time is the time re quired for the injected minority ca rriers to be swept away from the depletion region during turn-off of th e diode. Power dissipation due to reverse re covery can b e cal culated by computin g the average reve rse current d ue to reverse re covery charg e times the reverse voltage across the diode. The average reverse current and power di ssipation du e to revers e recovery can be estimated by: TimeRecovery Reverse t CurrentRecovery ReversePeak I:where 5.0 rr RRM ×××= REVAVERRRR SrrRRMAVERR VIPdiode ftII The total diode power dissipation is: RRfwdtotal PdiodePdiodePdiode += An optional e xternal bootstrap diode may be used in stead of the inte rnal diode (Figure 6). An external diode may be useful if high gate charge MOSFETs are being driven and the power dissipation of the internal diode is contributing to excessive die tempe ratures. Th e volt age d rop of the external diode must be le ss than the int ernal diode for this option to work. The reverse voltage across the diod e will be e qual to the inp ut voltage mi nus the Vdd supply voltage. A 100V Schottky diode will work for most 72Vinput telecom applications. The above equations can be used to calculate power dissipation in the external diode, however, if the external diode h as si gnificant reverse leaka ge current, the powe r dissipated in that dio de due to reverse leakage can be calculated as: supplypower theoffrequency switching fs / t CycleDuty D Voltage Reverse DiodeV T and Vat flowcurrent ReverseI:where )1( ON REV JREVR −××= S REVRREV f DVIPdiode The on-time is the time th e high-side switch is conducting. In most po wer supply to pologies, the diode i s re verse biased during the switching cycle off-time.

Micrel, Inc. MIC4100/1 March 2006 14 M9999-031506 The power dissipated inside the MIC4100/1 is equal to the circuit drive gate theoffrequency switching theis fs MOSFET on the voltagesource togate theis Vgs Vgsat charge gate total theis Qg off andon MOSFET theswitchingby dissipatedpower theis P cycle switchingper dissipatedenergy theis E Qg QgE driver driver dirver where fsVP and V gsdriver gs ××= ratio of Ron & Roff to the external re sistive losse s in Rg and Rg_fet. Letting Ron =Roff, t he power dissipated in the MIC4100 due to driving the external MOSFET is: fetRgRgRon RonPPdiss driverdrive _++= Supply Current Power Dissipation s ipated by the MIC4100 due to supply Total power dissipation and Thermal Considerations s The di e tem perature may be calcula ted on ce th e total Power is dissipate d in the MIC4100 even if is there i nothing bei ng driven. The suppl y current is drawn b y th e bias for the internal circuitry, the level shifting circuitry and shoot-through current i n the output drivers. The sup ply current is proportional to operating frequency and the Vdd and Vhb voltages. The ty pical characteristic graphs show how su pply current varie s with switch ing fre quency and supply voltage. The po wer diss current is IhbVhbIddVddPdiss ply ×+×=sup Total power dissipation in the MIC410 0 or MIC41 01 i equal to the po wer di ssipation caused by d riving the external M OSFETs, the supply cu rrent and the i nternal bootstrap diode. totaldriveplytotal PdiodePdissPdissPdiss ++= sup power dissipation is known. JAtotalAJ PdissTT θ×+= C/W)(air ambient ojunction t from resistance thermal theis θ MIC4100/1 theofn dissipatiopower theis Pdiss C)( emperaturejunction t theis T mperatureambient te maximum theis T JC total J A where Propagation Delay and Delay Matching and other Timing Considerations Propagation delay a nd sig nal timi ng i s an i mportant t only to mi nimize propagation time between the control e or a t is less than the minimum pulse width may ime required for the C B ed for both th e lo w side (Vdd) a nd high side (HB) su pply pi ns. The se capa citors external consideration in a high performance power supply. The MIC4100 i s designed no delay but to minimize the mi smatch in delay betwe en the high-side and low-side drivers. Fast propagation delay between the input and output drive waveform is desi rable. It improve s ove rcurrent prot ection by decrea sing the re sponse signal a nd the M OSFET gate drive. Minimizing propagation delay al so minimizes phase shift errors in power supplies with wide bandwidth control loops. Many po wer su pply topologi es u se two swit ching MOSFETs operating 18 0º out of pha se from ea ch other. These M OSFETs mu st n ot be on at th e same tim short ci rcuit will occur, causi ng hi gh peak current s and higher po wer dissipatio n i n the MOSF ETs. The MIC4100 and MI C4101 output gate drive rs are not de signed with anti-shoot-through prote ction circuitry. The outp ut d rives signals simply follow the i nputs. The power supply design must include timing delays (dead-time) between the input signals to prevent sho ot-through. The MIC41 00 & MIC4101 drivers specify delay matching between the two drivers to h elp imp rove power supply perfo rmance by reducing the amount of dead -time re quired betwe en the input signals. Care must be taken to in sure the input signal pulse width is g reater th an the minimum specified pul se wi dth. An input signal tha result in no output pulse or an output pulse whose width is significantly less than the input. The maximu m duty cycle (ratio of hig h side on-time to switching period) is controlled by the mi nimum pulse width of the low side an d by t he t capacitor to charge during the off-tim e. Adequate time must be allowed for the CB capacitor to charge up before the high-side driver is turned on. Decoupling and Bootstrap Capacitor Selection Decoupling capacitors a re req uir supply the charge necessary to d rive the MOSFETs as well as mi nimize the voltage ripple on these pins. The capacitor from HB to HS serves double duty by providing decoupling for th e high-side circuitry as well as providing current to the high-side circuit while the high-side external M OSFET is on. Ce ramic ca pacitors are recommended because of their lo w impedance and small size. Z5U t ype ce ramic capa citor diele ctrics a re not recommended due to the large change in capacitance over temperature and voltag e. A minimum value of 0.1uf i s required for each of the capa citors, regardless o f the MOSFETs b eing d riven. Larg er M OSFETs may requir e larger capa citance valu es for prope r ope ration. The voltage ratin g of the capacitors depends on the supply voltage, amb ient tempera ture an d the voltage derating used for rel iability. 25V rated X5R or X7R cerami c

Micrel, Inc. MIC4100/1 March 2006 17 M9999-031506 The circuit i s co nfigured as a synchronou s buck power stage. The high-side MOSFET drain connects to the input supply voltage (d rain) a nd t he source conn ects to the switching node. The lo w-side MOSFET drain connects to the switching node a nd its sou rce is connected to ground. The buck co nverter outp ut inductor (not shown) woul d connect to the switchi ng node. The high-side drive trace, HO, i s route d on to p of i ts retu rn t race, HS, to mi nimize loop area a nd p arasitic inductance. The lo w-side drive trace LO is routed over the ground plane which minimizes the imped ance of that current path. The de coupling capacitors, CB and CVDD are placed to minimize etch length between the cap acitors and thei r re spective pin s. This close pla cement is ne cessary to efficiently charge capacitor C B when th e HS nod e is low. All traces a re 0.025” wide or greater to reduce impedance. Cin is used to decouple the high current path th rough the MOSFETs. CB HS HO HB Vdd HI LI Vss LO Cvdd GND (FET Source) MIC4100 HS Node (switching node) Low-side FET Vin (FET Drain) High-side FET CIN GND HO trace Figure 12

Micrel, Inc. MIC4100/1 March 2006 18 M9999-031506

Package Information

8-Pin SOIC (M) MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical impla into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. can nt © 2004 Micrel, Incorporated.