MIC3000

Micrel Semiconductor

SFP Management IC

Manufacturer: Micrel Semiconductor

Document: 68 Pages / 416Kb

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Document overview

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PDF pages: 68

Technical content

Datasheet sections

Features

APC or constant-current laser bias
Supports multiple laser types and bias circuit topologies
Drives external low-cost BJT for laser bias
Integrated digital temperature sensor
Temperature compensation of modulation, bias, and fault levels via NVRAM look-up tables
Direct interface to SY88932, SY88982, SY89307 and other drivers
NVRAM to support GBIC/SFP serial ID function
User writable EEPROM scratchpad
Diagnostic monitoring interface per SFF-8472 – Monitors and reports critical parameters: temperature, bias current, TX and RX optical power, and supply voltage – S/W control and monitoring of TXFAULT, RXLOS, RATESELECT, and TXDISABLE – External calibration
Power-on hour meter
Interrupt capability
Extensive test and calibration features
2-wire I 2C compatible serial interface
SFP MSA and SFF-8472 compliant
3.0V to 3.6V power supply range
5V-tolerant I/O
4mm × 4mm 24-pin MLF™ package

Applications

SFF/SFP optical transceivers
SONET/SDH transceivers and transponders
Fibre channel transceivers
10Gbps transceivers
Free space optical communications
Proprietary optical links

Ordering Information

Part Number Junction Temp. Range Package MIC3000BML –45 °C to +105°C 24-pin MLF™ MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc.

October 2004 5 M9999-101204 MIC3000 Micrel Pin Configuration 789 1 0 1 1 1 2 24 23 22 21 20 19 FB VMPD GNDA VDDA VILD– VILD+ VDDD NC GNDD RSIN VIN CLK SHDN VRX XPN TXFAULT TXDISABLE DATA VMOD+ VMOD– VBIAS COMP RSOUT RXLOS 24-Lead MLF™ Pin Descriptions Pin Number Pin Name Pin Function 1 FB Analog Input. Feedback voltage for the APC loop op-amp . Polarity and scale are programmable via the APC configuration bits. Connect to VBIAS if APC is not used. 2 VMPD Analog Input. Multiplexed A/D converter input for monitoring transmitted optical power via a monitor photodiode. In most applications, VMPD will be connected directly to FB. The input range is 0 - VREF or 0 - VREF/4 depend- ing on the setting of the APC configuration bits. 3 GNDA Ground return for analog functions. 4 VDDA Power supply input for analog functions. 5 VILD– Analog Input. Reference terminal for the multiplexed pseudo-differential A/D converter inputs for monitoring laser bias current via a sense resistor (VILD+ is the sensing input). Tie to V DD or GND to reference the voltage sensed on VILD+ to VDD or GND respectively. Limited common-mode voltage range, see “Applications Information” section for more details. 6 VILD+ Analog Input. Multiplexed A/D input for monitoring laser bias current via a sense resistor (signal input); accommodates inputs referenced to VDD or GND (see pin 5 description). Limited common-mode voltage range, see “Applications Information” section for more details. 7 SHDN Digital output; Programmable polarity. Asserted at the detection of a fault condition that can be used to activate a second series transistor in the laser current path, enhancing protection against single-point failures. 8 VRX Analog Input. Multiplexed A/D converter input for monitoring received optical power. The input range is 0 to VREF. 9 XPN Analog Input/Output. Optional connection to an external PN junction for sensing temperature at a remote location. The Zone bit in OEMCFG1 determines whether temperature is measured using the on-chip sensor or the remote PN junction. 10 TXFAULT Digital Output; Open-Drain. A high level indicates a hardware fault impeding transmitter operation. The state of this input is always reflected in the TXFLT bit.

M9999-101204 6 October 2004 Pin Descriptions Pin Number Pin Name Pin Function 11 TXDISABLE Digital Input; Active High. The transmitter is disabled when this line is high or the STXDIS bit is set. The state of this input is always reflected in the TXDIS bit. 12 DATA Digital I/O; Open-drain. Bi-directional serial data input/output. 13 CLK Digital Input; Serial bit clock input.

14 VIN If bit 4 (IE) in USRCTL register is set to 0 (default), this pin is configured as

analog input. If IE bit is set to 1, this pin is configured as open-drain output. Analog Input: Multiplexed A/D input for monitoring supply voltage. 0V to 5.5V input range. Open-drain output: outputs the internally generated interrupt signal /INT.

15 RSIN Digital Input; Rate select input; ORed with rate select bit to determine the

state of the RSOUT pin. The state of this pin is always reflected in the RSEL bit. 16 GNDD Ground return for digital functions. 17 NC No connection. This pin is used for test purposes and must be left uncon- nected. 18 VDDD Power supply input for digital functions. 19 RXLOS Digital Output; Active-High/Open-Drain. Indicates the loss of the received signal as indicated by a level of received optical power below the pro- grammed RXLOS comparator threshold; may be wire-ORed with external signals. Low indicates normal operation. The LOS bit reflects the state of RXLOS whether driven by the MIC3000 or an external circuit. 20 RSOUT Digital Output. Open-Drain. This output is controlled by the SRSEL bit ORed with RSIN input and is open drain only. 21 COMP Analog Output, compensation terminal. Connect a capacitor between this pin and GNDA or VDDA with appropriate value to tune the APC loop time constant to a desirable value. 22 VBIAS Analog Output. Buffered DAC output capable of sourcing or sinking up to 10mA under control of the APC function to drive an external transistor for laser diode D.C. bias. The output and feedback polarity are programmable to accommodate either a NPN or an PNP transistor to drive a common anode or common-cathode laser diode. 23 VMOD– Analog Input. Inverting terminal of VMOD buffer op-amp. Connect to V MOD+ (gain = 1) or feedback resistors network to set a different gain 24 VMOD+ Analog Output. Buffered DAC output to set the modulation current on the laser driver IC. Operates with either a 0– VREF or a (VDD–VREF) – VDD output swing so as to generate either a ground-referenced or a VDD refer- enced programmed voltage. A simple external circuit can be used to generate a programmable current for those drivers that require a current rather than a voltage input. See “Applications Information” section for more details.

October 2004 7 M9999-101204 MIC3000 Micrel Absolute Maximum Ratings(1) Voltage on CLK, DATA, TXFAULT, VIN, RXLOS, ESD Ratings(3) Operating Ratings(2) Package Thermal Resistance

Electrical Characteristics

For typical values, TA = 25°C, VDDA = VDDD = +3.3V, unless otherwise noted. Bold values are guaranteed for +3.0V ≤ (VDDA = VDDD) ≤ 3.6V, T(min) ≤ TA ≤ T(max)(8) Symbol Parameter Condition Min Typ Max Units Power Supply IDD Supply Current CLK = DATA = VDDD = VDDA;TXDISABLE low; 2.3 3.5 mA all DACs at full-scale; all A/D inputs at full-scale; all other pins open. CLK = DATA = VDDD = VDDA; TXDISABLE high; 2.3 3.5 mA FLTDAC at full-scale; all A/D inputs at full-scale; all other pins open. VPOR Power-on Reset Voltage All registers reset to default values; 2.9 2.98 V A/D conversions initiated. VUVLO Under-Voltage Lockout Threshold Note 5 2.6 2.73 V VHYST Power-on Reset Hysteresis Voltage 170 mV tPOR Power-on Reset Time V DD > VPOR (4) 50 µs VREF Reference Voltage 1.210 1.225 1.240 V ∆VREF/∆VDDA Voltage Reference Line Regulation 1.7 mV/V Temperature-to-Digital Converter Characteristics Local Temperature Measurement Error –40°C ≤ TA ≤ +105°C(6) ±1 ±3 °C Remote Temperature Measurement –40 °C ≤ TA ≤ +105°C(6) ±1 ±3 °C Error tCONV Conversion Time Note 4 60 ms tSAMPLE Sample Period 100 ms Remote Temperature Input, XPN IF Current to External Diode(4) XPN at high level, clamped to 0.6V. 192 400 µA XPN at low level, clamped to 0.6V. 7 12 µA

M9999-101204 8 October 2004 Symbol Parameter Condition Min Typ Max Units Voltage-to-Digital Converter Characteristics (VRX, VAUX, VBIAS, VMPD, VILD+/–) Voltage Measurement Error –40 °C ≤ TA ≤ +105°C(6) ±1 ±2.0 % fs tCONV Conversion Time Note 4 10 ms tSAMPLE Sample Period Note 4 100 ms Voltage Input, VIN (Pin 14 used as an ADC Input) VIN Input Voltage Range –0.3 ≤ VDD ≤ 3.6V GNDA 5.5 V ILEAK Input Current V IN = VDD or GND; VAUX = VIN 55 µA CIN Input Capacitance 10 pF Digital-to-Voltage Converter Characteristics (VMOD, VBIAS) Accuracy –40 °C ≤ TA ≤ +105°C(6) ±1 2.0 % fs tCONV Conversion Time Note 4 20 ms DNL Differential Non-linearity Error Note 4 ±0.5 ±1 LSB Bias Current Sense Inputs, VILD+, VILD– VILD Differential Input Signal Range, 0 V REF/4 mV | VILD + – VILD – | IIN+ VILD + Input Current ±1 µA IIN– VILD – Input Current V ILD – referred to VDDA +150 µA | VILD + – VILD – | = 0.3V V ILD – referred to GND –150 µA CIN Input Capacitance 10 pF APC Op Amp, FB, VBIAS, COMP GBW Gain Bandwidth Product C COMP = 20pF; Gain = 1 1 MHz TCVOS Input Offset Voltage Temperature 1 µV/°C Coefficient(4) VOUT Output Voltage Swing I OUT = 10mA, SRCE bit = 1 GNDA 1.25 V IOUT = -10mA, SRCE bit = 0 VDDA–1.25 V DDA V ISC Output Short-Circuit Current 55 mA tSC Short Circuit Withstand Time T J ≤ 150°C(4) ∞∞ ∞ sec PSRR Power Supply Rejection Ratio C COMP = 20pF; Gain = 1, to GND 55 dB CCOMP = 20pF; Gain = 1, to VDD 40 AMIN Minimum Stable Gain C COMP = 20pF, Note 4 1 V/V ∆V/∆t Slew Rate C COMP = 20pF; Gain = 1 3 V/ µs ∆RFB Internal Feedback Resistor Tolerance ±20 % ∆RFB/∆t Internal Feedback Resistor 25 ppm/C Temperature Coefficient CIN Pin Capacitance 10 pF

October 2004 9 M9999-101204 MIC3000 Micrel Symbol Parameter Condition Min Typ Max Units VMOD Buffer Op-Amp, VMOD+, VMOD– GBW Gain Bandwidth C COMP = 20pF; Gain = 1 1 MHz TCVOS Input Offset Voltage Temperature 1 µV/°C Coefficient IBIAS VMOD – Input Current ±0.1 ±1 µA VOUT Output Voltage Swing I OUT = ±1mA GNDA+75 V DDA–75 mV ISC Output Short-Circuit Current 35 mA tSC Short Circuit Withstand Time T J ≤ 150°C(4) ∞∞ ∞ sec PSRR Power Supply Rejection Ratio C COMP = 20pF; Gain = 1, to GND 65 dB CCOMP = 20pF; Gain = 1, to VDD 44 dB AMIN Minimum Stable Gain C COMP = 20pF 1 V/V ∆V/∆T Slew Rate C COMP = 20pF; Gain = 1 1 V/ µs CIN Pin Capacitance 10 pF Control and Status I/O, TXDISABLE, TXFAULT, RSIN, RSOUT, SHDN, RXLOS, /INT VIL Low Input Voltage 0.8 V VIH High Input Voltage 2.0 V VOL Low Output Voltage I OL ≤ 3mA 0.3 V VOH High Output Voltage I OH ≤ 3mA VDDD–0.3 V (applies to SHDN only) ILEAK Input Current ±1 µA CIN Input Capacitance 10 pF Transmit Optical Power Input, VMPD VIN Input Voltage Range Note 4 GNDA V DDA V VRX Input Signal Range BIASREF=0 0V REF V BIASREF=1 VDDA–VREF VDDA V CIN Input Capacitance Note 4 10 pF ILEAK Input Current ±1 µA Received Optical Power Input, VRX, RXPOT Input Voltage Range Note 4 GNDA V DDA V VRX Valid Input Signal Range 0V REF V (ADC Input Range) CIN Input Capacitance Note 4 10 pF ILEAK Input Current ±1 µA

M9999-101204 10 October 2004 Symbol Parameter Condition Min Typ Max Units Control and Status I/O Timing, TXFAULT, TXDISABLE, RSIN, RSOUT, and RXLOS tOFF TXDISABLE Assert Time From input asserted to optical output at 10 µs 10% of nominal, CCOMP = 10nF. tON TXDISABLE De-assert Time From input de-asserted to optical output 1 ms at 90% of nominal, CCOMP = 10nF. tINIT Initialization Time From power on or transmitter enabled to 300 ms optical output at 90% of nominal and TX_FAULT de-asserted.(4) tINIT2 Power-on Initialization Time From power on to APC loop enabled. 200 ms tFAULT TXFAULT Assert Time From fault condition to TXFAULT 95 µs assertion.(4) tRESET Fault Reset Time Length of time TXDISABLE must be 10 µs asserted to reset fault condition. tLOSS_ON RXLOS Assert Time From loss of signal to RXLOS asserted. 95 µs tLOSS_OFF RXLOS De-assert Time From signal acquisition to LOS 100 µs de-asserted. tDATA Analog Parameter Data Ready From power on to valid analog parameter 400 ms data available.(4) tPROP_IN TXFAULT, TXDISABLE, RXLOS, Time from input change to corresponding 1 µs RSIN Input Propagation Time internal register bit set or cleared. (4) tPROP_OUT TXFAULT, RSOUT, /INT Output From an internal register bit set or cleared 1 µs Propagation Time to corresponding output change. (4) Fault Comparators φFLTTMR Fault Suppression Timer Clock Note 4 0.475 0.5 0.525 ms Period Accuracy -3 +3 %F.S. tREJECT Glitch Rejection Maximum length pulse that will not cause 4.5 µs output to change state.(4) VSAT Saturation Detection Threshold High level 95 %VDDA Low level 5 %VDDA Power-On Hour Meter Timebase Accuracy 0 °C ≤ TA ≤ +70°C(4) +5 –5 % Resolution Note 4 10 hours Non-Volatile (FLASH) Memory tWR Write Cycle Time(8) From STOP of a one to four-byte write 13 ms transaction.(4) Data Retention 100 years Endurance Minimum Permitted Number Write 10,000 cycles Cycles

October 2004 11 M9999-101204 MIC3000 Micrel Symbol Parameter Condition Min Typ Max Units Serial Data I/O Pin, DATA VOL Low Output Voltage I OL = 3mA 0.4 V IOL = 6mA 0.6 V VIL Low Input Voltage 0.8 V VIH High Input Voltage 2.1 V ILEAK Input Current ±1 µA CIN Input Capacitance Note 4 10 pF Serial Clock Input, CLK VIL Low Input Voltage 2.7V ≤ VDD ≤ 3.6V 0.8 V VIH High Input Voltage 2.7V ≤ VDD ≤ 3.6V 2.1 V ILEAK Input Current ±1 µA CIN Input Capacitance Note 4 10 pF Serial Interface Timing(4) t1 CLK (clock) Period 2.5 µs t2 Data in Setup Time to CLK High 100 ns t3 Data Out Stable After CLK Low 300 ns t4 DATA Low Setup Time to CLK Low Start Condition 100 ns t5 DATA High Hold Time After CLK High Stop Condition 100 ns tDATA Data Ready Time From power on to completion of one set of 400 ms ADC conversions; analog data available via serial interface. tTO BUS Timeout CLK Low 25 30 35 ms Notes: 1. Exceeding the absolute maximum rating may damage the device. 2. The device is not guaranteed to function outside its operating rating. 3. Devices are ESD sensitive. Handling precautions recommended. 4. Guaranteed by design and/or testing of related parameters. Not 100% tested in production. 5. The MIC3000 will attempt to enter its shutdown state when V DD falls below VUVLO. This operation requires time to complete. If the supply voltage falls too rapidly, the operation may not be completed. 6. Does not include quantization error. 7. Final test on outgoing product is performed at T A = +25°C. 8. The MIC3000 will not respond to serial bus transactions during an EEPROM write-cycle. The host will receive a NACK during t WR. Timing Diagram t4 t2 t5 DATA (Output) DATA (Input) CLK Serial Interface Timing

0 - 95 96 Serial ID defined by G-P NVRAM; R/W under valid OEM password. Table 1. MIC3000 Address Map, Serial address = A0 h 28–37 40–55 16 Reserved Reserved – do not write; reads undefined. 5C–5E 92–94 3 Reserved Reserved – do not write; reads undefined. 5F 95 1 Checksum G-P NVRAM; writeable using OEM p/w; read-only otherwise. 60–69 96–105 10 Analog Data Real time analog parameter data. 6E 110 1 Control/Status bits Control and status bits. 6F 111 1 Reserved Reserved – do not write; reads undefined. 70–71 112–113 2 Alarm Flags Alarm status bits; read-only. 72–73 114–115 2 Reserved Reserved–do not write; reads undefined. 74–75 116–117 2 Warning Flags Warning status bits; read-only. 76–77 118–119 2 Reserved Reserved – do not write; reads undefined. 78–7B 120–123 4 OEMPW OEM password entry field. 7C–7F 124–127 4 Vendor Specific Vendor specific. Reserved–do not write; reads undefined. F8–F9 248–249 2 Reserved Reserved – do not write; reads undefined. FB 251 1 USRPW Entry field for user password. FC–FD 252–253 2 POH Power-on hour meter result; read-only. FE 254 1 Data Ready Flags Data ready bits for each measured parameter; read-only. FF 255 1 User Control End-user control and status bits. Table 2. MIC3000 Address Map, Serial Address = A2 h

40–7F 64–127 64 MODLUTn VMOD temperature compensation L.U.T. 80–BF 128–191 64 IFLTLUT Bias current fault threshold temperature compensation L.U.T. C0–FF 192–255 64 EOLLUTn Bias current high alarm threshold temperature compensation L.U.T. Table 3. Temperature Compensation Tables, Serial Address = A4 h Table 4. OEM Configuration Registers, Serial Address = A6 h

Figure 1. MIC3000 Block Diagram A block diagram of the monitoring circuit is shown below. measure the level of the VDDA pin or one of five other nodes.

Table 5. A/D Input Signal Ranges and Resolutions

Assumes typical V REF value of 1.22V.

Table 6. V AUX Input Signal Ranges and Resolutions

Assumes typical V REF value of 1.22V.

Figure 2. Analog-to-Digital Converter Block Diagram

M9999-101204 16 October 2004 External Calibration The MIC3000 is designed to support the implementation of an optical transceiver employing external calibration, as de- scribed by SFF-8472, Digital Monitoring Interface specifica- tions. The voltage and temperature values returned by the MIC3000’s A/D converter are internally calibrated. The binary values of TEMPh:TEMPl and VOLTh:VOLTl are in the format called for by SFF-8472 under Internal Calibration. However, since the other parameters are not internally calibrated, an MIC3000-based transceiver must be labeled as externally calibrated. SFF-8472 calls for a set of calibration constants to be stored by the transceiver OEM at specific non-volatile memory locations, refer to SFF-8472 specifications for memory map of calibration coefficient. The MIC3000 provides the non- volatile memory required for the storage of these constants. The Digital Diagnostic Monitoring Interface specification should be consulted for full details. Slopes and offsets are stored for use with voltage, temperature, bias current, and transmitted power measurements. Coefficients for a fourth- order polynomial are provided for use with received power measurements. The host system can retrieve these con- stants and use them to process the measured data. Since voltage and temperature require no calibration, the corre- sponding slopes should generally be set to unity and the offsets to zero. Voltage The voltage values returned by the MIC3000’s A/D converter are internally calibrated. The binary values of VOLTh:VOLTl are in the format called for by SFF-8472 under Internal Calibration. Since VINh:VINl requires no processing, the corresponding slope should be set to unity and the offset to zero. Temperature The temperature values returned by the MIC3000’s A/D converter are internally calibrated. The binary values of TEMPh:TEMPl are in the format called for by SFF-8472 under Internal Calibration. Since TEMPh:TEMPl requires no processing, the corresponding slope should be set to unity and the offset to zero. Bias Current Bias current is sensed via an external sense resistor as a voltage appearing at VILD+ and VILD-. The value returned by the A/D is therefore a voltage analogous to bias current. Bias current, IBIAS, is simply VVILD/RSENSE. The binary value in IBIASh (IBIASl is always zero) is related to bias current by: I 0 300V IBIASh 255 R BIAS SENSE ⎠⎟(. ) (1) The value of the least significant bit (LSB) of IBIASh is given by: LSB IBIASh 0 300V

255 R Amps 300mV

255 R mA 1191 4

() ..= × = × =µ (2) Per SFF-8472, the value of the bias current LSB is 2µA. The conversion factor, “slope”, needed is therefore: Slope 1191 4 A 2A R 595 7 R SENSE SENSE= µ =÷. . The tolerance of the sense resistor directly impacts the accuracy of the bias current measurement. It is recom- mended that the sense resistor chosen maintain accuracy of 1% or better. The offset correction, if needed, can be deter- mined by shutting down the laser, i.e., asserting TXDISABLE, and measuring the bias current. Any non-zero result gives the offset required. The offset will be equal and opposite to the result of the “zero current” measurement. TX Power Transmit power is sensed via an external sense resistor as a voltage appearing at VMPD. It is assumed that this voltage is generated by a sense resistor carrying the monitor photo- diode current. In most applications, the signal at VMPD will be feedback voltage on FB. The VMPD voltage may be mea- sured relative to GND or V DDA depending on the setting of the BIASREF bit in OEMCFG1. The value returned by the A/D is therefore a voltage analogous to transmit power. The binary value in TXOPh (TXOPl is always zero) is related to transmit power by: Pm W K VREF TXOPh 255 R K 1220mV TXOPh 255 R K 4 75656 TXOPh R mW TX SENSE SENSE SENSE × ⎛ ⎝⎜ ⎞ × () ⎛ ⎝⎜ ⎞ = ×× (3) For a given implementation, the value of RSENSE is known. It is either the value of the external resistor or the chosen value of RFB used in the application. The constant, K, will likely have to be determined through experimentation or closed- loop calibration, as it depends on the monitoring photodiode responsivity and coupling efficiency. It should be noted that the APC circuit acts to hold the transmitted power constant. The value of transmit power reported by the circuit should only vary by a small amount as long as APC is functioning correctly. RX Power Received power is sensed as a voltage appearing at VRX. It is assumed that this voltage is generated by a sense resistor carrying the receiver photodiode current. The value returned by the A/D is therefore a voltage analogous to received power. The binary value in RXOPh (RXOPl is always zero) is related to received power by: P mW K VREF RXOPh 255 K 1220mV RXOPh 255 For a given implementation, the constant, K, will likely have to be determined through experimentation or closed-loop calibration, as it depends on the gain and efficiencies of the components upstream. In SFF-8472 implementations, the external calibration constants can describe up to a fourth- order polynomial in case K is nonlinear.

Figure 6. V MOD Configured as Voltage Output with Gain

0 Don’t Care Don’t Care Hi-Z

1 Don’t Care 0 ≈GND

1 Don’t Care 1 ≈VDD

Table 9. Shutdown State of V BIAS vs.

0 Don’t Care Hi-Z

Table 10. Shutdown state of V MOD vs. begin, but the laser will remain off. outputs versus the control bits. Table 8. Shutdown State of SHDN vs.

Polarity programmable; active-high shown.
Determined by loop response, e.g., C COMP.

Figure 7. MIC3000 Power-On Timing (OE=1)

only during calibration and testing or permanently. Figure 8. Fault Comparator Logic 4µs (typical) in length are rejected by the fault comparators. bias current fault DAC value. timer starts. Operation cannot resume until this timer expires. unsafe condition by continually cycling the laser on and off. typical reset delay interval). the MIC3000 will begin the restart sequence immediately. once during the 200ms interval, the timing remains the same. The laser is restarted after the expiration of the 200ms timer. set values, and transferred to DACs.

Table 11. Temperature Compensation Look-up Tables,

· ·
· ·
· · 3Eh 62 124 125 3Fh 63 126 127

Table 12. APC Temperature Compensation Look-Up

· ·
· ·
· · 7Eh 62 124 125 7Fh 63 126 127

Table 13. V MOD Temperature- Compensation Look-Up

· ·
· ·
· · BEh 62 124 125 BFh 63 126 127

Table 14. I BIAS Comparator Temperature

· ·
· ·
· · FEh 62 124 125 FFh 63 126 127

Table 15. Bias Current High Alarm Temperature

Table 17. MIC3000 Events a power on-off cycle occurs, or the host toggles TXDISABLE. all status registers will be cleared. RXLOS, RATE_SELECT, and TXFAULT are all open-drain. MIC3000 will be reported in the control register status bits. “Electrical Characteristics” section.

is indistinguishable from a power-on reset. volatile memory. This implies a range of at least twenty years. Table 18. Power-On Hour Meter Result Format Table 19. Test and Diagnostic Features write-cycle endurance of the part in question. copies and error correction codes to maintain data validity. rupted and should be ignored. setting all eight POHDATA bytes to 00h.

cally checking for an acknowledgement. be verified before it takes effect. OEMPWSET is all zeroes, no password security will exist. i.e., DATA driven by master.

• •
• •
• •
• • S1010 000 0AXXXXXXXXA MIC3000 Slave Address DATA CLK Register Address START R/W = WRITE ACKNOWLEDGE ACKNOWLEDGE D7 D6 D5 D4 D3 D2 D1 D0 A D3D4D5 D2 D1 D0D6D7 1st Data Byte to MIC3000 2nd Data Byte to MIC3000 ACKNOWLEDGE

Figure 24. Four-Byte Page_Write Protocol factory default security setting. access and write protection for the user areas. address A2 h is used for setting the USER password. new password to be verified before it takes effect. password is in place, the user password will have no effect.

October 2004 33 M9999-101204 MIC3000 Micrel Detailed Register Descriptions Note: Serial bus addresses shown assume that I2CADR = Axh. Alarm Threshold Registers Temperature High Alarm Threshold MSB (TMAXh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0°C) Serial Address A2 h = 1010001b Byte Address 00 = 00 h Each LSB represents one degree centigrade. This register is to be used in conjunction with TMAXl to yield a sixteen- bit temperature value. The value in this register is uncalibrated. The value in TMAXh is compared against TEMPh. Alarm bit Ax is set if TEMPh > TMAXh. Temperature High Alarm Threshold LSB (TMAXh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0°C) Serial Address A2 h = 1010001b Byte Address 01 = 01 h This register is to be used in conjunction with TMAXh to yield a sixteen-bit temperature value. The value in TMAXh is compared against TEMPh. Alarm bit Ax is set if TMAXh > TEMPh. Since TEMPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. Temperature Low Alarm Threshold MSB (TMINh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0°C) Serial Address A2 h = 1010001b Byte Address 02 = 02 h Each LSB represents one degree centigrade. This register is to be used in conjunction with TMINl to yield a sixteen-bit temperature value. The value in TMINh is compared against TEMPh. Alarm bit Ax is set if TEMPh < TMINh. Temperature Low Alarm Threshold LSB (TMINl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0°C) Serial Address A2 h = 1010001b Byte Address 03 = 03 h This register is to be used in conjunction with TMINh to yield a sixteen-bit temperature value. The value in TMINh is compared against TEMPh. Alarm bit Ax is set if TEMPh < TMINh. Since TEMPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

M9999-101204 34 October 2004 Voltage High Alarm Threshold MSB(VMAXh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0V) Serial Address A2 h = 1010001b Byte Address 08 = 08 h Each LSB represents 25.6mV. This register is to be used in conjunction with VMAXl to yield a sixteen-bit value. The value in TMINh is compared against VINh. Alarm bit Ax is set if VINh > VMAXh. Voltage High Alarm Threshold LSB(VMAXl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0V) Serial Address A2 h = 1010001b Byte Address 09 = 09 h Each LSB represents 100µV. This register is to be used in conjunction with VINh to yield a sixteen-bit value. The value in VMAXh is compared against VINh. Alarm bit Ax is set if VINh > VMAXh. Since VINl is always zero, it is recom- mended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. Voltage Low Alarm Threshold MSB (VMINh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0V) Serial Address A2 h = 1010001b Byte Address 10 = 0A h Each LSB represents 25.6mV. This register is to be used in conjunction with VMINl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in VMINh is compared against VINh. Alarm bit Ax is set if VINh<VMINh. Voltage Low Alarm Threshold LSB (VMINl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0V) Serial Address A2 h = 1010001b Byte Address 11 = 0B h Each LSB represents 100µV. This register is to be used in conjunction with VINh to yield a sixteen-bit value. The value in VMINh is compared against VINh. Alarm bit Ax is set if VINh < VMINh. Since VINl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

October 2004 35 M9999-101204 MIC3000 Micrel Bias Current High Alarm Threshold MSB (IMAXh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mA) Serial Address A2 h = 1010001b Byte Address 16 = 10 h This register is to be used in conjunction with IMAXl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in IMAXh is compared against ILDh. Alarm bit Ax is set if ILDh > IMAXh. Bias Current High Alarm Threshold LSB (IMAXl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mA) Serial Address A2 h = 1010001b Byte Address 17 = 11 h Each LSB represents 2µA. This register is to be used in conjunction with IMAXh to yield a sixteen-bit value. The value in this register is uncalibrated. The value in IMAXh is compared against ILDh. Alarm bit Ax is set if ILDh > IMAXh. Since ILDl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. Bias Current Low Alarm Threshold MSB (IMINh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mA) Serial Address A2 h = 1010001b Byte Address 18 = 12 h This register is to be used in conjunction with IMINl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in IMINh is compared against ILDh. Alarm bit Ax is set if ILDh < IMINh. Bias Current Low Alarm Threshold LSB (IMINl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mA) Serial Address A2 h = 1010001b Byte Address 19 = 13 h Each LSB represents 2µA. This register is to be used in conjunction with IMINh to yield a sixteen-bit value. The value in this register is uncalibrated. The value in IMINh is compared against ILDh. Alarm bit Ax is set if ILDh < IMINh. Since ILDl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

M9999-101204 36 October 2004 TX Optical Power High Alarm MSB (TXMAXh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 24 = 18 h Each LSB represents 25.6µW. This register is to be used in conjunction with TXOPl to yield a sixteen-bit value. The values in TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXMAXh is compared against TXOPh. Alarm bit Ax is set if TXOPh > TXMAXh. TX Optical Power High Alarm LSB (TXMAXl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 25 = 19 h Each LSB represents 0.1µW. This register is to be used in conjunction with TXMAXh to yield a sixteen-bit value. The values in TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXMAXh is compared against TXOPh. Alarm bit Ax is set if TXOPh > TXMAXh. Since TXOPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF- 8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. TX Optical Power Low Alarm MSB (TXMINh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 26 = 1A h Each LSB represents 25.6µW. This register is to be used in conjunction with TXMINl to yield a sixteen-bit value. The values in TXMINh:TMINl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXMINh is compared against TXOPh. Alarm bit Ax is set if TXOPh < TXMINh. TX Optical Power Low Alarm LSB (TXMINl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 27 = 1B h Each LSB represents 0.1µW. This register is to be used in conjunction with TXMINh to yield a sixteen-bit value. The values in TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXMINh is compared against TXOPh. Alarm bit Ax is set if TXOPh < TXMINh. Since TXOPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF- 8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

October 2004 37 M9999-101204 MIC3000 Micrel RX Optical Power High Alarm Threshold MSB (RXMAXh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 32 = 20 h Each LSB represents 25.6µW. This register is to be used in conjunction with RXMAXl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in RXMAXh is compared against RXOPh. Alarm bit Ax is set if RXOPh > RXMAXh. RX Optical Power High Alarm Threshold LSB (RXMAXl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 33 = 21 h Each LSB represents 0.1µW. This register is to be used in conjunction with RXMAXh to yield a sixteen-bit value. The values in RXMAXh:RXMAXl are in an unsigned binary format. The value in this register is uncalibrated. The value in RXMAXh is compared against RXOPh. Alarm bit Ax is set if RXOPh > RXMAXh. Since RXOPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF- 8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. RX Optical Power Low Alarm Threshold MSB (RMINh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 34 = 22h Each LSB represents 25.6µW. This register is to be used in conjunction with RXMINl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in RXMINh is compared against RXOPh. Alarm bit Ax is set if RXOPh < RXMINh. RX Optical Power Low Alarm Threshold LSB (RMINl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 35 = 23 h Each LSB represents 0.1µW. This register is to be used in conjunction with RXMINh to yield a sixteen-bit value. The values in RXMINh:RXMINl are in an unsigned binary format. The value in this register is uncalibrated. The value in RXMINh is compared against RXOPh. Alarm bit Ax is set if RXOPh < RXMINh. Since RXOPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF- 8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

M9999-101204 38 October 2004 Warning Threshold Registers Temperature High Warning Threshold MSB (THIGHh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0°C) Serial Address A2 h = 1010001b Byte Address 04 = 04 h Each LSB represents one degree centigrade. This register is to be used in conjunction with THIGHl to yield a sixteen- bit temperature value. The value in this register is uncalibrated. The value in THIGHh is compared against TEMPh. Warning bit Wx is set if TEMPh > THIGHh. Temperature High Warning Threshold LSB (THIGHl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0°C) Serial Address A2 h = 1010001b Byte Address 05 = 05 h This register is to be used in conjunction with THIGHh to yield a sixteen-bit temperature value. The value in this register is uncalibrated. The value in THIGHh is compared against TEMPh. Warning bit Wx is set if THIGHh > TEMPh. Since TEMPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. Temperature Low Warning Threshold MSB (TLOWh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0°C) Serial Address A2 h = 1010001b Byte Address 06 = 06 h Each LSB represents one degree centigrade. This register is to be used in conjunction with TLOWl to yield a sixteen- bit temperature value. The value in this register is uncalibrated. The value in TLOWh is compared against TEMPh. Warning bit Wx is set if TEMPh < TLOWh. Temperature Low Warning Threshold LSB (TLOWl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0°C) Serial Address A2 h = 1010001b Byte Address 07 = 07 h This register is to be used in conjunction with TLOWh to yield a sixteen-bit temperature value. The value in this register is uncalibrated. The value in TLOWh is compared against TEMPh. Warning bit Wx is set if TEMPh < TLOWh. Since TEMPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

October 2004 39 M9999-101204 MIC3000 Micrel Voltage High Warning Threshold MSB (VHIGHh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0V) Serial Address A2 h = 1010001b Byte Address 12 = 0C h Each LSB represents 25.6mV. This register is to be used in conjunction with VHIGHl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in VHIGHh is compared against VINh. Warning bit Wx is set if VINh > VHIGHh. Votage High Warning Threshold LSB (VHIGHl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0V) Serial Address A2 h = 1010001b Byte Address 13 = 0D h Each LSB represents 100µV. This register is to be used in conjunction with VHIGHh to yield a sixteen-bit value. The value in VHIGHh is compared against VINh. Warning bit Wx is set if VINh > VHIGHh. Since VINl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF- 8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. Votage Low Warning Threshold MSB (VLOWh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0V) Serial Address A2 h = 1010001b Byte Address 14 = 0E h Each LSB represents 25.6mV. This register is to be used in conjunction with VLOWl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in VLOWh is compared against VINh. Warning bit Wx is set if VINh < VLOWhh. Voltage Low Warning Threshold LSB (VLOWl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0V) Serial Address A2 h = 1010001b Byte Address 15 = 0F h Each LSB represents 100µV. This register is to be used in conjunction with VLOWh to yield a sixteen-bit value. The value in VLOWh is compared against VINh. Warning bit Wx is set if VINh < VLOWh. Since VINl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF- 8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

M9999-101204 40 October 2004 Bias Current High Warning Threshold MSB (IHIGHh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mA) Serial Address A2 h = 1010001b Byte Address 20= 14 h This register is to be used in conjunction with IHIGHl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in IHIGHh is compared against ILDh. Warning bit Wx is set if ILDh > IHIGHh. Bias Current High Warning Threshold LSB (IHIGHl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mA) Serial Address A2 h = 1010001b Byte Address 21= 15 h Each LSB represents 2µA. This register is to be used in conjunction with IHIGHh to yield a sixteen-bit value. The value in this register is uncalibrated. The value in IHIGHh is compared against ILDh. Warning bit Wx is set if ILDh > IHIGHh. Since ILDl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. Bias Current Low Warning Threshold MSB (ILOWh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mA) Serial Address A2 h = 1010001b Byte Address 22= 16 h This register is to be used in conjunction with ILOWl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in ILOWh is compared against ILDh. Warning bit Wx is set if ILDh < ILOWh. Bias Current Low Warning Threshold LSB (ILOWl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mA) Serial Address A2 h = 1010001b Byte Address 23= 17 h Each LSB represents 2µA. This register is to be used in conjunction with ILOWh to yield a sixteen-bit value. The value in this register is uncalibrated. The value in ILOWh is compared against ILDh. Warning bit Wx is set if ILDh < ILOWh. Since ILDl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

October 2004 41 M9999-101204 MIC3000 Micrel TX Optical Power High Warning MSB (TXHIGHh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 28= 1C h Each LSB represents 25.6µW. This register is to be used in conjunction with TXHIGHl to yield a sixteen-bit value. The values in TXHIGHh:TXHIGHl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXHIGHh is compared against TXOPh. Warning bit Wx is set if TXOPh > TXHIGHh. TX Optical Power High Warning LSB (TXHIGHl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 29= 1D h Each LSB represents 0.1µW. This register is to be used in conjunction with TXHIGHh to yield a sixteen-bit value. The values in TXHIGHh:TXHIGHl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXHIGHh is compared against TXOPh. Warning bit Wx is set if TXOPh > TXHIGHh. Since TXOPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF- 8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning b. TX Optical Power Low Warning MSB (TLOWh) read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 30 = 1E h Each LSB represents 25.6µW. This register is to be used in conjunction with TXLOWl to yield a sixteen-bit value. The values in TXLOWh:TLOWl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXLOWh is compared against TXOPh. Warning bit Wx is set if TXOPh < TXLOWh. TX Optical Power Low Warning LSB (TLOWl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 31 = 1F h Each LSB represents 0.1µW. This register is to be used in conjunction with TXLOWh to yield a sixteen-bit value. The values in TXLOWh:TXLOWl are in an unsigned binary format. The value in this register is uncalibrated. The value in TXLOWh is compared against TXOPh. Warning bit Wx is set if TXOPh < TXLOWh. Since TXOPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF- 8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

M9999-101204 42 October 2004 RX Optical Power High Warning Threshold MSB (RXHIGHh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 36 = 24 h Each LSB represents 25.6µW. This register is to be used in conjunction with RXHIGHl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in RXHIGHh is compared against RXOPh. Warning bit Wx is set if RXOPh > RXHIGHh. RX Optical Power High Warning Threshold LSB (RXHIGHl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 37 = 25 h Each LSB represents 0.1µW. This register is to be used in conjunction with RXHIGHh to yield a sixteen-bit value. The values in RXHIGHh:RXHIGHl are in an unsigned binary format. The value in this register is uncalibrated. The value in RXHIGHh is compared against RXOPh. Warning bit Wx is set if RXOPh > RXHIGHh. Since RXOPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF- 8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. RX Optical Power Low Warning Threshold MSB (RXLOWh) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 38 = 26 h Each LSB represents 25.6µW. This register is to be used in conjunction with RXLOWl to yield a sixteen-bit value. The value in this register is uncalibrated. The value in RXLOWh is compared against RXOPh. Warning bit Wx is set if RXOPh < RXLOWh. RX Optical Power Low Warning Threshold LSB (RXLOWl) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 39 = 27 h Each LSB represents 0.1µW. This register is to be used in conjunction with RXLOWh to yield a sixteen-bit value. The values in RXLOWh:RXLOWl are in an unsigned binary format. The value in this register is uncalibrated. The value in RXLOWh is compared against RXOPh. Warning bit Wx is set if RXOPh < RXLOWh. Since RXOPl is always zero, it is recommended that this register always be programmed to zero. This register is provided for compliance with SFF- 8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits.

October 2004 43 M9999-101204 MIC3000 Micrel Checksum (CHKSUM) Checksum of bytes 0 - 94 at serial address A2h read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h (0°C) Serial Address A2 h = 1010001b Byte Address 95 = 5F h This register is provided for compliance with SFF-8472. It is implemented as general-purpose non-volatile memory. Read/write access is possible whenever a valid OEM password has been entered. CHKSUM is read-only in USER mode.

M9999-101204 44 October 2004 ADC Result Registers Temperature Result MSB (TEMPh) read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (0°C)(1) Serial Address A2 h = 1010001b Byte Address 96 = 60 h Each LSB represents one degree centigrade. This register is to be used in conjunction with TEMPl to yield a sixteen- bit temperature value. The value in this register is uncalibrated. The host should process the results using the scale factor and offset provided. See the External Calibration section. Temperature Result LSB (TEMPl) read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (0°C) Serial Address A2 h = 1010001b Byte Address 97 = 61 h This register is to be used in conjunction with TEMPh to yield a sixteen-bit temperature value. The value in this register is uncalibrated. The host should process the results using the scale factor and offset provided. See the External Calibration section. In the MIC3000, this register will always return zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. Voltage MSB (VINh) read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (0V)(2) Serial Address A2 h = 1010001b Byte Address 98 = 62 h Each LSB represents 25.6mV. This register is to be used in conjunction with VINl to yield a sixteen-bit value. The values in VINh:VlNl are in an unsigned binary format. The value in this register is uncalibrated. The host should process the results using the scale factor and offset provided. See the External Calibration section. Voltage LSB (VINl) read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (0V) Serial Address A2 h = 1010001b Byte Address 99 = 63 h Each LSB represents 100µV. This register is to be used in conjunction with VINh to yield a sixteen-bit value. The values in VINh:VINl are in an unsigned binary format. The value in this register is uncalibrated. The host should process the results using the scale factor and offset provided. See the External Calibration section. In the MIC3000, this register will always return zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. Notes: 1. TEMPh will contain measured temperature data after the completion of one conversion. 2. VINh will contain measured data after one A/D conversion cycle.

October 2004 45 M9999-101204 MIC3000 Micrel Laser Diode Bias Current MSB (ILDh) read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (0mA)(3) Serial Address A2 h = 1010001b Byte Address 100 = 64 h This register is to be used in conjunction with ILDl to yield a sixteen-bit value. The values in ILDh:ILDl are in an un- signed binary format. The value in this register is uncalibrated. The host should process the results using the scale factor and offset provided. See the External Calibration sections. Laser Diode Bias Current LSB (ILDl) read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (0mA) Serial Address A2 h = 1010001b Byte Address 101 = 65 h Each LSB represents 2µA. This register is to be used in conjunction with ILDh to yield a sixteen-bit value. The values in ILDh:ILDl are in an unsigned binary format. The value in this register is uncalibrated. The host should process the results using the scale factor and offset provided. See the External Calibration section. In the MIC3000, this register will always return zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. Transmitted Optical Power MSB (TXOPh)(4) read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (0mW)(5) Serial Address A2 h = 1010001b Byte Address 102 = 66 h Each LSB represents 25.6µW. This register is to be used in conjunction with TXOPl to yield a sixteen-bit value. The values in TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The host should process the results using the scale factor and offset provided. See the External Calibration section. Transmitted Optical Power LSB (TXOPl) read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (0mW) Serial Address A2 h = 1010001b Byte Address 103 = 67 h Each LSB represents 0.1µW. This register is to be used in conjunction with TXOPh to yield a sixteen-bit value. The values in TXOPh:TXOPl are in an unsigned binary format. The value in this register is uncalibrated. The host should process the results using the scale factor and offset provided. See the External Calibration section. In the MIC3000, this register will always return zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bitsection. Notes: 3. ILDh will contain measured data after one A/D conversion cycle. 4. The scale factor corresponding to the sense resistor used must be set in the configuration register. 5. TXOPh will contain measured data after one A/D conversion cycle.

M9999-101204 46 October 2004 Received Optical Power MSB (RXOPh) read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (0mW)(6) Serial Address A2 h = 1010001b Byte Address 104 = 68 h Each LSB represents 25.6µW. This register is to be used in conjunction with RXOPl to yield a sixteen-bit value. The values in RXOPh:RXOPl are in an unsigned binary format. The value in this register is uncalibrated. The host should process the results using the scale factor and offset provided. See the External Calibration section. Received Optical Power LSB (RXOPl) read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (0mW)(6) Serial Address A2 h = 1010001b Byte Address 105 = 69 h Each LSB represents 0.1µW. This register is to be used in conjunction with RXOPh to yield a sixteen-bit value. The values in RXOPh:RXOPl are in an unsigned binary format. The value in this register is uncalibrated. The host should process the results using the coefficients provided. See the External Calibration section. In the MIC3000, this register will always return zero. This register is provided for compliance with SFF-8472. It is not used by the MIC3000 when doing threshold comparisons and setting alarm or warning bits. Control and Status (CNTRL) TXDIS STXDIS reserved RSEL SRSEL XFLT LOS POR read only read/write read/write read/write read only read only read only Default Value 0000 0000 b = 00h Serial Address A2 h = 1010001b Byte Address 110 = 6E h Bit(s) Function Operation D[7] TXDIS Reflects the state of the TXDISABLE pin 1 = disabled, 0 = enabled, read only. D[6] STXDIS Soft transmit disable 1 = disabled; 0 = enabled. D[5] D[5] Reserved Reserved - always write as zero. D[4] RSEL Reflects the state of the RSEL pin 1 = high; 0 = low. D[3] SRSEL Soft rate select 1 = high (2Gbps); 0 = low (1Gbps). D[2] TXFLT Reflects the state of the TXFAULT pin 1 = high (fault); 0 = low (no fault). D[1] LOS Loss of signal. Reflects the state of the LOS pin 1 = high (loss of signal); 0 = low (no loss of signal). D[0] POR MIC3000 power-on status 0 = POR complete, analog data ready; 1 = POR in progress. Notes: 6. RXOPh will contain measured data after one A/D conversion cycle.

October 2004 47 M9999-101204 MIC3000 Micrel Alarm Flags Alarm Register 0 (ALARM0) A7 A6 A5 A4 A3 A2 A1 A0 read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (no events pending) Serial Address A2 h = 1010001b Byte Address 112 = 70 h The power-up default value is 00h. Following the first A/D conversion, however, any of the bits may be set depending upon the results. Bit(s) Function Operation D[7] A7 High temperature alarm, TEMPh > TMAXh. 1 = condition exists, 0 = normal/OK. D[6] A6 Low temperature alarm, TEMPh < TMINh. 1 = condition exists, 0 = normal/OK. D[5] A5 High voltage alarm, VINh > VMAXh. 1 = condition exists, 0 = normal/OK. D[4] A4 Low voltage alarm, VINh < VMINh. 1 = condition exists, 0 = normal/OK. D[3] A3 High laser diode bias alarm, IBIASh > IMAXh. 1 = condition exists, 0 = normal/OK. D[2] A2 Low laser diode bias alarm, IBIASh < IMINh. 1 = condition exists, 0 = normal/OK. D[1] A1 High transmit optical power alarm, 1 = condition exists, 0 = normal/OK. TXOPh > TXMAXh. D[0] A0 Low transmit optical power alarm, 1 = condition exists, 0 = normal/OK. TXOPh < TXMINh. Alarm Register 1 (ALARM1) A15 A14 read-only read-only reserved reserved reserved reserved reserved reserved Default Value 0000 0000 b = 00h (no events pending) Serial Address A2 h = 1010001b Byte Address 113 = 71 h The power-up default value is 00h. Following the first A/D conversion, however, any of the bits may be set depending on the results. Bit(s) Function Operation D[7] A15 High received power (overload) alarm, 1 = condition exists, 0 = normal/OK. RXOPh > RXMAXh. D[6] A14 Low received power (LOS) alarm, 1 = condition exists, 0 = normal/OK. RXOPh < RXMINh. D[5:0] Reserved Reserved - always write as zero.

M9999-101204 48 October 2004 Warning Flags Warning Register 0 (WARN0) W7 W6 W5 W4 W3 W2 W1 W0 read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (no events pending) Serial Address A2 h = 1010001b Byte Address 116 = 74 h The power-up default value is 00h. Following the first A/D conversion, however, any of the bits may be set depending upon the results. Bit(s) Function Operation D[7] W7 High temperature warning, TEMPh > THIGHh. 1 = condition exists, 0 = normal/OK. D[6] W6 Low temperature warning, TEMPh < TLOWh. 1 = condition exists, 0 = normal/OK. D[5] W5 High voltage warning, VINh > VHIGHh. 1 = condition exists, 0 = normal/OK. D[4] W4 Low voltage warning, VINh < VLOWh. 1 = condition exists, 0 = normal/OK. D[3] W3 High laser diode bias warning, IBIASh > IHIGHh. 1 = condition exists, 0 = normal/OK. D[2] W2 Low laser diode bias warning, IBIASh < ILOWh. 1 = condition exists, 0 = normal/OK. D[1] W1 High transmit optical power warning, 1 = condition exists, 0 = normal/OK. TXOPh > TXHIGHh. D[0] W0 Low transmit optical power warning, 1 = condition exists, 0 = normal/OK. TXOPh < TXLOWh. Warning Register 1 (WARN1) W15 W14 read-only read-only read-only read-only read-only read-only read-only read-only Default Value 0000 0000 b = 00h (no events pending) Serial Address A2 h = 1010001b Byte Address 117 = 75 h The power-up default value is 00h. Following the first A/D conversion, however, any of the bits may be set depending on the results. Bit(s) Function Operation D[7] W15 Received power high warning, 1 = condition exists, 0 = normal/OK. RXOPh > RXHIGHh. D[6] W14 Received power low warning, RXOPh < RXMINh. 1 = condition exists, 0 = normal/OK. D[5:0] Reserved Reserved - always write as zero.

October 2004 49 M9999-101204 MIC3000 Micrel OEM Password Entry (OEMPW) Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Default Value 0000 0000 b = 00h (reset to zero at power-on) Serial Address A2 h = 1010001b Byte Address 120 – 123 = 78 h - 7Bh (MSB is 7Bh) This four-byte field is for entry of the password required to access the OEM area of the MIC3000’s memory and registers. A valid OEM password will also permit access to the user areas of memory. The byte at address 123 (7Bh) is the most significant byte. This field is compared to the four-byte OEMPWSET field at serial address A6h, bytes 12 to 15. If the two fields match, access is allowed to the OEM areas of the MIC3000 non-volatile memory at serial ad- dresses A4 h and A6h. The OEM password is set by writing the new value into OEMPWSET. The password compari- son is performed following the write to the MSB, address 7Bh. This byte must be written last! A four-byte burst-write sequence to address 78h may be used as this will result in the MSB being written last. The new password will not take effect until after a power-on reset occurs or a warm reset is performed using the RST bit in OEMCFG0. This allows the new password to be verified before it takes effect. This field is reset to all zeros at power on. Any values written to these locations will be readable by the host regardless of the locked/unlocked status of the device. If OEMPWSET is set to zero (00000000 h), the MIC3000 will remain unlocked regardless of the contents of the OEMPW field. This is the factory default security setting. BYTE Weight

3 OEM Password Entry, Most Significant Byte (Address = 7Bh)

2 OEM Password Entry, 2nd Most Significant Byte (Address = 7Ah)

1 OEM Password Entry, 2nd Least Significant Byte (Address = 79h)

0 OEM Password Entry, Least Significant Byte (Address = 78h)

USER Password Setting (USRPWSET) Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Default Value 0000 0000 b = 00h Serial Address A2 h = 1010001b Byte Address 250 = FA h This register is for setting the password required to access the USER area of the MIC3000’s memory and registers. This field is compared to the USRPW field at serial address A2h, byte 251. If the two fields match, access is allowed to the USER areas of the MIC3000 non-volatile memory at serial addresses A0h and A2h. If a valid USER password has not been entered, writes to the serial ID fields, USRCTRL, and the user scratchpad areas of A0 h and A2h will not be allowed, and USRPWSET will be unreadable (returns all zeroes). A USER password is set by writing the new value into USRPWSET. The new password will not take effect until after a power-on reset occurs or a warm reset is performed using the RST bit in OEMCFG0. This allows the new password to be verified before it takes effect. This register is non-volatile and will be maintained through power and reset cycles. A valid USER or OEM password is required for access to this register. Otherwise, this register will read as 00 h. Note: a valid OEM password overrides the USER password setting. If a valid OEM password is currently in place, the user password will have no effect.

M9999-101204 50 October 2004 USER Password (USRPW) Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Default Value 0000 0000 b = 00h Serial Address A2 h = 1010001b Byte Address 251 = FB h USER passwords are entered in this field. This field is compared to the USRPWSET field at serial address A2h, byte 250. If the two fields match, access is allowed to the USER areas of the MIC3000 non-volatile memory at serial addresses A0 h and A2h. If a valid USER password has not been entered, writes to the serial ID fields and user scratchpad areas of A0h and A2h will not be allowed and USRPWSET will be unreadable (returns all zeroes). Power-On Hours MSB (POHh) read-only read/write read/write read/write read/write read/write read/write read/write POH Fault Flag (POHFLT) Default Value 0000 0000 b = 00h Serial Address A2 h = 1010001b Byte Address 252 = FC h The lower seven bits of this register contain the most-significant bits of the 15-bit power-on hours measurement. POHFLT is an error flag. The value in this register should be combined with the Power-on Hours, Low Byte, POHl, to yield the complete result. If POHFLT is set, the power-on hour meter data has been corrupted and should be ignored. It is recommended that a two-byte (or more) sequential read operation be performed on POHh and POHl to insure coherency between the two registers. This register is non-volatile and will be maintained through power and reset cycle. Bit(s) Function Operation D[7] Power-on hours fault flag 1 = fault; 0 = no fault. D[6:0] Power-on hours, high byte Non-volatile. Power-On Hours LSB (POHl) read/write read/write read/write read/write read/write read/write read/write read/write POH Fault Flag (POHFLT) Default Value 0000 0000 b = 00h Serial Address A2 h = 1010001b Byte Address 253 = FD h This register contains the least-significant eight bits of the 15-bit power-on hours measurement. The value in this register should be combined with the Power-on Hours, High Byte, POHh, to yield the complete result. If POHFLT is set, the power-on hour meter data has been corrupted and should be ignored. It is recommended that a two-byte (or more) sequential read operation be performed on POHh and POHl to insure coherency between the two registers. This register is non-volatile and will be maintained through power and reset cycles.

October 2004 51 M9999-101204 MIC3000 Micrel Data Ready Flags (DATARDY) TRDY VRDY IRDY TXRDY RXRDY read only read only read only read only read only reserved reserved reserved Default Value 0000 0000 b = 00h Serial Address A2 h = 1010001b Byte Address 254 = FE h When the A/D conversion for a given parameter is completed and the results available to the host, the corresponding data ready flag will be set. The flag will be cleared when the host reads the corresponding result register. Bit(s) Function Operation D[7] TRDY Temperature data ready flag 0 = old data; 1 = new data ready D[6] VRDY Voltage data ready flag 0 = old data; 1 = new data ready D[5] IRDY Bias current data ready flag 0 = old data; 1 = new data ready D[4] TXRDY Transmit power data ready flag 0 = old data; 1 = new data ready D[3] RXRDY Receive power data ready flag 0 = old data; 1 = new data ready D[2:0] Reserved Reserved USER Control Register (USRCTL) PORM PORS IE APCSEL reserved read/write read only read/write read/write read/write reserved reserved Default Value 0010 0000 b = 20h Serial Address A2 h = 1010001b Byte Address 255 = FF h This register provides for control of the nominal APC setpoint and management of interrupts by the end-user. APCSEL[1:0] select which of the APC setpoint registers, APCSET0, APCSET1, or APCSET2 are used as the nominal automatic power control setpoint. IE must be set for any interrupts to occur. If PORM is set, the power-on event will generate an interrupt and warm resets using RST will not generate a POR interrupt. When a power-on interrupt occurs, assuming PORM=1, PORS will be set. PORS will be cleared and the interrupt output de-asserted when USRCTL is read by the host. If IE is set while / INT is asserted, /INT will be de-asserted. The host must still clear the various status flags by reading them. If PORM is set following the setting of PORS, PORS will remain set, and /INT will not be de-asserted, until USRCTL is read by the host. PORM, IE, and APCSEL are non-volatile and will be maintained through power and reset cycles. A valid USER password is required for access to this register. Bit Function Operation D[7] Reserved Always write as zero; reads undefined. D[6] PORM Power-on interrupt mask 1 = POR interrupts enabled; 0 = disabled; read/write; non-volatile. D[5] PORS Power-on interrupt flag 1 = POR interrupt occurred; 0 = no POR interrupt; read-only. D[4] IE Global interrupt enable 1 = enabled; 0 = disabled; read/write; non-volatile. D[3:2] APCSEL Selects APC setpoint register 00 = APCSET0, 01 = APCSET1, 10 = APCSET2; 11 = reserved; read/write; non-volatile. D[1:0] Reserved Always write as zero; reads undefined.

M9999-101204 52 October 2004 OEM Configuration Register 0 (OEMCFG0) RST ZONE DFLT OE MODREF VAUX[2] VAUX[1] VAUX[0] write only read/write read only reserved reserved read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 00 = 00 h A write to OEMCFG0 will result in any A/D conversion in progress being aborted and the result discarded. The A/D will begin a new conversion sequence once the write operation is complete. All bits in OEMCFG0 are non-volatile except DFLT and RST. A valid OEM password is required for access to this register. Bit(s) Function Operation D[7] RST 0 = no action; 1 = reset; write-only. D[6] ZONE Selects temperature zone. 0 = internal; 1 = external; non-volatile. D[5] DFLT Diode fault flag. 1 = diode fault; 0 = OK. D[4] OE Output enable for SHDN, V MOD, and VBIAS. 1 = enabled; 0 = hi-Z; non-volatile. D[3] MODREF Selects whether V MOD is referenced to ground 1 = V DD; 0 = GND; non-volatile. or VDD. D[2:0] VAUX[2:0] Selects the voltage reported in VINh:VINl. 000 = V IN; 001 = VDDA; 010 = VBIAS; 011 = VMOD; 100 = APCDAC; 101 = MODDAC; 110 = FLTDAC; non-volatile OEM Configuration Register 1 (OEMCFG1) INV GAIN BIASREF RFB[2] RFB[1] RFB[0] SRCE SPOL read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 1 = 01 h A write to OEMCFG1 will result in any A/D conversion in progress being aborted and the result discarded. The A/D will begin a new conversion sequence once the write operation is complete. All bits in OEMCFG1 are non-volatile and will be maintained through power and reset cycles. A valid OEM password is required for access to this register.

October 2004 53 M9999-101204 MIC3000 Micrel Bit(s) Function Operation D[7] INV Inverts the APC op-amp inputs. When set to “0” 0 = emitter follower (no inversion); the BIAS DAC output is connected to the “+” 1 = common emitter (inverted); read/write; input and FB is connected to the “–” input of the non-volatile. op amp. Set to “0” to use the ADC feedback loop. D[6] GAIN Sets the feedback voltage range by changing the 1 = VREF/4 full scale; APCDAC output swing; 0-VREF for optical 0 = VREF full scale; read/write ;non-volatile. feedback, 0-VREF/4 for electrical feedback. D[5] BIASREF Selects whether FB and VMPD are referenced to 1 = VDD; 0 = GND; read/write; non-volatile. ground or VDD and selects feedback resistor termination voltage (VDDA or GNDA). D[4:2] RFB[2:0] Selects internal feedback resistance. (Resistors 000 = ∞; will be terminated to VDDA or GNDA according 001 = 800 Ω, to BIASREF.) 010 = 1.6k Ω, 011 = 3.2kΩ, 100 = 6.4kΩ, 101 = 12.8kΩ, 110 = 25.6kΩ, 111 = 51.2kΩ; read/write; non-volatile. D[1] SRCE V BIAS source vs. sink drive. 1 = source (NPN), 0 = sink (PNP); read/write; non-volatile. D[0] SPOL Polarity of shutdown output, SHDN, when active. 1 = high; 0 = low; read/write; non-volatile. OEM Configuration Register 2 (OEMCFG2) I2CADR[3] I2CADR[2] I2CADR[1] I2CADR[0] LUTOFF LUTOFF LUTOFF LUTOFF read/write read/write read/write read/write read/write read/write read/write read/write Default Value 1010 xxxx b = xxh (slave address = 1010xxxb) Serial Address A6h = 1010011 b Byte Address 2 = 02 h CAUTION: Changes to I2CADR take effect immediately! Any accesses following a write to I2CADR must be to the newly programmed serial bus address. A valid OEM password is required for access to this register. This register is non-volatile and will be maintained through power and reset cycles. Bit(s) Function Operation D[7:4] I2CADR[3:0] Upper four MSBs of the serial bus slave address; Read/write; non-volatile. writes take effect immediately. D[3:0] LUTOFF LUT offset. LUTOFF is added to the result of the Read/write; non-volatile. digital temperature sensor to derive the table index; writes take effect after reset.

M9999-101204 54 October 2004 APC Setpoint 0 (APCSET0) Automatic power control setpoint (unsigned binary) used when APCSEL[1:0] = 00 read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 3 = 03 h directly into the VBIAS DAC, bypassing the look-up table entirely. In either case, the VBIAS DAC setting is reported in the VBIAS register. The APCCFG bits determine the DAC’s response to higher or lower numeric values. A valid OEM password is required for access to this register. This register is non-volatile and will be maintained through power and reset cycles. APC Setpoint 1 (APCSET1) Automatic power control setpoint (unsigned binary) used when APCSEL[1:0] = 01 read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 4 = 04 h directly into the VBIAS DAC, bypassing the look-up table entirely. In either case, the VBIAS DAC setting is reported in the VBIAS register. The APCCFG bits determine the DAC’s response to higher or lower numeric values. This register is non-volatile and will be maintained through power and reset cycles. A valid OEM password is required for access to this register. APC Setpoint 2 (APCSET2) Automatic power control setpoint (unsigned binary) used when APCSEL[1:0] = 10 read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 5 = 05 h directly into the VBIAS DAC, bypassing the look-up table entirely. In either case, the VBIAS DAC setting is reported in the VBIAS register. The APCCFG bits determine the DAC’s response to higher or lower numeric values. This register is non-volatile and will be maintained through power and reset cycles. A valid OEM password is required for access to this register.

October 2004 55 M9999-101204 MIC3000 Micrel Modulation DAC Setting (MODSET) Nominal VMOD setpoint read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 6 = 06 h When A.P.C. is on, the value corresponding to the current temperature is taken from the MODLUT look-up table, added to MODSET and loaded into the VMOD DAC. This register is non-volatile and will be maintained through power and reset cycles. A valid OEM password is required for access to this register. IBIAS Fault Threshold (IBFLT) Bias current fault threshold read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 7 = 07 h A valid OEM password is required for access to this register. This register is non-volatile and will be maintained through power and reset cycles. A fault is generated if the bias current is higher than IBFLT value set in this register. Transmit Power Fault Threshold (TXFLT) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 8 = 08 h A valid OEM password is required for access to this register. This register is non-volatile and will be maintained through power and reset cycles. A fault is generated if the Transmit power is higher than TXFLT value set in this register. Loss-Of-Signal Threshold (LOSFLT) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 9 = 09 h A valid OEM password is required for access to this register. This register is non-volatile and will be maintained through power and reset cycles. A fault is generated if the received power is lower than LOSFLT value set in this register. Bit Function Operation D[7:0] Receive loss-of-signal threshold Read/write; non-volatile.

M9999-101204 56 October 2004 Fault Suppression Timer (FLTTMR) Fault suppression interval in increments of 0.5ms read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 10 = 0A h Saturation faults are suppressed for a time, tFLTTMR, following laser turn-on. This avoids nuisance tripping while the APC loop starts up. The length of this interval is (FLTTMR×0.5ms), typical. A value of zero will result in no fault sup- pression. A valid OEM password is required for access to this register. This register is non-volatile and will be main- tained through power and reset cycles. Fault Mask (FLTMSK) OEMIM POHE SATMSK TXMSK IAMSK DFMSK read/write read/write reserved reserved read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 11 = 0B h A valid OEM password is required for access to this register. This register is non-volatile and will be maintained through power and reset cycles. Bit Function Operation D[7] OEMIM OEM interrupt mask bit 1 = masked; 0 = enabled; Read/write; non-volatile. D[6] POHE OEM Power-on Hour Meter enable bit 1 = enabled; 0 = disabled; Read/write; non-volatile. D[5:4] D[5:4] Reserved Always write as zero; reads undefined. D[3] SATMSK APC saturation fault mask bit 1 = masked; 0 = enabled; Read/write; non-volatile. D[2] TXMSK High TX optical power fault mask bit 1 = masked; 0 = enabled; Read/write; non-volatile. D[1] IAMSK Bias current high alarm mask bit 1 = masked; 0 = enabled; Read/write; non-volatile. D[0] DFMSK Diode fault mask bit 1 = masked; 0 = enabled; Read/write; non-volatile. OEM Password Setting (OEMPWSET) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 12 - 15 = 0F h - 0Fh; 0Ch = MSB This four-byte field is the password required for access to the OEM area of the MIC3000’s memory and registers. The byte at address 250 (FAh) is the most significant byte. This field is compared to the four-byte OEMPW field at serial address A2h, byte 120 to 123. If the two fields match, access is allowed to the OEM areas of the MIC3000 non-volatile memory at serial addresses A4h and A6h. The OEM password may be set by writing the new value into OEMPWSET. The new password will not take effect until after a power-on reset occurs or a warm reset is performed using the RST bit in OEMCFG0. This allows the new password to be verified before it takes effect. These registers are non-volatile and will be maintained through power and reset cycles. A valid OEM password is required for access to this register.

October 2004 57 M9999-101204 MIC3000 Micrel BYTE Weight

3 OEM Password, Most Significant Byte

2 OEM Password, 2nd Most Significant Byte

1 OEM Password, 2nd Least Significant Byte

0 OEM Password, Least Significant Byte

OEM Calibration 0 (OEMCAL0) FLTDIS FSPIN WRINH APCCAL FRCINT FRCTXF FRCLOS reserved read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 16 = 10 h A valid OEM password is required for access to this register. Bit Function Operation D[7] Reserved Always write as zero; reads undefined. D[6] FLTDIS Fault comparator disable; inhibits output of fault 0 = faults enabled; 1 = disabled; Read/write. comparators when set. D[5] FSPIN Fault comparator “spin-on-channel” mode select; 0 = normal operation; 1 = spin on channel; do not enable ADC and FC spin-on-channel Read/write. modes simultaneously. D[4] WRINH Inhibit NVRAM write cycles. 0 = normal operation; 1 = inhibit writes; Read/write. D[3] APCCAL Selects APC calibration mode - DACs may be 0 = normal mode; 1 = calibration mode; Read/write. controlled directly. D[2] FRCINT Forces the assertion of /INT 0 = normal operation; 1 = asserted; Read/write. D[1] FRCTXF Forces the assertion of TXFAULT 0 = normal operation; 1 = asserted; Read/write. D[0] FRCLOS Forces the assertion of RXLOS 0 = normal operation; 1 = asserted; Read/write. OEM Calibration 1 (OEMCAL1) ADSTP ADIDL 1SHOT ADSPIN SPIN[2] SPIN[1] SPIN[0] reserved read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 17 = 11 h A valid OEM password is required for access to this register.

M9999-101204 58 October 2004 Bit Function Operation D[7] Reserved Always write as zero; reads undefined. D[6] ADSTP Stop ADC Halts the analog to digital converter 0 = normal operation; 1 = stopped; Read/write. D[5] ADIDL ADC idle flag 0 = busy; 1 = idle; Read/write. D[4] 1SHOT Triggers one-shot A/D conversion cycle 0 = normal operation; 1 = one-shot; Read/write. D[3] ADSPIN Selects ADC spin-on-channel mode; do not 0 = normal operation; 1 = spin-on-channel; enable ADC and FC spin-on-channel modes Read/write. simultaneously D[2], D[1], SPIN[2:0] ADC and fault comparator (FC) channel select for ADC: 000 = temperature; 001 = voltage; 010 = VILD; D[0] spin-on-channel mode; do not enable ADC and 011 = VMPD; 100 = VRX; FC: 001 = VILD; FC spin-on-channel modes simultaneously 001 = VMPD; 010 = VRX; Read/write. Look-Up Table Index (LUTINDX) Look-up table index as determined by temperature compensation logic read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6h = 1010011b Byte Address 18 = 12h The look-up table index is derived from the current temperature measurement and LUTOFF as follows: INDEX LUTOFF= ⎛ ⎝⎜ ⎞ ⎠⎟ +TAVG ()µ 2 where TAVG(n) is the current average temperature. This register allows the current table index to be read by the host. The table base address must be added to LUTINDX to form a complete table index in physical memory. A valid OEM password is required for access to this register. Otherwise, reads are undefined. BIAS DAC Setting (APCDAC) Current VBIAS setting read only read only read only read only read only read only read only read only Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 20 = 14 h This register reflects (reads back) the value set in the APC register (APCSET0, APCSET1, or APCSET2 whichever is selected). A valid OEM password is required for access to this register. Modulation DAC Setting (MODDAC) Current VMOD setting read only read only read only read only read only read only read only read only Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 21 = 15 h This register reflects (reads back) the value set in the MODSET register. A valid OEM password is required for access to this register.

October 2004 59 M9999-101204 MIC3000 Micrel OEM Readback Register (OEMRD) INT APCSAT IBFLT TXFLT RSOUT reserved reserved reserved read only read only read only read only read only Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 22 = 16 h This register reflects (reads back) the status of the bits corresponding to the parameters defined below. A valid OEM password is required for access to this register. Otherwise, reads are undefined and writes are ignored. Bit Function Operation D[7:5] Reserved Always write as zero; reads undefined. D[4] INT Mirrors state of /INT but active-high; not state of 1 = interrupt; 0 = no interrupt. physical pin! D[3] APCSAT APC saturation fault comparator output state 1 = fault; 0 = normal operation. D[2] IBFLT State of IBIAS over-current fault comparator 1 = fault; 0 = normal operation; read-only. output D[1] TXFLT State of transmit power fault comparator output 1 = fault; 0 = normal operation; read-only. D[0] RSOUT State of the rate select output pin, RSOUT 1 = high; 0 = low; Read-only. Power-On Hour Meter Data (POHDATA) read/write read/write read/write read/write read/write read/write read/write read/write Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address 32-39 = 20 h - 27h These registers are used for backing up the POH result during power cycles. At power-up, the POH meter selects the larger of the two values as the initial count. Incremental results are stored in alternate register pairs. The power-on hour meter may be reset or preset by writing to these registers. These registers are non-volatile and will be maintained through power and reset cycles. A valid OEM password is required for access to these registers. BYTE Weight

3 POHA, high-byte

2 POHA, low-byte

1 POHB, high-byte

0 POHB, low-byte

OEM Scratchpad Registers (SCRATCHn) Default Value 0000 0000 b = 00h Serial Address A6 h = 1010011b Byte Address SCRATCH0: 126 = 7E h SCRATCH1: 127 = 7F h SCRATCH2: 128 = 80 h SCRATCH127: 253 = FD h The scratchpad registers are general-purpose non-volatile memory locations. They can be freely read from and written to any time the MIC3000 is in OEM mode.

M9999-101204 60 October 2004 Manufacturer ID Register (MFG_ID) Identifies Micrel as the manufacturer of the device. Always returns 2Ah read only read only read only read only read only read only read only read only 0 0101 01 0 Default Value 0010 1010b = 2A h Serial Address A6 h = 1010011b Byte Address 254 = FE h The value in this register, in combination with the DEV_ID register, serve to identify the MIC3000 and its revision number to software. This register is read-only. Bit(s) Function Operation D[7:0] Identifies Micrel as the manufacturer of the device. Read only. Always returns A h Always returns 2Ah. Device ID Register (DEV_ID) read only read only read only read only read only read only read only read only MIC3000 DEVICE ID DIE REVISION always reads as zero “0” at D [4-7] Default Value 0000 xxxx b = 0xh Serial Address A6 h = 1010011b Byte Address 255 = FF h The value in this register, in combination with the MFG_ID register, serve to identify the MIC3000 and its revision number to software. This register is read-only.

Figure 33. Redundant Switch Circuits ductive plastic, insulate the device from the ambient air. these should also work well. Table 22. Transistors Suitable for tens of milliwatts, leading to self-heating on the order of 1°C. SHDN current I OL × VOL Negligible if MOSFET is used as shutdown device. VBIAS current V BIAS × IVBIAS or (VDD–VBIAS) × IVBIAS Worst-case is VREF × 10mA = 1.22V × 10mA = 12.3mW. VMOD current V MOD × IVMOD or (VDD–VMOD) × IVMOD Worst-case is VREF × 10mA = 1.22V × 10mA = 12.3mW. RSOUT current I OL × VOL Only for rate-agile applications using RSIN/RSOUT. Table 23. Contributors to Self-Heating

M9999-101204 68 October 2004 MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2004 Micrel, Incorporated.

Package Information

24-Pin MLF™ (ML)

Product Information

MIC3000 specifications and overview.

Summary

SFP Management IC

Description

SFP Management IC

Source title MIC3000 Datasheet(PDF) - Micrel Semiconductor

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