MGCM01

MGCM01 ZARLINK | Alldatasheet

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TDMA/AMPS Baseband Interface DS2497 ISSUE 3.3 December 2002

Ordering Information

The inputs for the receive path are I and Q signals at an IF of 60kHz. The I and Q signals are filtered by a 60kHz switched capacitor bandpass filter and are then demodulated to give baseband I and Q signals. The MGCM01 also provides voltage gain so that the baseband outputs can be input directly to an A to D converter. The internal FM discriminator can be used for demodulating AMPS signals; the receive path also provides RSSI. Transmit I and Q baseband signals from D to A converters can be input directly to the MGCM01, which provides reconstruction filters and a variable gain buffer. The two PLL synthesisers are used for generation of the receive and transmit IF LO signals.

Features

G IS136 TDMA/AMPS Compatible G Channel Filtering (30kHz) G FM Demodulator G RSSI Output G Dual IF Synthesisers G Flexible Power Control G Fully Programmable via Serial Bus G 3 Volt operation G 48-pin TQFP package

Applications

G Dual Mode TDMA/AMPS Mobile Telephones G Dual Band (PCS1900/900) TDMA/AMPS Mobile Telephones G PCS 1900 TDMA Mobile Telephones

Description

The MGCM01 provides channel filtering for IS136 TDMA/ AMPS mobile telephones. Figure 1 - MGCM01 block diagram 90° FM DISCRIMINATOR RSSI S 60kHz ATTENUATOR ATTENUATOR RXQ OP 1/2 AUDIO FB AUDIO RSSI FB RSSI RXI OP1/2RECEIVE SECTION TX FM TXI OP1/2 TXQ OP 1/2 TXI IP1/2 TXQ IP1/2 RXI IP1/2 RXQ IP1/2 TRANSMIT SECTION RX PD LOCK DET TX PD RX TX RX VCO TX VCO SCLK SDAT SLATCH RESET PCA CONTROL SYNTHESISERS LOCK SELECT 38UHF LOCK 25

V DD GND RXI OP1 RXI OP2 RXQ OP 1 RXQ OP 2 RXI IP1 RXI IP2 RXQ IP1 RXQ IP2 VDD RX PD GND RX VCO GND TX VCO VDD TX PD UHF LOCK TXQ OP 1 TXQ OP 2 TX FM TXI OP1 TXI OP2 VDD TXI IP2 TXI IP1 GND TXQ IP2 TXQ IP1 PIN 1 RTUNE VBG RESET PCA SLATCH SCLK GND VDD TCXO SDAT LOCKDET GND MGCM01 TP48 Figure 2 - Pin connections - top view Name RXQ OP- RXQ OP+ RXI OP- RXI OP+ GND V DD RSSI GND AUDIO AUDIO FB RSSI FB GND RXI IP+ RXI IP- RXQ IP+ RXQ IP- V DD RX PD GND RX VCO GND TX VCO V DD TX PD Type O O O O GND PWR O GND O I I GND I I I I PWR O GND I GND I PWR O Baseband receive Q output- Baseband receive Q output+ Baseband receive I output- Baseband receive I output+ Ground (substrate connection) Power - RSSI/demodulator RSSI output Ground - RSSI/demodulator Demodulator audio/data output Demodulator feedback RSSI feedback Ground - receive section Receive I Input+ Receive I Input- Receive Q Input+ Receive Q Input- Power - receive section Rx PLL charge pump output Ground (substrate connection) Receive IF PLL input Ground - synthesiser Transmit IF PLL input Power - synthesiser Tx PLL charge pump output Pin Name UHF LOCK TXQ OP+ TXQ OP- TX FM TXI OP+ TXI OP- V DD TXI IP- TXI IP+ GND TXQ IP- TXQ IP+ GND LOCK DET SDAT TCXO V DD GND SCLK SLATCH PCA RESET V BG RTUNE Type I O O O O O PWR I I GND I I GND O I I PWR GND I I I I O I UHF synthesiser lock input Transmit Q output+ Transmit Q output- Transmit FM output Transmit I output+ Transmit I output- Power - transmit section Transmit I input- Transmit I input+ Ground TX channel Transmit Q input- Transmit Q input+ Ground (substrate connection) Synthesiser lock detect output Serial interface, serial data in 19·44MHz reference from TCXO Power supply - digital Ground - digital Serial interface clock Serial interface latch Power control assert Chip master reset (active low) Bandgap reference decoupling Bias Ref. - connect 100kΩ to GND Table 1 Pin descriptions Pin Absolute Maximum Ratings Supply voltage (VDD ) Voltage applied to any pin Operating temperature -0·3V to +3·9V -0·3V to V DD +0·3V -30°C to +100°C Storage temperature Max. junction temperature ESD (Human Body Model) -55°C to +150°C +15 0°C 2kV

Electrical Characteristics

TAMB = -30°C to +85°C, VDD = 3V ±10%, VEE = 0V. These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage ranges unless otherwise stated. Characteristic ConditionsMin. Value Typ. 0·8VDD 0·6VDD 100 0·5 550 5·2 2·8 19·44 Supply Current Sleep Power down Receive section (I/Q) Receive section (FM) Receive section (I/Q) Receive section (FM) Transmit section (I/Q) Transmit section (FM) Logic Inputs Input voltage high, V IH Input voltage low, VIL Input current Input capacitance Logic Outputs Output voltage low, VOL Output voltage high, VOH Output current Serial Control Timing SDATA set up time, t1 SDATA hold time, t2 SCLK pulse width t3 SLATCH set up time, t4 SLATCH pulse width, t5 SCLK period, t6 Switch on/off times TX turn on/turn off time RX turn on/turn off time TCXO Input Input resistance Input capacitance Input sensitivity Frequency Max. 100 12·5 5·5 0·2V DD 0·4 0·5 1·0 Units µA µA mA mA mA mA mA mA V V nA pF V V mA ns ns ns ns ns ns ms ms kΩ pF Vp-p MHz Reference circuits active At 25°C and VDD = 3·0V At 25°C and VDD = 3·0V VIN = 0V to VDD See Figure 3 AC coupled Figure 3 - Serial bus timing diagram t3t1 t2 t6 t5t4 SLCK SDATA SLATCH BIT 23 BIT 22 BIT 21 BIT 0 cont…

Electrical Characteristics (continued) Characteristic Conditions RSSI Dynamic range Accuracy RSSI slope Input signal Input signal RSSI output level Attenuator gain Attenuator switch-in level Attenuator switch-out level RSSI output impedance Transmit (I/Q and FM) Gain Input DC voltage Output DC voltage Input signal range Output signal range Output amplitude balance Output phase balance Output DC offset 3dB filter bandwidth Gain ripple Group delay variation Stop band attenuation Noise, in band Noise 20 to 45kHz Noise 45 to 60 kHz Noise >= 60 kHz Synthesisers Input frequency Input sensitivity Charge pump current, I O Charge pump output compliance Internal attenuator enabled Internal attenuator disabled Input referred Input referred See Table 9 See Table 9 See Table 9 See Table 9 See Table 9 Note 6 Note 6 0 to 12·5kHz 0 to 12·5kHz 100kHz to 2 MHz >2MHz Note 7 BW = 300Hz BW = 300Hz BW = 300Hz Default mode, see Table 12 See Table 12 See Table 12 See Table 12 I O ±15% Units dB dB mV/dB mV mV V dB mV mV kΩ dB dB dB dB dB V V Vp-p Vp-p dB deg mVp-p kHz dB µs dB dB dBc dBc dBc dBc MHz mV µA µA µA µA V 110 VDD /2+1·2 -33·5 9·5 6·5 3·5 0·5 1·4 +0·3 0·7 -50 -60 -75 -85 115 600 210 115 V DD -0·5 Max.Typ. -32·5 4·5 2·25 0·8 1·2 496 176 Min. Value 0·024 0·024 V DD /2-1·2 -31·5 8·5 5·5 2·5 -0·5 1·0 -0·3 100 400 140 0·5 NOTES 1. All signal voltages are RMS unless stated otherwise. 2. Level of out of band blocking signal to cause 1dB compression of in band wanted signal. 3. Measured with unmodulated blocking signals at 60 and 120kHz. 4. These filter characteristics are for the 60kHz bandpass filter. This provides all the filtering in FM mode. There is additional filtering in l/Q mode provided by the baseband low pass filters. Details are shown in Figure 4. 5. Extrapolate linearly between 22kHz-38kHz, 82kHz-98kHz. 6. The input and output signal ranges are the maximum available. For example if the input signal is 2V pk-pk then the programmed gain must only be 0dB. 7. Noise relative to full scale signal.

Figure 5 - Bandpass filter response 0 30 60 90 120 150 FREQUENCY (kHz)

100 ATTENUATION (dB)

Figure 5a - Filter response Figure 5b Passband detail 30 60 90 70 80 FREQUENCY (kHz)

25 ATTENUATION (dB)

Figure 6 - Bandpass filter image response ANTI-ALIAS AND BANDPASS FILTERS I Q 60kHz ATT. 32·5dB ATT. 32·5dB RSSI DETECTOR RSSI STATE MACHINE VTH 1·4n 27k RSSI FB RSSI 11 7 EXTERNAL COMPONENTS Figure 7 - RSSI block diagram Figure 8 - RSSI characteristic INPUT SIGNAL (dBm) RSSI OUTPUT (V) VDD 06 0 9 0 FREQUENCY (kHz) 100

120 ATTENUATION (dB)

TDMA IS136 Mode I/Q Modulation The inputs to the MGCM01 are derived from baseband D to A converters. These signals are passed through variable gain buffers. The gain of the buffers can be programmed from 0 to 12 dB in 3 dB increments, as shown in Table 9, allowing compatibility with a number of baseband and transmit modulator devices. The buffers are followed by reconstruction filters to remove spurious responses from preceding D to A converters. These filters are third order Butterworth with 25kHz cut off frequency. The filters contain automatic calibration to set the cut off frequency. This can be controlled via the serial programming bus. All inputs and outputs are differential AMPS FM Mode In this mode the input can be either a single ended or differential signal from a baseband D to A converter. The output is a single ended signal and is used to directly modulate the transmit IF. The signal path is the same as for l/Q mode but with only the I channel active and the Q channel powered down. The l+, Q+ outputs are switched high and the l-, Q- outputs are switched low to set the modulator in the Zarlink Semiconductor MGCT02 (Moon) chip to FM mode. SYNTHESISERS Two VHF PLL synthesisers are included for the generation of receive and transmit IF LO signals. The synthesisers are compatible with the VCO and prescaler circuits on the Zarlink Semiconductor MGCT02 and MGCR01 devices. The two synthesisers are identical. The synthesisers include 2-modulus prescalers with programmable division ratio from 8/9 to 128/129, as detailed in Table 11, followed by an 11-bit programmable counter and 7-bit swallow counter to control the 2-modulus prescaler. The reference divider is a fully programmable 15-bit counter. The reference frequency is a 19·44MHz TCXO. The synthesiser charge pumps can be programmed to four current levels, as shown in Table 12, to drive the appropriate loop filters. The synthesisers also provide lock detect outputs. There is also a UHF LOCK input, pin 25, which can be connected to the system UHF synthesiser and is then gated with MGCM01 lock detect to give a combined output to the baseband controller via LOCK DETECT output, pin 38. This logic can use either the receive or transmit lock detect as selected via the serial bus. PROGRAMMING The MGCM01 features very flexible programming via the 3-wire serial bus. Data is clocked in 24-bit words with a latch pulse following the final data bit. The latch input must be held low at all other times. The serial bus not only programs the modes of operation but also enables unused sections of the chip to be powered on and off as required. This is particularly important in a TDMA system when the phone does not receive or transmit all of the time. An added feature is the PCA (Power Control Assert), pin 45, which allows the MGCM01 to alternate between receive and transmit modes without reloading cammands via the serial bus and give more accurate timing. Details of the serial bus are shown in Table 4. A total of 8 words can be programmed but some of these are for test purposes only and are not required in normal applications. The programming is described in more detail in the following sections. Serial bus timing is shown in the Electrical Characteritics and Figure 3.

23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X RXDIV<17:0> TXDIV<17:0> X X X X X X X X X X X X X X X X X X X X X RPP X TLI X RLI TPP X X XX TPR<2:0> PCS<2:0> CALCO<7:0> TEST RPR<2:0> X RSS RX TTC RTC TCP<1:0>RCP<1:0> TXC X REFRX<14:0> REFTX<14:0> LDC X X X X X X CONT<3:0> Table 4 Serial bus details X RXDIV<17:0> TXDIV<17:0> REFRX<14:0> REFTX<14:0> RCP , TCP<1:0> RTC, TTC RPR, TPR<2:0> RPP , TPP TLI, RLI LDC TX<1:0> PCS<2:0> RX TXG<2:0> RSS CONT<3:0> TXC TC<3:0> CALCO<7:0> Not used Receive synthesiser (LO2) division ratio Transmit synthesiser division ratio Receive synthesiser reference division ratio Transmit synthesiser reference division ratio Receive/Transmit synthesiser charge pump current control Receive/Transmit synthesiser charge pump tristate control Receive/Transmit synthesiser prescaler ratio Receive/Transmit synthesiser phase detector polarity Receive/Transmit lock detect invert Lock detect select Transmit control Power Control system Receive mode Transmit gain RSSI control Receive control Transmit calibrate Transmit calibrate control - set to 1000 Sets transmit cut off frequency - set to 00001100 for standard 25kHz cutoff Receive Programming The MGCM01 has two basic receive modes: 1. I/Q mode. The 60 kHz IF signal is mixed down to baseband I and Q signals. This mode is used for IS136 TDMA and may also be used for AMPS. 2. FM mode. The baseband l/Q path is powered down and the MGCM01 discriminator is used for demodula- tion. This mode can be used for AMPS. These modes are selected by the RX mode bit, Word 7, Bit 11 as shown in Table 5. RX Mode I/Q FM Table 5 Table 6 Additional control is provided by the receive control bits, Word 7 Bits 9:6 (CONT<3:0>). CONT<2> sets the bandwidth of the 60 kHz bandpass filter. The low bandwidth mode (CONT<2> = 1 ) should be used for FM mode. However, the higher bandwidth mode (±20 kHz) may be used in TDMA operation. The input attenuator control CONT<3> is active with RSS set to 1 and inactive if RSS is set to 0, as described in the next section. Mode 56dB gain (default) ±20kHz bandwidth ±16kHz bandwidth Attenuator enabled Attenuator disabled CONT<3:0> X X X X X X X X X X X X X X

RSS Word 7 Bit 12 allows manual control of the input attenuator in conjunction with CONT<3>. Transmit Programming MGCM01 has two basic transmit modes. 1. I/Q mode. I and Q signals from baseband digital to analog converter are filtered and buffered. This mode is used for IS136 TDMA. 2. FM mode. This is used for direct FM modulation of transmit IF oscillator. These modes are controlled by TX <1:0>, Word 6 Bits 9 to 8, as shown in Table 8. Table 8 TX<1:0> Mode TDMA FM A calibration of the transmit filters can be initialised by set- ting TXC, Word 6 Bit 10 to 1. After calibration the internal register for this bit is reset to 0. The transmit gain can be programmed by TXG<2:0>, Word 6 Bits 13 to 11, as shown in Table 9. X X TXG<2:0> Gain (dB) Table 9 Transmit Calibration This is initiated by setting TXC, Word 6 Bit 10 high. Calibration takes approximately 0.6ms. In order for the calibration to give the required cutoff, CALCO<7:0> Word 8 Bits 23 to 16, must be set to 00001100. The calibration code is then stored in TC<3:0>, Word 6 Bits 6 to 3 and TXC is reset low. If TC<3:0> is overwritten then a further calibration is required. Synthesiser Programming The receive and transmit synthesisers are of a similar design and use identical programming. Each synthesiser includes a dual modulus (N, N+1) prescaler followed by A and M counters giving a total division ratio of MN+A, where M is an 11-bit number A is a 7-bit number N is the prescaler modulus; this can also be programmed. The value of A must be less than N. The A and M values are combined to give the RXDIV, TXDIV values in Words 1 and 2. Receive Synthesiser The M value is programmed in Word 1 Bits 20 to10; the A value is programmed in Word 1 Bits 9 to 3 The reference divider REFRX, a 15-bit number, is programmed in Word 3 bits 17 to 3. The dual modulus prescaler is programmed by RPR<2:0>, Word 5 Bits 14:12, as shown in Table 10 X X TPR<2:0> Prescaler ratio Table 11 X X RPR<2:0> Prescaler ratio Table 10 Transmit Synthesiser The M value is programmed in Word 2 Bits 20 to 10; the A value is programmed in Word 2 Bits 9 to 3. The reference divider REFTX, a 15-bit number, is programmed in Word 4 Bits 17 to 3. The dual modulus prescaler is programmed by TPR<2:0>, Word 5 Bits 17 to 15, as shown in T able 11. Table 7 RSS Operation Normal attenuator mode Manual attenuator

is independent but has the same format. 7 to 6 and Bits 9 to 8 respectively, as shown in Table 12. and overall synthesiser performance. the transmit synthesiser as shown in Table 13. 11 and 10 respectively as shown in Table 14. Table 17. The RLI and TLI bits should be set to 0. The combined lock detect output is available on Pin 38. normal operation lock detect outputs are high when locked. Word 5 Bit 5, as shown in T able 16. except the power control circuits. Sleep As deep sleep but voltage reference circuits active. Duplex Receive and Transmit channels active. or FM mode is required before setting RX or Duplex mode. RSSI Off RSSI circuitry off when receive mode selected. These power control modes are activated by the PCA pin. serial bus in conjunction with the PCA pin.

Figure 11 - Typical IS136 application RXI OP1 RXI OP2 RXQ OP 1 RXQ OP 2 AUDIO RSSI TXI IP1 TXI IP2 TXQ IP1 TXQ IP2 RXI IP1 RXI IP2 RXQ IP1 RXQ IP2 RXVCO RXPD TCXO TXFM TXPD TXVCO TXI OP1 TXI OP2 TXQ OP 1 TXQ OP 2 LOOP FILTER AND TANK IOUT IOUT QOUT QOUT VHF_BUF VHF_RES 19·44MHz VCO TO UHF SYNTHESISER LOOP FILTER AND TANKTANK VCO_OP IIN IIN QIN QIN LO1GHz LO2GHz MGCM01 TO BASEBAND ADCs FROM BASEBAND DACs CDMA_IF CDMA_IF MATCHING IF FILTER 30kHZ BW MATCHING FROM RF MIXER MGCR01 MGCT02SAW 1880MHz MATCHING 1900MHz PA SAW 1880MHz MATCHING 900MHz PA SAW 836MHz RF900 RF900 RF1900 RF1900

www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively Zarlink is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either e xpress or implied, under patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink s conditions of sale which are available on request. Purchase of Zarlinks I C components conveys a licence under the Philips I C Patent rights to use these components in and I C System, provided that the system conforms to the I C Standard Specification as defined by Philips. Zarlink and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2001, Zarlink Semiconductor Inc. All Rights Reserved. TECHNICAL DOCUMENTATION - NOT FOR RESALE For more information about all Zarlink products visit our Web Site at

www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from t he application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, u nder patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility t o fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request. Purchase of Zarlink’s I2C components conveys a licence under the Philips I 2C Patent rights to use these components in and I 2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved. TECHNICAL DOCUMENTATION - NOT FOR RESALE For more information about all Zarlink products visit our Web Site at