33884 FREESCALE | Alldatasheet
Document overview
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Technical content
Features
- Full Operation with 7.0 V < VPWR < 26 V, Limited Operation with 5.5 V < VPWR < 7.0 V
- Input Voltage Range: -14 V to 40 V
- Interface Directly to Micr oprocessors Using SPI Protocol
- Wake Up on Change of Monitored Switch Status
- Programmable Wetting Current
- Four Switch-to-Ground Switches
- Six (Fixed Function) Inputs Monitoring Six Switch-to-Ground Switches
- Two (Fixed Function) Inputs Moni toring Two Switch-to-Battery Switches
- Quiescent Current in Sleep Mode < 10 µA
- Reset Input Defaults the Device to Sleep Mode
- Pb-Free Packaging Designated by Suffix Code EG
Figure 1. 33884 Simplified Application Diagram
ORDERING INFORMATION
Range (TA) Package MC33884DW/R2 -40°C to 105°C 24 SOICW MCZ33884EG/R2
6 GND
4 GND / VPWR
2 VPWR
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Figure 2. 33884 Simplified Block Diagram
Figure 3. 33884 Pin Connections Table 1. 33884 Pin Definitions 1 VDD Voltage Power This pin is 5.0 V logic supply. 2 SO Serial Output This pin is the SPI data out. 3 SI Serial Input This pin provides data input. 4 SP1 Switch Input One This pin senses inputs programmed to read switch-to-ground (battery) supply contacts.
5 SG1 Switch-to-Ground Inputs
This pin is one of six and are switch-to-ground inputs only.
6 SG2 Switch-to-Ground Inputs
This pin is one of six and are switch-to-ground inputs only.
7 SG3 Switch-to-Ground Inputs
This pin is one of six and are switch-to-ground inputs only. 8 SB1 Switch-to Battery One This pin is one of two, and senses inputs only. 9 SP2 Switch Input Two This pin senses inputs programmed to read switch-to-ground (battery) supply contacts. 10 MASL Master/Slave This pin identifies which device will be master and which will be slave. 11 VPWR Voltage Power This pin is the power source. 12 VSS Voltage SS This pin is a ground. 13 RST Reset This pin is active low reset input to the device. 14 SYNC Synchronization This pin is used by the slave IC during the Polling mode. 15 INT Interrupt This pin is an interrupt output from the device. 16 SP3 Switch Input Three This pin senses inputs programmed to read switch-to-ground (battery) supply contacts. 17 SB2 Switch-to-Battery Two This pin is one of two, and senses inputs only.
18 SG4 Switch-to-Ground Inputs
This pin is one of six and are switch-to-ground inputs only.
19 SG5 Switch-to-Ground Inputs
This pin is one of six and are switch-to-ground inputs only.
20 SG6 Switch-to-Ground Inputs
This pin is one of six and are switch-to-ground inputs only. 21 SP4 Switch Input One This pin senses inputs programmed to read switch-to-ground (battery) supply contacts. 22 VBG Bandgap Voltage This pin....
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23 CS Chip Select This pin is transmits communication to the device. 24 SCLK Serial Clock This pin clocks the internal 16-bit Shift register of the device.
Analog Integrated Circuit Device Data Freescale Semiconductor 5 33884
ELECTRICAL CHARACTERISTICS
Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. 1 Exceeding these limits may cause malfunc tion or permanent damage to the device. 2 ESD data available upon request. in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 Ω). 4 All pins are tested individually. 5 1 kV on V PWR and VDD when connected together. See page three. cause malfunction or permanent damage to the device.
- Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
MC33xxxD enter 33xxx), and review parametrics.
Analog Integrated Circuit Device Data
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STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics 8 SPI inputs and outputs are operational. Fault reporting may not be fully operational within this voltage range. See page five.
Analog Integrated Circuit Device Data Freescale Semiconductor 7 33884 DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics conditions, unless otherwise noted. 9 Upper and lower logic threshold voltage levels apply to SI, CS, SCLK, RST, SYNC, MASL. See page five. 10 This parameter is guaranteed by desi gn, however, it has not been production tested. 11 Rise and fall time for incoming SI, CS, and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing. 12 Time required for output states data to be available at SO pin.
Analog Integrated Circuit Device Data
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DYNAMIC ELECTRICAL CHARACTERISTICS Time from Rising Edge of CS to SO High Impedance (13) tSO(DIS) — 80 110 ns Time from Falling Edge of SCLK to SO Data Valid (14) tVALID — 65 105 ns Recovery Time for Sequential Transfers tREC — 100 120 ns Notes 13 Time required for output states data to be terminated at SO pin. 14 Time required to obtain valid data out fr om SO following the falling edge of SCLK. Table 4. Dynamic Electrical Characteristics (continued) conditions, unless otherwise noted.
when implemented with the appropriate ESD capacitor. process control function purposes are critical. Polling, and Polling + INT Timer. the configuration between an MCU and one 33884. Figure 4. SPI Interface with Microprocessor transfer of data to the 33884.
16 Bit Shift Register 16 Bit Shift Register
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Figure 5. SPI Parallel Interface with Microprocessor Figure 6. SPI Serial Interface with Microprocessor only when System Clock (SCLK) is in a logic low state. Internal to the 33884 is an active pull-up on CS pin. the IC is an active pull down on the SI pin. the most significant bit (MSB) first. device wakes the slave via the Synchronization (SYNC) pin. power (VPWR) and voltage digital drain (VDD) pins.
16 Bit Shift Register
Analog Integrated Circuit Device Data Freescale Semiconductor 11 33884 FUNCTIONAL DESCRIPTION FUNCTIONAL PIN DESCRIPTION SYNCHRONIZATION (SYNC) The Synchronization (SYNC) input is used by the slave IC during the Polling mode. The SYNC allows multiple 33884 ICs to poll the multiple inputs concurrently. The master controls the polling period. The slave is allowed to shut down it’s oscillator, thereby conserving current. When the slave receives the SYNC signal from the master, the slave starts the internal oscillator and reads the switch inputs. INTERRUPT (INT) The Interrupt (INT) pin is an interrupt output from the 33884. The INT pin is an open drain output with an internal pull-up. In the Normal mode, a switch state change triggers the INT pin. The INT pin and INT bit (flag) are latched on the falling edge of CS. This procedure determines the interrupt origin. The flag INT bit in the SPI word is the inverse of the INT pin. The INT pin is cleared on the rising edge of CS. The INT pin is active only during the ON time (when sink and source currents are active) in the Polling mode. RESET (RST) The Reset (RST) pin is active low reset input to the 33884. When asserted, the 33884 will reset all internal registers, timers, and enters a Sleep mode (with all switch inputs in a Tri-State condition). Only an MCU SPI command word will wake the 33884 from a Sleep state. The RST pin may be controlled directly from a general purpose input/output (GPIO) pin or from a system/MCU reset. BANDGAP VOLTAGE (VBG) The Bandgap Voltage (VBG) pin requires a 130 kΩ to ground for standard wetting and sustain currents. The device is tested with a 0.1 percent value, but a standard 1.0 percent could be used to function properly. VOLTAGE POWER (VPWR) The Voltage Power (VPWR) pin is battery/supply source pin for the 33884. The VPWR pin requires external reverse battery/supply and transient protection. Maximum input voltage on VPWR is 40 V. All wetting currents and sustain currents are derived from VPWR. SWITCH PINS (SP1 : SP4) The 33884 has four programmable switch sense inputs (SP1- P4) to read switch-to-ground or switch-to-battery/ supply contacts. Transient battery/supply voltages greater than 40 V must be clamped by an external device. Surface mount 0805 MOVs and transient voltage suppressors (TVS) are available in SOT-23 packages. The sensed input is compared with an internal 4.0 V reference. When programmed to sense switch-to-battery, sensed voltages greater than 4.0 V are interpreted as a CLOSED switch, while sensed voltages less than 4.0 V are interpreted as an OPEN switch. The opposite holds true when inputs are programmed to sense switch-to-ground. Further programming can set the wetting currents or make the inputs Tri-State. Programming methods are provided in the following section. SWITCH-TO-BATTERY (SB1 AND SB2) The two Switch-to-Battery (SB) pins sense inputs only. Transient battery/supply voltages greater than 40 V must be clamped by an external device. Surface mount 0805 MOVs and transient voltage suppressors (TVS) are available in SOT-23 packages. The sensed input is compared with an internal 4.0 V reference. Voltages greater than 4.0 V are interpreted as a CLOSED switch, while sensed voltages less than 4.0 V are interpreted as an OPEN switch. Programming can set wetting currents or Tri-State the input. Programming methods are provided in the following section. SWITCH-TO-GROUND (SG1 : SG6) The six Switch-to-Ground (SG) pins are inputs only. The input is compared with the internal 4.0 V reference. Voltages greater than 4.0 volts are interpreted as an OPEN switch. Voltages less than 4.0 V are interpreted as a CLOSED switch. Programming can set the wetting currents or Tri-State the input. Programming methods are provided in the following section.
Analog Integrated Circuit Device Data
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FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES POWER-UP On initial power-up all 33884 registers are cleared and the device enters the Sleep mode. To exit the Sleep mode, a valid command word is required to be received from the microprocessor. SLEEP COMMAND Sleep mode can be entered by a SPI Sleep command or asserting the RST pin. In Sleep mode all inputs are Tri–State and all internal active pull up and pull down currents are disabled. Sleep mode reduces the current drain to a quiescent current level of 10 µA and disables the IC. Sleep mode provides lowest quiescent current for the IC. Exit from sleep mode requires a valid SPI RUN, TRI–STATE, or METALLIC command. RUN COMMAND The Run command places the IC in one of three operating modes: 1. This is the normal operating mode of the 33884. In Normal mode the status of the input switches are latched on falling edge of CS and data is returned to the MCU via SPI. All programmed combinations of source and sink currents, used for sensing purposes, are always active in this mode. While in the Normal mode, an interrupt is generated and sent to the microprocessor whenever an external switch changes its OPEN or CLOSED state. Prior to a switch closing, the 33884 sources 0.75 mA of sustain current. When the voltage at the input crosses the comparator threshold, 14 mA of current is allowed to flow. The 14 mA wetting current shuts off after a 20 ms timer expires. 2. The Polling mode reads a switch status periodically, interrupting the microprocessor only when an external switch is sensed as being CLOSED. When the 33884 senses all external switches to be OPEN, the Polling mode of operation continues. When a switch is sensed CLOSED, an interrupt is sent to the microprocessor, transferring it’s operational mode to the Normal mode. The Polling mode provides a reduction in quiescent current by turning OFF all source and sink currents during sensed switch OFF periods. The Polling mode allows reduction of quiescent current by disabling sink and source currents during switch OFF periods. 3. The Polling + INT Timer mode of operation is similar to the Polling mode above, except with the addition of an interrupt being sent to the microprocessor if a switch is sensed CLOSED, or upon the internal interrupt timer timing out. An interrupt is always ultimately sent to the microprocessor in this mode. The microprocessor can be programmed to read, or ignore the reported switch status while receiving the interrupt. If a switch is sensed CLOSED, operation automatically reverts to the Normal mode. If all switches are sensed OPEN, and the wake up timer (INT Timer) times out, the 33884 continues to operate in the Polling + INT Timer mode. The wake up timer duration may be set much longer than the polling time. The command also programs the SP1 to SP4 sense inputs (switch-to-battery logic [1] or switch-to-ground logic[0]). Please refer to Table 17. TRI-STATE COMMAND A Tri-State command places all switch inputs into Tri-State position. All comparators on input are disabled in this mode. The device will return logic [0] for the switch status. SPI PROGRAMMING The 33884 uses the SPI in full duplex synchronous slave mode for communication with the microprocessor. The 33884 is programmed via a 16-bit word command from the MCU. The word is sent to the device with the MSB first. The command word sent to the 33884 sets the mode of operation in the device. Returning data received from the 33884 is the status of the sensed input switch on the falling edge of CS. Sixteen clock periods are required for each transmission to be valid. After the 16 clocks, CS is returned to the inactive state (logic [1]), command words are no longer accepted into SI, and the SO pin is Tri-Stated. The response to a SPI command returns status based on previous command word. This previous command could be a hardware reset as well as any of the other commands discussed in this section.
Analog Integrated Circuit Device Data Freescale Semiconductor 13 33884 FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS LOGIC COMMANDS AND REGISTERS PROGRAMMING AND CONFIGURATION
DESCRIPTION
SPI Commands from Microcontroller / Command Protocol (Data into SI) SLEEP COMMAND The Sleep command places the IC in Sleep mode and essentially turns the part OFF. By definition, a hardware reset sends/keeps the IC in Sleep mode. All inputs are Tri-Stated, disabling all input blocks and all internal pull-ups/pull downs. Only a SPI command can take the IC out of Sleep mode. Exiting this mode requires a valid Run, Tri-State, or Metallic command. Table 5. SPI Command Protocol Table 6. Sleep Command
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values are unknown after exiting the Sleep mode. are not detected during the OFF interval. Table 7. Run Command U = Unknown value coming out of Sleep mode. It must be configured with Run command. Table 8. Bit Definition for Run Command Table 9. Sample OFF Time Prescales Table 10. Wake Up Delay Prescales
or an external switch-to-battery (internal current sink). mode leaves the part in that mode). also remain in Tri-State after existing the Sleep mode. register values are unknown after exiting the Sleep mode. Table 11. Programmable Switch Bit Definition
0 Ground
1 Battery
Table 12. Tri-State Command Table 13. Programmable Switch Bit Definition
0 Input Disabled (Default)
1 Input Enabled
Table 14. Metallic Command U = Unknown value coming out of Sleep mode. It must be configured with Run command. Table 15. Metallic Switch Bit Definition
0 Non-Metallic
1 Metallic (Enable Wetting Current Pulse)
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Test mode. It is used to confirm various internal functions. Response Protocol (Data out of SO). command the device out of Sleep mode. Table 16. Test Mode Table 17. SPI Responses Table 18. Reset/Sleep Note: The SPI response given while sending the command to exit Sleep mode should be ignored due to unknown power-up state.
external interrupt. It is the inverse of INT. Table 19. Normal and Periodic Note: The SPI response given while sending the command to exit Sleep mode should be ignored due to unknown power-up state. Table 20. MASL Bit Definition
0 Slave
1 Master
Table 21. MASL Bit Definition Table 22. Switch State Bit Definition
0 Open Normal At the moment CS
1 Closed Polling
Table 23. Tri-State Bit Definition
0 Tri-State
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Figure 7. Typical Master/Slave Application
100 V10 nF
Analog Integrated Circuit Device Data Freescale Semiconductor 19 33884 PACKAGING PACKAGE DIMENSIONS PACKAGING PACKAGE DIMENSIONS For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below. DW SUFFIX EG (Pb-FREE) SUFFIX PLASTIC PACKAGE 98ASB42344B ISSUE F
Analog Integrated Circuit Device Data Freescale Semiconductor 20 33884
REVISION HISTORY
REVISION DATE DESCRIPTION OF CHANGES 3.0 6/2006 • Implemented Revision History page
- Converted to Freescale format
- Corrected content to the prevailing form and style
- Removed MC33884EG/R2, and replaced with MCZ338 84EG/R2 in the Ordering Information block 4.0 11/2006 • Removed Peak Package Reflow Temperature During Reflow (solder reflow) parameter from Maximum ratings on page 5. Added note with instructions from www.freescale.com.
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