MCR8S ONSEMI | Alldatasheet
Document overview
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Technical content
Features
- Sensitive Gate Allows Triggering by Microcontrollers and other Logic Circuits
- Blocking V oltage to 800 V olts
- On−State Current Rating of 8 Amperes RMS at 80°C
- High Surge Current Capability − 80 Amperes
- Rugged, Economical TO−220AB Package
- Glass Passivated Junctions for Reliability and Uniformity
- Minimum and Maximum Values of IGT, VGT and IH Specified for Ease of Design
- Immunity to dv/dt − 5 V//C0109sec Minimum at 110°C
- Pb−Free Packages are Available* MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive Off−State Voltage (Note 1) (TJ = −40 to 110°C, Sine Wave, 50 to 60 Hz, Gate Open) MCR8SD MCR8SM MCR8SN VDRM, VRRM 400 600 800 V On-State RMS Current (180° Conduction Angles; T C = 80°C) IT(RMS) 8.0 A Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave, 60 Hz, TJ = 110°C) ITSM 80 A Circuit Fusing Consideration (t = 8.33 ms) I2t 26.5 A2sec Forward Peak Gate Power (Pulse Width ≤ 1.0 /C0109s, TC = 80°C) PGM 5.0 W Forward Average Gate Power (t = 8.3 ms, TC = 80°C) PG(AV) 0.5 W Forward Peak Gate Current (Pulse Width ≤ 1.0 /C0109s, TC = 80°C) IGM 2.0 A Operating Junction Temperature Range TJ −40 to 110 °C Storage Temperature Range Tstg −40 to 150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. V DRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SCRs
8 AMPERES RMS
TO−220AB CASE 221A−09 STYLE 3 http://onsemi.com MARKING DIAGRAM A = Assembly Location Y = Year WW = Work Week x = D, M, or N G = Pb−Free Package AKA = Diode Polarity 2 3 Device Package Shipping
ORDERING INFORMATION
MCR8SD TO−220AB 50 Units / Rail MCR8SN TO−220AB 50 Units / Rail MCR8SDG TO−220AB (Pb−Free)
50 Units / Rail
MCR8SNG TO−220AB (Pb−Free) Preferred devices are recommended choices for future use and best overall value. MCR8SM TO−220AB 50 Units / Rail MCR8SMG TO−220AB (Pb−Free) K G A PIN ASSIGNMENT Anode Gate Cathode
4 Anode
MCR8SD, MCR8SM, MCR8SN http://onsemi.com THERMAL CHARACTERISTICS Characteristic Symbol Value Unit Thermal Resistance, Junction−to−Case Junction−to−Ambient R/C0113JC R/C0113JA 2.2 62.5 °C/W Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds TL 260 °C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (Note 3) (VD = Rated VDRM and VRRM; RGK = 1 k/C0087)T J = 25°C TJ = 110°C IDRM, IRRM − 500 /C0109A ON CHARACTERISTICS Peak Forward On−State Voltage (Note 2) (ITM = 16 A) VTM − − 1.8 V Gate Trigger Current (Continuous dc) (Note 4) (VD = 12 V; RL = 100 /C0087) IGT 5.0 25 200 /C0109A Holding Current (Note 4) (VD = 12 V, Gate Open, Initiating Current = 200 mA) IH − 0.5 6.0 mA Latch Current (Note 4) (VD = 12 V, IG = 200 /C0109A) IL − 0.6 8.0 mA Gate Trigger Voltage (Continuous dc) (Note 4) T J = 25°C (VD = 12 V; RL = 100 /C0087)T J = /C004240°C VGT 0.3 0.65 1.0 1.5 V Gate Non−Trigger Voltage T J = 110°C (VD = 12 V, RL = 100 /C0087) VGD 0.2 − − V DYNAMIC CHARACTERISTICS Critical Rate of Rise of Off−State Voltage (VD = 67% VDRM, RGK = 1 K/C0087, CGK = 0.1 /C0109F, TJ = 110°C) dv/dt 5.0 15 − V//C0109s Critical Rate of Rise of On−State Current IPK = 50 A, Pw = 40 /C0109sec, diG/dt = 1 A//C0109sec, Igt = 10 mA di/dt − − 100 A//C0109s 2. Indicates Pulse Test: Pulse Width /C01182.0 ms, Duty Cycle /C01182%. 3. R GK = 1000 Ohms included in measurement. 4. Does not include R GK in measurement.
MCR8SD, MCR8SM, MCR8SN http://onsemi.com PACKAGE DIMENSIONS CASE 221A−09 ISSUE AA TO−220AB NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. STYLE 3: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 B Q H Z L V G N A K F 12 3 D SEATING PLANE−T− C ST U R J ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 MCR8S/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.