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Document overview

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Technical content

Features

  • Center Gate Geometry for Uniform Current Density
  • All Diffused and Glass-Passivated Junctions for Parameter Uniformity and Stability
  • Small, Rugged Thermowatt Construction for Low Thermal Resistance, High Heat Dissipation and Durability
  • Low Trigger Currents, 200 /C0109A Maximum for Direct Driving from Integrated Circuits
  • These are Pb−Free Devices* MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive Off−State Voltage (Note 1) (TJ = /C004240 to 110°C, Sine Wave,

50 Hz to 60 Hz) MCR72−3

MCR72−6 MCR72−8 VDRM, VRRM 100 400 600 V On-State RMS Current (180° Conduction Angles; T C = 83°C) IT(RMS) 8.0 A Peak Non-Repetitive Surge Current (1/2 Cycle, 60 Hz, TJ = 110°C) ITSM 100 A Circuit Fusing Considerations (t = 8.3 ms) I2t 40 A2s Forward Peak Gate Voltage VGM /C00345.0 V Forward Peak Gate Current IGM 1.0 A Forward Peak Gate Power PGM 5.0 W Average Gate Power (t = 8.3 ms, TC = 83°C) PG(AV) 0.75 W Operating Junction Temperature Range TJ −40 to +1 10 °C Storage Temperature Range Tstg −40 to +150 °C Mounting Torque − 8.0 in. lb. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. V DRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SCRs

8 AMPERES RMS

K G A TO−220AB CASE 221A−07 STYLE 3 PIN ASSIGNMENT Anode Gate Cathode

4 Anode

www.onsemi.com See detailed marking, ordering, and shipping information in the package dimensions section on page 4 of this data sheet. MARKING AND ORDERING INFORMATION TO−220AB CASE 221A−09 STYLE 3 1 2 3 1 2 3

MCR72−3, MCR72−6, MCR72−8 www.onsemi.com THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction−to−Case R/C0113JC 2.2 °C/W Thermal Resistance, Junction−to−Ambient R/C0113JA 60 °C/W Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Secs TL 260 °C ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (Note 2) (VAK = Rated VDRM or VRRM; RGK = 1 k/C0087)T J = 25°C TJ = 110°C IDRM, IRRM 500 /C0109A /C0109A High Logic Level Supply Current from VCC ICCH 4 4 /C0109A /C0109A ON CHARACTERISTICS Peak Forward On-State Voltage (ITM = 16 A Peak, Pulse Width /C01121 ms, Duty Cycle /C01122%) VTM − 1.7 2.0 V Gate Trigger Current (Continuous dc) (Note 3) (VD = 12 V, RL = 100 /C0087) IGT − 30 200 /C0109A Gate Trigger Voltage (Continuous dc) (Note 3) (VD = 12 V, RL = 100 /C0087) VGT − 0.5 1.5 V Gate Non−Trigger Voltage (VD = 12 Vdc, RL = 100 /C0087, TJ = 110°C) VGD 0.1 − − V Holding Current (VD = 12 V, Initiating Current = 200 mA, RGK = 1 k/C0087) IH − − 6.0 mA Gate Controlled Turn-On Time (VD = Rated VDRM, ITM = 16 A, IG = 2 mA) tgt − 1.0 − /C0109s DYNAMIC CHARACTERISTICS Critical Rate-of-Rise of Off-State Voltage (VD = Rated VDRM, RGK = 1 k/C0087, TJ = 110°C, Exponential Waveform) dv/dt − 10 − V//C0109s Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Ratings apply for negative gate voltage or R GK = 1 k/C0087. Devices shall not have a positive gate voltage concurrently with a negative voltage on the anode. Devices should not be tested with a constant curr ent source for forward and reve rse blocking capability such that the voltage applied exceeds the rated blocking voltage. 3. R GK current not included in measurement.

MCR72−3, MCR72−6, MCR72−8 www.onsemi.com MARKING DIAGRAMS TO−220AB CASE 221A−07 A = Assembly Location Y = Year WW = Work Week MCR72−x = Device Code x = 3, 6, 8, or 8T G = Pb−Free Package AKA = Diode Polarity TO−220AB CASE 221A−09 A = Assembly Location Y = Year WW = Work Week MCR72−6T = Device Code G = Pb−Free Package AKA = Diode Polarity AY WW MCR72−xG AKA AY WW MCR72−6TG AKA

ORDERING INFORMATION

MCR72−3G TO−220AB (Pb−Free) 500 Units / Box MCR72−6G TO−220AB (Pb−Free) 500 Units / Box MCR72−6TG TO−220AB (Pb−Free) 50 Units / Rail MCR72−8G TO−220AB (Pb−Free) 500 Units / Box MCR72−8TG TO−220AB (Pb−Free) 50 Units / Rail

MCR72−3, MCR72−6, MCR72−8 www.onsemi.com PACKAGE DIMENSIONS TO−220 CASE 221A−07 ISSUE O STYLE 3: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.014 0.022 0.36 0.55 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 A K L V G D N Z H Q FB 123 −T− SEATING PLANE S R J U T C

MCR72−3, MCR72−6, MCR72−8 www.onsemi.com PACKAGE DIMENSIONS STYLE 3: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.570 0.620 14.48 15.75 B 0.380 0.415 9.66 10.53 C 0.160 0.190 4.07 4.83 D 0.025 0.038 0.64 0.96 F 0.142 0.161 3.61 4.09 G 0.095 0.105 2.42 2.66 H 0.110 0.161 2.80 4.10 J 0.014 0.024 0.36 0.61 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 B Q H Z L V G N A K F 12 3 D SEATING PLANE−T− C ST U R J TO−220 CASE 221A−09 ISSUE AH PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 MCR72/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.