MCP6001UT-I/SN

MCP6001_05 MICROCHIP | Alldatasheet

Document overview

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• PDF pages: 28

Technical content

Features

• Available in SC-70-5 and SOT-23-5 packages
• Gain Bandwidth Product: 1 MHz (typ.)
• Rail-to-Rail Input/Output
• Supply Voltage: 1.8V to 5.5V
• Supply Current: IQ = 100 µA (typ.)
• Phase Margin: 90° (typ.)
• Temperature Range: - Industrial: -40°C to +85°C - Extended: -40°C to +125°C
• Available in Single, Dual and Quad Packages

Applications

• Automotive
• Portable Equipment
• Photodiode Amplifier
• Analog Filters
• Notebooks and PDAs
• Battery-Powered Systems Available Tools SPICE Macro Models (at www.microchip.com) FilterLab® Software (at www.microchip.com) Typical Application

Description

The Microchip Technology Inc. MCP6001/2/4 family of operational amplifiers (op amps) is specifically designed for general-purpose applications. This family has a 1 MHz Gain Bandwidth Product (GBWP) and 90° phase margin (typ.). It also maintains 45° phase margin (typ.) with a 500 pF capacitive load. This family operates from a single supply voltage as low as 1.8V, while drawing 100 µA (typ.) quiescent current. Additionally, the MCP6001/2/4 supports rail-to-rail input and output swing, with a common mode input voltage range of VDD + 300 mV to VSS – 300 mV. This family of op amps is designed with Microchip’s advanced CMOS process. The MCP6001/2/4 family is available in the industrial and extended temperature ranges, with a power supply range of 1.8V to 5.5V. Package Types VOUT VIN VDD Gain Non-Inverting Amplifier MCP6001 VREF VSS MCP6001

5 VDD

VIN– VOUT VSS VIN+ SC-70-5, SOT-23-5 MCP6002 PDIP, SOIC, MSOP MCP6004 VINA+ VINA– VSS VOUTA + - VDD VOUTD VIND– VIND+ VOUTB VINB– VINB+ VINC+ VINC– VOUTC PDIP, SOIC, TSSOP VINA+ VINA– VSS VOUTA + - VDD VOUTB VINB– VINB+ VIN– VOUT VDD VIN+ MCP6001U SOT-23-5 VDD VOUT VIN+ VSS VIN–

1 MHz, Low-Power Op Amp

© 2005 Microchip Technology Inc. 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, RL = 10 kΩ to VDD/2 and VOUT ≈VDD/2. Parameters Sym Min Typ Max Units Conditions Input Offset Input Offset Voltage VOS -4.5 +4.5 mV VCM = VSS (Note 1) Input Offset Drift with Temperature ΔVOS/ΔTA ±2.0 µV/°C TA= -40°C to +125°C, VCM = VSS Power Supply Rejection Ratio PSRR dB VCM = VSS Input Bias Current and Impedance Input Bias Current: IB ±1.0 pA Industrial Temperature IB pA TA = +85°C Extended Temperature IB 1100 pA TA = +125°C Input Offset Current IOS ±1.0 pA Common Mode Input Impedance ZCM 1013||6 Ω||pF Differential Input Impedance ZDIFF 1013||3 Ω||pF Common Mode Common Mode Input Range VCMR VSS − 0.3 VDD + 0.3 V Common Mode Rejection Ratio CMRR dB VCM = -0.3V to 5.3V, VDD = 5V Open-Loop Gain DC Open-Loop Gain (Large Signal) AOL 112 dB VOUT = 0.3V to VDD – 0.3V, VCM = VSS Output Maximum Output Voltage Swing VOL, VOH VSS + 25 VDD – 25 mV VDD = 5.5V Output Short-Circuit Current ISC mA VDD = 1.8V ±23 mA VDD = 5.5V Power Supply Supply Voltage VDD 1.8 5.5 V Quiescent Current per Amplifier IQ 100 170 µA IO = 0, VDD = 5.5V, VCM = 5V Note 1: MCP6001/2/4 parts with date codes prior to December 2004 (week code 49) were tested to ±7 mV minimum/ maximum limits.

© 2005 Microchip Technology Inc. DS21733F-page 3 MCP6001/2/4 AC ELECTRICAL SPECIFICATIONS TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to 5.5V, VSS = GND, VCM = VDD/2, VOUT ≈VDD/2, RL = 10 kΩ to VDD/2 and CL = 60 pF. Parameters Sym Min Typ Max Units Conditions AC Response Gain Bandwidth Product GBWP 1.0 MHz Phase Margin PM G = +1 Slew Rate SR 0.6 V/µs Noise Input Noise Voltage Eni 6.1 µVp-p f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni nV/√Hz f = 1 kHz Input Noise Current Density ini 0.6 fA/√Hz f = 1 kHz Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +5.5V and VSS = GND. Parameters Sym Min Typ Max Units Conditions Temperature Ranges Industrial Temperature Range TA -40 +85 Extended Temperature Range TA -40 +125 Operating Temperature Range TA -40 +125 Note Storage Temperature Range TA -65 +150 Thermal Package Resistances Thermal Resistance, 5L-SC70 θJA 331 °C/W Thermal Resistance, 5L-SOT-23 θJA 256 °C/W Thermal Resistance, 8L-PDIP θJA °C/W Thermal Resistance, 8L-SOIC (150 mil) θJA 163 °C/W Thermal Resistance, 8L-MSOP θJA 206 °C/W Thermal Resistance, 14L-PDIP θJA °C/W Thermal Resistance, 14L-SOIC θJA 120 °C/W Thermal Resistance, 14L-TSSOP θJA 100 °C/W Note: The industrial temperature devices operate over this extended temperature range, but with reduced performance. In any case, the internal Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150°C.

© 2005 Microchip Technology Inc. 2.0 TYPICAL PERFORMANCE CURVES Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈VDD/2, RL = 10 kΩ to VDD/2 and CL = 60 pF. FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: PSRR, CMRR vs. Frequency. FIGURE 2-3: Input Bias Current at +85°C. FIGURE 2-4: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-5: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-6: Input Bias Current at +125°C. Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 10% 12% 14% 16% 18% 20% Input Offset Voltage (mV) Percentage of Occurrences 64,695 Samples VCM = VSS 100 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 Frequency (Hz) PSRR, CMRR (dB) PSRR+ CMRR PSRR– VCM = VSS 100 10k 100k 10% 12% 14% Input Bias Current (pA) Percentage of Occurrences

1230 Samples

VDD = 5.5V VCM = VDD TA = +85°C 100 -50 -25 100 125 Ambient Temperature (°C) PSRR, CMRR (dB) PSRR (VCM = VSS) CMRR (VCM = -0.3V to +5.3V) -20 100 120 1.E- 1.E +00 1.E +01 1.E +02 1.E +03 1.E +04 1.E +05 1.E +06 1.E +07 Frequency (Hz) Open-Loop Gain (dB) -210 -180 -150 -120 -90 -60 -30 Open-Loop Phase (°) 0.1 100 10k 100k 1M 10M Phase Gain VCM = VSS 10% 15% 20% 25% 30% 35% 40% 45% 50% 55% 150 300 450 600 750 900 1050 1200 1350 1500 Input Bias Current (pA) Percentage of Occurrences

605 Samples

VDD = 5.5V VCM = VDD TA = +125°C

© 2005 Microchip Technology Inc. DS21733F-page 5 MCP6001/2/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈VDD/2, RL = 10 kΩ to VDD/2 and CL = 60 pF. FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 1.8V. FIGURE 2-9: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V. FIGURE 2-10: Input Offset Voltage Drift. FIGURE 2-11: Input Offset Voltage vs. Output Voltage. FIGURE 2-12: Output Short-Circuit Current vs. Power Supply Voltage. 100 1,000 1.E-01 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 Frequency (Hz) Input Noise Voltage Density (nV/—Hz) 0.1 100 10k 100k -700 -600 -500 -400 -300 -200 -100 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 Common Mode Input Voltage (V) Input Offset Voltage (µV) VDD = 1.8V TA = -40°C TA = +25°C TA = +85°C TA = +125°C -700 -600 -500 -400 -300 -200 -100 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Common Mode Input Voltage (V) Input Offset Voltage (µV) VDD = 5.5V TA = -40°C TA = +25°C TA = +85°C TA = +125°C 10% 12% 14% 16% 18% -12 -10 Input Offset Voltage Drift (µV/°C) Percentage of Occurrences

1225 Samples

TA = -40°C to +125°C VCM = VSS -200 -150 -100 -50 100 150 200 Output Voltage (V) Input Offset Voltage (µV) VDD = 1.8V VCM = VSS VDD = 5.5V Power Supply Voltage (V) Short Circuit Current Magnitude (mA) TA = -40°C TA = +25°C TA = +85°C TA = +125°C

© 2005 Microchip Technology Inc. DS21733F-page 7 MCP6001/2/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE 3.1 Analog Outputs The output pins are low-impedance voltage sources. 3.2 Analog Inputs The non-inverting and inverting inputs are high- impedance CMOS inputs with low bias currents. 3.3 Power Supply (VSS and VDD) The positive power supply (VDD) is 1.8V to 5.5V higher than the negative power supply (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need a local bypass capacitor (typically 0.01 µF to 0.1 µF) within 2 mm of the VDD pin. These parts can share a bulk capacitor with analog parts (typically 2.2 µF to 10 µF) within 100 mm of the VDD pin. MCP6001 MCP6001R MCP6001U MCP6002 MCP6004 Symbol VOUT, VOUTA Analog Output (op amp A) VIN–, VINA– Inverting Input (op amp A) VIN+, VINA+ Non-inverting Input (op amp A) VDD Positive Power Supply VINB+ Non-inverting Input (op amp B) VINB– Inverting Input (op amp B) VOUTB Analog Output (op amp B) VOUTC Analog Output (op amp C) VINC– Inverting Input (op amp C) VINC+ Non-inverting Input (op amp C) VSS Negative Power Supply VIND+ Non-inverting Input (op amp D) VIND– Inverting Input (op amp D) VOUTD Analog Output (op amp D)

© 2005 Microchip Technology Inc. DS21733F-page 11 MCP6001/2/4 This voltage rate of change is less than the MCP6001/2/4 slew rate of 0.6 V/µs. When the input voltage swings below the voltage across C1, D1 becomes reverse- biased. This opens the feedback loop and rails the amplifier. When the input voltage increases, the amplifier recovers at its slew rate. Based on the rate of voltage change shown in the above equation, it takes an extended period of time to charge a 0.1 µF capacitor. The capacitors need to be selected so that the circuit is not limited by the amplifier slew rate. Therefore, the capaci- tors should be less than 40 µF and a stabilizing resistor (RISO) needs to be properly selected. (Refer to Section 4.3 “Capacitive Loads”). FIGURE 4-8: Peak Detector with Clear and Sample CMOS Analog Switches. VIN MCP6002 VC1 MCP6002 Op Amp A Op Amp B VOUT MCP6001 Op Amp C Sample Signal Clear Signal Clear RISO Sample CLK tSAMP tCLEAR tDETECT Switch Switch RISO VC2

© 2005 Microchip Technology Inc. 5.0 DESIGN TOOLS Microchip provides the basic design tools needed for the MCP6001/2/4 family of op amps. 5.1 SPICE Macro Model The latest SPICE macro model for the MCP6001/2/4 op amps is available on our web site at www.microchip.com. This model is intended to be an initial design tool that works well in the op amp’s linear region of operation at room temperature. See the model file for information on its capabilities. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 FilterLab® Software Microchip’s FilterLab® software is an innovative software tool that simplifies analog active filter (using op amps) design. Available at no cost from our web site at www.microchip.com, the FilterLab design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the macro model to simulate actual filter performance.

© 2005 Microchip Technology Inc. DS21733F-page 13 MCP6001/2/4 6.0 PACKAGING INFORMATION 6.1 Package Marking Information XXXXXXXX XXXXXNNN YYWW 8-Lead PDIP (300 mil) Example: Legend: XX...X Customer specific information* YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. MCP6002 I/P256 0432 5-Lead SC-70 (MCP6001) Example: (I-Temp) 5-Lead SOT-23 (MCP6001/1R/1U) Example: (E-Temp) XXNN CD25 XXN (Front) YWW (Back) AA7 (Front) 432 (Back) Device I-Temp Code E-Temp Code MCP6001 AANN CDNN MCP6001R ADNN CENN MCP6001U AFNN CFNN Note: Applies to 5-Lead SOT-23. Device I-Temp Code E-Temp Code MCP6001 AAN CDN Note: Applies to 5-Lead SC-70. OR OR XXNN AA74 Device I-Temp Code E-Temp Code MCP6001 AANN CDNN Note: Applies to 5-Lead SC-70.

© 2005 Microchip Technology Inc. Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP6004) Example: 14-Lead TSSOP (MCP6004) Example: 14-Lead SOIC (150 mil) (MCP6004) Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN XXXXXXXXXX YYWWNNN XXXXXX YYWW NNN MCP6004-I/P 0432256 6004ST 0432 256 XXXXXXXXXX MCP6004ISL 0432256 8-Lead MSOP Example: XXXXXX YWWNNN 6002I 432256 8-Lead SOIC (150 mil) Example: XXXXXXXX XXXXYYWW NNN MCP6002 I/SN0432 256

© 2005 Microchip Technology Inc. DS21733F-page 15 MCP6001/2/4 5-Lead Plastic Package (SC-70) 0.30 0.15 .012 .006 B Lead Width 0.18 0.10 .007 .004 c Lead Thickness 0.30 0.10 .012 .004 L Foot Length 2.20 1.80 .087 .071 D Overall Length 1.35 1.15 .053 .045 Molded Package Width 2.40 1.80 .094 .071 E Overall Width 0.10 0.00 .004 .000 Standoff 1.00 0.80 .039 .031 Molded Package Thickness 1.10 0.80 .043 .031 A Overall Height 0.65 (BSC) .026 (BSC) p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS* INCHES Units exceed .005" (0.127mm) per side. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not Notes: JEITA (EIAJ) Standard: SC-70 Drawing No. C04-061 *Controlling Parameter L E c D B p A Top of Molded Pkg to Lead Shoulder .004 .016 0.10 0.40 n

© 2005 Microchip Technology Inc. 5-Lead Plastic Small Outline Transistor (OT) (SOT23) β Mold Draft Angle Bottom α Mold Draft Angle Top 0.50 0.43 0.35 .020 .017 .014 B Lead Width 0.20 0.15 0.09 .008 .006 .004 c Lead Thickness φ Foot Angle 0.55 0.45 0.35 .022 .018 .014 L Foot Length 3.10 2.95 2.80 .122 .116 .110 D Overall Length 1.75 1.63 1.50 .069 .064 .059 Molded Package Width 3.00 2.80 2.60 .118 .110 .102 E Overall Width 0.15 0.08 0.00 .006 .003 .000 Standoff 1.30 1.10 0.90 .051 .043 .035 Molded Package Thickness 1.45 1.18 0.90 .057 .046 .035 A Overall Height 1.90 .075 Outside lead pitch (basic) 0.95 .038 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS INCHES* Units p D B n E L c β φ α A * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-178 Drawing No. C04-091 § Significant Characteristic

© 2005 Microchip Technology Inc. DS21733F-page 17 MCP6001/2/4 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) B A L p α E eB β c n D Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n Pitch p .100 2.54 Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32 Molded Package Thickness .115 .130 .145 2.92 3.30 3.68 Base to Seating Plane .015 0.38 Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26 Molded Package Width .240 .250 .260 6.10 6.35 6.60 Overall Length D .360 .373 .385 9.14 9.46 9.78 Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43 Lead Thickness c .008 .012 .015 0.20 0.29 0.38 Upper Lead Width .045 .058 .070 1.14 1.46 1.78 Lower Lead Width B .014 .018 .022 0.36 0.46 0.56 Overall Row Spacing eB .310 .370 .430 7.87 9.40 10.92 Mold Draft Angle Top α Mold Draft Angle Bottom β * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed JEDEC Equivalent: MS-001 Drawing No. C04-018 .010” (0.254mm) per side. § Significant Characteristic

© 2005 Microchip Technology Inc. 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) Foot Angle φ β Mold Draft Angle Bottom α Mold Draft Angle Top 0.51 0.42 0.33 .020 .017 .013 B Lead Width 0.25 0.23 0.20 .010 .009 .008 c Lead Thickness 0.76 0.62 0.48 .030 .025 .019 L Foot Length 0.51 0.38 0.25 .020 .015 .010 h Chamfer Distance 5.00 4.90 4.80 .197 .193 .189 D Overall Length 3.99 3.91 3.71 .157 .154 .146 Molded Package Width 6.20 6.02 5.79 .244 .237 .228 E Overall Width 0.25 0.18 0.10 .010 .007 .004 Standoff 1.55 1.42 1.32 .061 .056 .052 Molded Package Thickness 1.75 1.55 1.35 .069 .061 .053 A Overall Height 1.27 .050 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS INCHES* Units D n p B E h L β c 45° φ α A * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 § Significant Characteristic

© 2005 Microchip Technology Inc. DS21733F-page 19 MCP6001/2/4 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) D A L c (F) α E p B n φ β Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not .037 REF F Footprint (Reference) exceed .010" (0.254mm) per side. Notes: Drawing No. C04-111 *Controlling Parameter Mold Draft Angle Top Mold Draft Angle Bottom Foot Angle Lead Width Lead Thickness β α c B φ .003 .009 .006 .012 Dimension Limits Overall Height Molded Package Thickness Molded Package Width Overall Length Foot Length Standoff Overall Width Number of Pins Pitch A L D E .016 .024 .118 BSC .118 BSC .000 .030 .193 TYP. .033 MIN p n Units .026 BSC NOM INCHES

0.95 REF

.009 .016 0.08 0.22 0.23 0.40 MILLIMETERS*

0.65 BSC

0.85

3.00 BSC

0.60

4.90 BSC

.043 .031 .037 .006 0.40 0.00 0.75 MIN MAX NOM 1.10 0.80 0.15 0.95 MAX 15° 15° JEDEC Equivalent: MO-187 15° 15°

© 2005 Microchip Technology Inc. 14-Lead Plastic Dual In-line (P) – 300 mil (PDIP) n D eB β E c A B L p α Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n Pitch p .100 2.54 Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32 Molded Package Thickness .115 .130 .145 2.92 3.30 3.68 Base to Seating Plane .015 0.38 Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26 Molded Package Width .240 .250 .260 6.10 6.35 6.60 Overall Length D .740 .750 .760 18.80 19.05 19.30 Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43 Lead Thickness c .008 .012 .015 0.20 0.29 0.38 Upper Lead Width .045 .058 .070 1.14 1.46 1.78 Lower Lead Width B .014 .018 .022 0.36 0.46 0.56 Overall Row Spacing eB .310 .370 .430 7.87 9.40 10.92 Mold Draft Angle Top α β Mold Draft Angle Bottom * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-005 § Significant Characteristic

© 2005 Microchip Technology Inc. DS21733F-page 21 MCP6001/2/4 14-Lead Plastic Small Outline (SL) – Narrow, 150 mil (SOIC) Foot Angle φ β Mold Draft Angle Bottom α Mold Draft Angle Top 0.51 0.42 0.36 .020 .017 .014 B Lead Width 0.25 0.23 0.20 .010 .009 .008 c Lead Thickness 1.27 0.84 0.41 .050 .033 .016 L Foot Length 0.51 0.38 0.25 .020 .015 .010 h Chamfer Distance 8.81 8.69 8.56 .347 .342 .337 D Overall Length 3.99 3.90 3.81 .157 .154 .150 Molded Package Width 6.20 5.99 5.79 .244 .236 .228 E Overall Width 0.25 0.18 0.10 .010 .007 .004 Standoff 1.55 1.42 1.32 .061 .056 .052 Molded Package Thickness 1.75 1.55 1.35 .069 .061 .053 A Overall Height 1.27 .050 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS INCHES* Units D p n B E h L c β 45° φ α A * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065 § Significant Characteristic

© 2005 Microchip Technology Inc. 14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP) φ Foot Angle β Mold Draft Angle Bottom α Mold Draft Angle Top 0.30 0.25 0.19 .012 .010 .007 Lead Width 0.20 0.15 0.09 .008 .006 .004 c Lead Thickness 0.70 0.60 0.50 .028 .024 .020 L Foot Length 5.10 5.00 4.90 .201 .197 .193 D Molded Package Length 4.50 4.40 4.30 .177 .173 .169 Molded Package Width 6.50 6.38 6.25 .256 .251 .246 E Overall Width 0.15 0.10 0.05 .006 .004 .002 Standoff 0.95 0.90 0.85 .037 .035 .033 Molded Package Thickness 1.10 .043 A Overall Height 0.65 .026 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS* INCHES Units L β c φ D n B p E α A * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005” (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-087 § Significant Characteristic

© 2005 Microchip Technology Inc. DS21733E-page 23 MCP6001/2/4 APPENDIX A:

REVISION HISTORY

Revision F (March 2005) Updated 6.0 “Packaging Information” to include old and new packaging examples. Revision E (December 2004) The following is the list of modifications: VOS specification reduced to ±4.5 mV from ±7.0 mV for parts starting with date code YYWW = 0449 Corrected package markings in Section 6.0 “Packaging Information” Added Appendix A: Revision History. Revision D (May 2003) Revision C (December 2002) Revision B (October 2002) Revision A (June 2002) Original data sheet release.

© 2005 Microchip Technology Inc. NOTES:

© 2005 Microchip Technology Inc. DS21733E-page 25 MCP6001/2/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Sales and Support PART NO. X /XX Package Temperature Range Device Device: MCP6001T: Single Op Amp (Tape and Reel) (SC-70, SOT-23) MCP6001RT: Single Op Amp (Tape and Reel) (SOT-23) MCP6001UT: Single Op Amp (Tape and Reel) (SOT-23) MCP6002: Dual Op Amp MCP6002T: Dual Op Amp (Tape and Reel) (SOIC, MSOP) MCP6004: Quad Op Amp MCP6004T: Quad Op Amp (Tape and Reel) (SOIC, MSOP) Temperature Range: I = -40°C to +85°C E = -40°C to +125°C Package: LT = Plastic Package (SC-70), 5-lead (MCP6001 only) OT = Plastic Small Outline Transistor (SOT-23), 5-lead (MCP6001, MCP6001R, MCP6001U) MS = Plastic MSOP, 8-lead P = Plastic DIP (300 mil Body), 8-lead, 14-lead SN = Plastic SOIC, (150 mil Body), 8-lead SL = Plastic SOIC (150 mil Body), 14-lead ST = Plastic TSSOP (4.4mm Body), 14-lead Examples: MCP6001T-I/LT: Tape and Reel, Industrial Temperature, 5LD SC-70 package MCP6001T-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT-23 package. MCP6001RT-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT-23 package. MCP6001UT-E/OT: Tape and Reel, Extended Temperature, 5LD SOT-23 package. MCP6002-I/MS: Industrial Temperature, 8LD MSOP package. MCP6002-I/P: Industrial Temperature, 8LD PDIP package. MCP6002-E/P: Extended Temperature, 8LD PDIP package. MCP6002-I/SN: Industrial Temperature, 8LD SOIC package. MCP6002T-I/MS: Tape and Reel, Industrial Temperature, 8LD MSOP package. MCP6004-I/P: Industrial Temperature, 14LD PDIP package. MCP6004-I/SL: Industrial Temperature,, 14LD SOIC package. MCP6004-E/SL: Extended Temperature,, 14LD SOIC package. MCP6004-I/ST: Industrial Temperature, 14LD TSSOP package. MCP6004T-I/SL: Tape and Reel, Industrial Temperature, 14LD SOIC package. MCP6004T-I/ST: Tape and Reel, Industrial Temperature, 14LD TSSOP package. Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: Your local Microchip sales office The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. Customer Notification System Register on our web site (www.microchip.com) to receive the most current information on our products.

© 2005 Microchip Technology Inc. NOTES:

© 2005 Microchip Technology Inc. DS21733E-page 27 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WAR- RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2005, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Note the following details of the code protection feature on Microchip devices: Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.

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