MCP102

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Document overview

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• PDF pages: 32

Technical content

Features

• Ultra-Low Supply Current: 1.75 µA (Max.)
• Precision Monito ring Options Of: 4.38V and 4.63V
• Resets Microcontroller in a Power-Loss Event
• Active-Low V OUT Pin: - MCP111 Active-Low, Open-Drain - MCP112 Active-Low, Push-Pull
• Available in SOT23-3, TO-92, SC-70 and SOT-89-3 Packages
• Temperature Range: - Extended: -40°C to +125°C (except MCP1XX-195) - Industrial: -40°C to +85°C ( MCP1XX-195 Only)
• Pb-Free Devices

Applications

• Critical Microcontrol ler and Microprocessor Power-Monitoring Applications
• Computers
• Intelligent Instruments
• Portable Battery-Powered Equipment General Description The MCP111/112 are voltage-detecting devices designed to keep a microcontroller in reset until the system voltage has stabilized at the appropriate level for reliable system operat ion. These devices also operate as protection from brown-out conditions when the system supply voltage drops below the specified threshold voltage level. Eight different trip voltages are available. Package Types Block Diagram 3-Pin SOT23-3/SC-70 VDD VOUT MCP111/112 VSS VSS VOUT 3-Pin TO-92 VDD 1 32 VDD VSSVOUT 3-Pin SOT-89 VDD MCP111/112 VDD Comparator Output Driver VOUT Band Gap Reference VSS DEVICE FEATURES Device Output Reset Delay (typ.) SOT-23/SC70 Package Pin Out (Pin # 1, 2, 3) Comment Type Pull-up Resistor MCP111 Open-drain External No V OUT, VSS, VDD MCP112 Push-pull No No V OUT, VSS, VDD MCP102 Push-pull No 120 ms RST, VDD, VSS See MCP102/103/121/131 Data Sheet (DS20001906) MCP103 Push-pull No 120 ms VSS, RST, VDD See MCP102/103/121/131 Data Sheet (DS20001906) MCP121 Open-drain External 120 ms RST, VDD, VSS See MCP102/103/121/131 Data Sheet (DS20001906) MCP131 Open-Drain Internal (~95 k) 120 ms RST, VDD, VSS See MCP102/103/121/131 Data Sheet (DS20001906) Micropower Voltage Detector

DS20001889F-page 2  2004-2016 Microchip Technology Inc.

1.0 ELECTRICAL

Absolute Maximum Ratings† All inputs and outputs (except RST) w.r.t. VSS † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. DC CHARACTERISTICS TA = -40°C to +125°C. Parameters Symbol Min. Typ. Max. Units Conditions Operating Voltage Range V DD 1.0 — 5.5 V Specified VDD Value to VOUT low V DD 1.0 — V I RST = 10 µA, V RST < 0.2V Operating Current I DD — < 1 1.75 µA VDD Trip Point MCP1XX-195 VTRIP 1.872 1.900 1.929 V T A = +25°C (Note 1) 1.853 1.900 1.948 V T A = -40°C to +85°C (Note 2) MCP1XX-240 2.285 2.320 2.355 V T A = +25°C (Note 1) 2.262 2.320 2.378 V Note 2 MCP1XX-270 2.591 2.630 2.670 V T A = +25°C (Note 1) 2.564 2.630 2.696 V Note 2 MCP1XX-290 2.857 2.900 2.944 V T A = +25°C (Note 1) 2.828 2.900 2.973 V Note 2 MCP1XX-300 2.886 2.930 2.974 V T A = +25°C (Note 1) 2.857 2.930 3.003 V Note 2 MCP1XX-315 3.034 3.080 3.126 V T A = +25°C (Note 1) 3.003 3.080 3.157 V Note 2 MCP1XX-450 4.314 4.380 4.446 V T A = +25°C (Note 1) 4.271 4.380 4.490 V Note 2 MCP1XX-475 4.561 4.630 4.700 V T A = +25°C (Note 1) 4.514 4.630 4.746 V Note 2 VDD Trip Point Tempco T TPCO — ±100 — ppm/° C Note 1: Trip point is ±1.5% from typical value. 2: Trip point is ±2.5% from typical value. 3: This specification allows this device to be used in PIC® microcontroller applications that require the In-Circuit Serial Programming™ (ICSP™) feature (see device-specific prog ramming specifications for voltage requirements). This specification DOES NOT allow a continuous high voltage to be present on the open-drain output pin (VOUT). The total time that the VOUT pin can be above the maximum device operational voltage (5.5V) is 100 sec. Current into the VOUT pin should be limited to 2 mA. It is recommended that the device operational temperature be maintained between 0°C to 70°C (+25°C preferred). For additional information, please refer to Figure 2-28. 4: This parameter is established by characterization and is not 100% tested.

 2004-2016 Microchip Technology Inc. DS20001889F-page 3 MCP111/112 Threshold Hysteresis min. = 1%, max = 6%) MCP1XX-195 VHYS 0.019 — 0.114 V T A = +25°C MCP1XX-240 0.023 — 0.139 V MCP1XX-270 0.026 — 0.158 V MCP1XX-290 0.029 — 0.174 V MCP1XX-300 0.029 — 0.176 V MCP1XX-315 0.031 — 0.185 V MCP1XX-450 0.044 — 0.263 V MCP1XX-475 0.046 — 0.278 V VOUT Low-level Output Voltage V OL —— 0 . 4 V I OL = 500 µA, VDD = VTRIP(MIN) VOUT High-level Output Voltage V OH VDD – 0.6 — — V I OH = 1 mA, For only MCP112 (push-pull output) Open-drain High Voltage on Output V ODH — — 13.5 (3) V MCP111 only, VDD = 3.0V, Time voltage > 5.5V applied  100s, current into pin limited to 2 mA, +25°C operation recommended Note 3, Note 4 Open-drain Output Leakage Current (MCP111 only) I OD —0 . 1 — µ A DC CHARACTERISTICS (CONTINUED) TA = -40°C to +125°C. Parameters Symbol Min. Typ. Max. Units Conditions Note 1: Trip point is ±1.5% from typical value. 2: Trip point is ±2.5% from typical value. 3: This specification allows this device to be used in PIC® microcontroller applications that require the In-Circuit Serial Programming™ (ICSP™) feature (see device-specific prog ramming specifications for voltage requirements). This specification DOES NOT allow a continuous high voltage to be present on the open-drain output pin (VOUT). The total time that the VOUT pin can be above the maximum device operational voltage (5.5V) is 100 sec. Current into the VOUT pin should be limited to 2 mA. It is recommended that the device operational temperature be maintained between 0°C to 70°C (+25°C preferred). For additional information, please refer to Figure 2-28. 4: This parameter is established by characterization and is not 100% tested.

DS20001889F-page 4  2004-2016 Microchip Technology Inc. FIGURE 1-1: Timing Diagram. AC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 k (only MCP111), TA = -40°C to +125°C. Parameters Symbol Min. Typ. Max. Units Conditions VDD Detect to VOUT Inactive t RPU —9 0 — µs Figure 1-1 and CL = 50 pF (Note 1) VDD Detect to VOUT Active t RPD —1 3 0 — µs V DD ramped from VTRIP(MAX) + 250 mV down to VTRIP(MIN) – 250 mV, per Figure 1-1, CL = 50 pF (Note 1) VOUT Rise Time After VOUT Active t RT —5 — µs For V OUT 10% to 90% of final value per Figure 1-1, CL = 50 pF (Note 1) Note 1: These parameters are for design guidance only and are not 100% tested. TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all limits are specified for VDD = 1V to 5.5V, RPU = 100 k (MCP111 only), TA = -40°C to +125°C. Parameters Symbol Min. Typ. Max. Units Conditions Temperature Ranges Specified Temperature Range T A -40 — +85 °C MCP1XX-195 Specified Temperature Range T A -40 — +125 °C Except MCP1XX-195 Maximum Junction Temperature T J — — +150 °C Storage Temperature Range T A -65 — +150 °C Package Thermal Resistances Thermal Resistance, 3L-SOT23 JA —3 3 6 —° C / W Thermal Resistance, 3L-SC-70 JA —3 4 0 —° C / W Thermal Resistance, 3L-TO-92 JA — 131.9 — °C/W Thermal Resistance, 3L-SOT-89 JA —1 1 0 — ° C / W VTRIP VDD VOUT tRPU VOH tRT tRPD VOL

 2004-2016 Microchip Technology Inc. DS20001889F-page 5 MCP111/112

2.0 TYPICAL PERFORMANCE CURVES

Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 k (only MCP111; see Figure 4-1), TA = -40°C to +125°C. FIGURE 2-1: IDD vs. Temperature (MCP111-195). FIGURE 2-2: IDD vs. Temperature (MCP112-300). FIGURE 2-3: IDD vs. Temperature (MCP112-475). FIGURE 2-4: IDD vs. VDD (MCP111-195). FIGURE 2-5: IDD vs. VDD (MCP112-300). FIGURE 2-6: IDD vs. VDD (MCP112-475). Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or ta bles, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0.2 0.4 0.6 0.8 1.2 1.4 1.6 -40 -20 100 120 140 Temperature (°C) IDD (uA) 1.7V 1.0V 2.1V 2.8V 4.0V 5.0V 5.5VMCP111-195 0.2 0.4 0.6 0.8 1.2 -40 -20 100 120 140 Temperature (°C) IDD (uA) 1.7V 1.0V 2.1V 2.8V 4.0V 5.0V MCP112-300 5.5V 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -40 -20 100 120 140 Temperature (°C) IDD (uA) 1.7V 1.0V 2.1V 2.8V 4.0V5.0V 5.5VMCP112-475 0.2 0.4 0.6 0.8 1.2 1.4 1.6 V DD (V) IDD (uA) -40°C +25°C +85°C +125°C MCP111-195 0.2 0.4 0.6 0.8 1.2 1.4 1.6 V DD (V) IDD (uA) MCP112-300 -40°C +25°C +85°C +125°C 0.2 0.4 0.6 0.8 1.2 1.4 1.6 V DD (V) IDD (uA) MCP112-475 -40°C +25°C +85°C +125°C

DS20001889F-page 10  2004-2016 Microchip Technology Inc.

3.0 PIN DESCRIPTION

The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin Number Symbol FunctionSOT-23-3 SC-70 SOT-89-3 T0-92 11 1 V OUT Output State VDD Falling: H = VDD > VTRIP L = VDD < VTRIP VDD Rising: H = VDD > VTRIP + VHYS L = VDD < VTRIP + VHYS 23 3 V SS Ground reference 32 2 V DD Positive power supply —4 — V DD Positive power supply

 2004-2016 Microchip Technology Inc. DS20001889F-page 11 MCP111/112

4.0 APPLICATION INFORMATION

For many of today’s microcontroller applications, care must be taken to prevent low-power conditions that can cause many different system problems. The most common causes is a brown-out condition, where the system supply drops below the operating level momen- tarily. The second most common cause is when a slowly decaying power supply caus es the microcontroller to begin executing instructions without sufficient voltage to sustain SRAM, thus producing indeterminate results. Figure 4-1 shows a typical application circuit. FIGURE 4-1: Typical Application Circuit.

4.1 V TRIP Operation

The voltage trip point (VTRIP) is determined on the falling edge of VDD. The actual voltage trip point (V TRIPAC) will be between the minimum trip point (V TRIPMIN) and the maximum trip point (VTRIPMAX). There is a hysteresis on this trip point to remove any “jitter” that would occur on the VOUT pin when the device VDD is at the trip point. Figure 4-2 shows the state of the V OUT pin as determined by the VDD voltage. The VTRIP specification is for falling V DD voltages. When the V DD voltage is rising, the VOUT pin will not be driven high until VDD is at VTRIP + VHYS. FIGURE 4-2: VOUT Operation as Determined by the VTRIP and VHYS.

4.2 Negative Going V DD Transients

The minimum pulse width (time) required to cause a reset may be an important criteria in the implementa- tion of a Power-on Reset (POR) circuit. This time is referred to as transient duration, defined as the amount of time needed for these supervisory devices to respond to a drop in V DD. The transient duration time is dependent on the magnitude of VTRIP – VDD. Generally speaking, the transient duration decreases with increases in VTRIP – VDD. Figure 4-3 shows a typical transient duration vs. reset comparator overdrive for which the MCP111/112 will not generate a reset pulse. It shows that the farther below the trip point the transient pulse goes, the duration of the pulse required to cause a reset gets shorter. Figure 2-18 shows the transient response characteristics for the MCP111/112. A 0.1 µF bypass capacitor, mounted as close as possible to the V DD pin, provides additional transient immunity (refer to Figure 4-1). MCP11X VDD VDD VDD VOUT MCLR (Reset Input) VSS GND PIC® Microcontroller RPU Note 1: RPU may be required with the MCP111 due to the open-drain output. Resistor R PU is not required with the MCP112. 0.1 µF (1) VDD VTRIPMAX VTRIPMIN VTRIPACVTRIPAC VTRIPAC + VHYSAC VOUT < 1 V is outside the device specifications

DS20001889F-page 12  2004-2016 Microchip Technology Inc. FIGURE 4-3: Example of Typical Transient Duration Waveform.

4.3 Effect of Temperature on Time-Out

Period (tRPU) The time-out period (t RPU) determines how long the device remains in the reset condition. This is affected by both V DD and temperature. The graph shown in Figures 2-22, 2-23 and 2-24 show the typical response for different VDD values and temperatures.

4.4 Using in PIC ® Microcontroller

ICSP™ Applications (MCP111 only) Figure 4-4 shows the typical application circuit for using the MCP111 for voltage supervisory function when the PIC microcontroller will be programmed via the In-Cir- cuit Serial Programming™ (ICSP) feature. Additional information is available in TB087, “Using Voltage Supervisors with PIC ® Microcontroller Systems which Implement In-Circuit Serial Programming™” , DS91087. FIGURE 4-4: Typical Application Circuit for PIC® Microcontroller with the ICSP™ feature. Time (µs)0VSupply Voltage VTRIP(MIN) - VDD tTRANS VTRIP(MAX) VTRIP(MIN) Note: It is recommended that the current into the RST pin be current limited by a 1 k  resistor. VDD/VPP VDD MCLR (reset input) (Active-Low) V SS PIC® MCU RPU 0.1 µF 1k  MCP111 VDD RST VSS

 2004-2016 Microchip Technology Inc. DS20001889F-page 13 MCP111/112

5.0 PACKAGING INFORMATION

5.1 Package Marking Information

3-Lead TO-92 Example: Device Code MCP111T-195I/TT MPNN MCP111T-240ETT MQNN MCP111T-270E/TT MGNN MCP111T-290E/TT NHNN MCP111T-300E/TT MJNN MCP111T-315E/TT MKNN MCP111T-450E/TT MLNN MCP111T-475E/TT MMNN MCP112T-195I/TT MRNN MCP112T-240ETT MSNN MCP112T-270E/TT MANN MCP112T-290E/TT MBNN MCP112T-300E/TT MCNN MCP112T-315E/TT MDNN MCP112T-450E/TT MENN MCP112T-475E/TT MFNN Example: Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. YWWNNN XXXXXX XXXXXX XXXXXX MCP111 240E TO^^ 626256 Device Code MCP111-240E/TO 240E MCP111-270E/TO 270E MCP111-290E/TO 290E MCP111-300E/TO 300E MCP111-315E/TO 315E MCP111-450E/TO 450E MCP111-475E/TO 475E MCP111-195I/TO 195I XXNN MP25

DS20001889F-page 14  2004-2016 Microchip Technology Inc. Package Marking Information (Continued) 3-Lead SC-70 Example: Device Code MCP111T-195I/LB EPNN MCP111T-240E/LB EQNN MCP111T-270E/LB EGNN MCP111T-290E/LB EHNN MCP111T-300E/LB EJNN MCP111T-315E/LB EKNN MCP111T-450E/LB ELNN MCP111T-475E/LB EMNN MCP112T-195I/LB ERNN MCP112T-240E/LB ESNN MCP112T-270E/LB EANN MCP112T-290E/LB EBNN MCP112T-300E/LB ECNN MCP112T-315E/LB EDNN MCP112T-450E/LB EENN MCP112T-475E/LB EFNN 3-Lead SOT-89 Example: EP25 NNN MP1626 256 Device Code MCP111T-195I/MB MP MCP111T-240EMB MQ MCP111T-270E/MB MG MCP111T-290E/MB NH MCP111T-300E/MB MJ MCP111T-315E/MB MK MCP111T-450E/MB ML MCP111T-475E/MB MM MCP112T-195I/MB MR MCP112T-240EMB MS MCP112T-270E/MB MA MCP112T-290E/MB MB MCP112T-300E/MB MC MCP112T-315E/MB MD MCP112T-450E/MB ME MCP112T-475E/MB MF

 2004-2016 Microchip Technology Inc. DS20001889F-page 15 MCP111/112 /g22/g16/g47/g72/g68/g71/g3/g51/g79/g68/g86/g87/g76/g70/g3/g55/g85/g68/g81/g86/g76/g86/g87/g82/g85/g3/g50/g88/g87/g79/g76/g81/g72/g3/g11/g55/g50/g12/g3/g62/g55/g50/g16/g28/g21/g64 /g49/g82/g87/g72/g86/g29 /g20/g17 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g86/g3/g36/g3/g68/g81/g71/g3/g40/g3/g71/g82/g3/g81/g82/g87/g3/g76/g81/g70/g79/g88/g71/g72/g3/g80/g82/g79/g71/g3/g73/g79/g68/g86/g75/g3/g82/g85/g3/g83/g85/g82/g87/g85/g88/g86/g76/g82/g81/g86/g17/g3/g48/g82/g79/g71/g3/g73/g79/g68/g86/g75/g3/g82/g85/g3/g83/g85/g82/g87/g85/g88/g86/g76/g82/g81/g86/g3/g86/g75/g68/g79/g79/g3/g81/g82/g87/g3/g72/g91/g70/g72/g72/g71/g3/g17/g19/g19/g24/g5/g3/g83/g72/g85/g3/g86/g76/g71/g72/g17 /g21/g17 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g76/g81/g74/g3/g68/g81/g71/g3/g87/g82/g79/g72/g85/g68/g81/g70/g76/g81/g74/g3/g83/g72/g85/g3/g36/g54/g48/g40/g3/g60/g20/g23/g17/g24/g48/g17 /g37/g54/g38/g29 /g37/g68/g86/g76/g70/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g17/g3/g55/g75/g72/g82/g85/g72/g87/g76/g70/g68/g79/g79/g92/g3/g72/g91/g68/g70/g87/g3/g89/g68/g79/g88/g72/g3/g86/g75/g82/g90/g81/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g86/g17 /g49/g82/g87/g72/g29/g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87/g3 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g56/g81/g76/g87/g86 /g44/g49/g38/g43/g40/g54 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g3/g47/g76/g80/g76/g87/g86 /g48/g44/g49 /g48/g36/g59 /g49/g88/g80/g69/g72/g85/g3/g82/g73/g3/g51/g76/g81/g86 /g49 /g22 /g51/g76/g87/g70/g75 /g72 /g17/g19/g24/g19/g3/g37/g54/g38 /g37/g82/g87/g87/g82/g80/g3/g87/g82/g3/g51/g68/g70/g78/g68/g74/g72/g3/g41/g79/g68/g87 /g39 /g17/g20/g21/g24 /g17/g20/g25/g24 /g50/g89/g72/g85/g68/g79/g79/g3/g58/g76/g71/g87/g75 /g40 /g17/g20/g26/g24 /g17/g21/g19/g24 /g50/g89/g72/g85/g68/g79/g79/g3/g47/g72/g81/g74/g87/g75 /g36 /g17/g20/g26/g19 /g17/g21/g20/g19 /g48/g82/g79/g71/g72/g71/g3/g51/g68/g70/g78/g68/g74/g72/g3/g53/g68/g71/g76/g88/g86 /g53 /g17/g19/g27/g19 /g17/g20/g19/g24 /g55/g76/g83/g3/g87/g82/g3/g54/g72/g68/g87/g76/g81/g74/g3/g51/g79/g68/g81/g72 /g47 /g17/g24/g19/g19 /g177 /g47/g72/g68/g71/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86 /g70 /g17/g19/g20/g23 /g17/g19/g21/g20 /g47/g72/g68/g71/g3/g58/g76/g71/g87/g75 /g69 /g17/g19/g20/g23 /g17/g19/g21/g21 E A L b e c R D 1 2 3 /g48/g76/g70/g85/g82/g70/g75/g76/g83 /g55/g72/g70/g75/g81/g82/g79/g82/g74/g92 /g39/g85/g68/g90/g76/g81/g74 /g38/g19/g23/g16/g20/g19/g20/g37

DS20001889F-page 16  2004-2016 Microchip Technology Inc. /g22/g16/g47/g72/g68/g71/g3/g51/g79/g68/g86/g87/g76/g70/g3/g54/g80/g68/g79/g79/g3/g50/g88/g87/g79/g76/g81/g72/g3/g55/g85/g68/g81/g86/g76/g86/g87/g82/g85/g3/g11/g55/g55/g12/g3/g62/g54/g50/g55/g16/g21/g22/g64 /g49/g82/g87/g72/g86/g29 /g20/g17 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g86/g3/g39/g3/g68/g81/g71/g3/g40/g20/g3/g71/g82/g3/g81/g82/g87/g3/g76/g81/g70/g79/g88/g71/g72/g3/g80/g82/g79/g71/g3/g73/g79/g68/g86/g75/g3/g82/g85/g3/g83/g85/g82/g87/g85/g88/g86/g76/g82/g81/g86/g17/g3/g48/g82/g79/g71/g3/g73/g79/g68/g86/g75/g3/g82/g85/g3/g83/g85/g82/g87/g85/g88/g86/g76/g82/g81/g86/g3/g86/g75/g68/g79/g79/g3/g81/g82/g87/g3/g72/g91/g70/g72/g72/g71/g3/g19/g17/g21/g24/g3/g80/g80/g3/g83/g72/g85/g3/g86/g76/g71/g72/g17 /g21/g17 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g76/g81/g74/g3/g68/g81/g71/g3/g87/g82/g79/g72/g85/g68/g81/g70/g76/g81/g74/g3/g83/g72/g85/g3/g36/g54/g48/g40/g3/g60/g20/g23/g17/g24/g48/g17 /g37/g54/g38/g29 /g37/g68/g86/g76/g70/g3/g39/g76/g80/g72/g81/g86/g76/g82/g81/g17/g3/g55/g75/g72/g82/g85/g72/g87/g76/g70/g68/g79/g79/g92/g3/g72/g91/g68/g70/g87/g3/g89/g68/g79/g88/g72/g3/g86/g75/g82/g90/g81/g3/g90/g76/g87/g75/g82/g88/g87/g3/g87/g82/g79/g72/g85/g68/g81/g70/g72/g86/g17 /g49/g82/g87/g72/g29/g41/g82/g85/g3/g87/g75/g72/g3/g80/g82/g86/g87/g3/g70/g88/g85/g85/g72/g81/g87/g3/g83/g68/g70/g78/g68/g74/g72/g3/g71/g85/g68/g90/g76/g81/g74/g86/g15/g3/g83/g79/g72/g68/g86/g72/g3/g86/g72/g72/g3/g87/g75/g72/g3/g48/g76/g70/g85/g82/g70/g75/g76/g83/g3/g51/g68/g70/g78/g68/g74/g76/g81/g74/g3/g54/g83/g72/g70/g76/g73/g76/g70/g68/g87/g76/g82/g81/g3/g79/g82/g70/g68/g87/g72/g71/g3/g68/g87/g3 /g75/g87/g87/g83/g29/g18/g18/g90/g90/g90/g17/g80/g76/g70/g85/g82/g70/g75/g76/g83/g17/g70/g82/g80/g18/g83/g68/g70/g78/g68/g74/g76/g81/g74 /g56/g81/g76/g87/g86 /g48/g44/g47/g47/g44/g48/g40/g55/g40/g53/g54 /g39/g76/g80/g72/g81/g86/g76/g82/g81/g3/g47/g76/g80/g76/g87/g86 /g48/g44/g49 /g49/g50/g48 /g48/g36/g59 /g49/g88/g80/g69/g72/g85/g3/g82/g73/g3/g51/g76/g81/g86 /g49 /g22 /g47/g72/g68/g71/g3/g51/g76/g87/g70/g75 /g72 /g19/g17/g28/g24/g3/g37/g54/g38 /g50/g88/g87/g86/g76/g71/g72/g3/g47/g72/g68/g71/g3/g51/g76/g87/g70/g75 /g72/g20 /g20/g17/g28/g19/g3/g37/g54/g38 /g50/g89/g72/g85/g68/g79/g79/g3/g43/g72/g76/g74/g75/g87 /g36 /g19/g17/g27/g28 /g177 /g20/g17/g20/g21 /g48/g82/g79/g71/g72/g71/g3/g51/g68/g70/g78/g68/g74/g72/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86 /g36/g21 /g19/g17/g26/g28 /g19/g17/g28/g24 /g20/g17/g19/g21 /g54/g87/g68/g81/g71/g82/g73/g73 /g36/g20 /g19/g17/g19/g20 /g177 /g19/g17/g20/g19 /g50/g89/g72/g85/g68/g79/g79/g3/g58/g76/g71/g87/g75 /g40 /g21/g17/g20/g19 /g177 /g21/g17/g25/g23 /g48/g82/g79/g71/g72/g71/g3/g51/g68/g70/g78/g68/g74/g72/g3/g58/g76/g71/g87/g75 /g40/g20 /g20/g17/g20/g25 /g20/g17/g22/g19 /g20/g17/g23/g19 /g50/g89/g72/g85/g68/g79/g79/g3/g47/g72/g81/g74/g87/g75 /g39 /g21/g17/g25/g26 /g21/g17/g28/g19 /g22/g17/g19/g24 /g41/g82/g82/g87/g3/g47/g72/g81/g74/g87/g75 /g47 /g19/g17/g20/g22 /g19/g17/g24/g19 /g19/g17/g25/g19 /g41/g82/g82/g87/g3/g36/g81/g74/g79/g72/g73 /g19/g131 /g177 /g20/g19/g131 /g47/g72/g68/g71/g3/g55/g75/g76/g70/g78/g81/g72/g86/g86 /g70 /g19/g17/g19/g27 /g177 /g19/g17/g21/g19 /g47/g72/g68/g71/g3/g58/g76/g71/g87/g75 /g69 /g19/g17/g22/g19 /g177 /g19/g17/g24/g23 b N E e D A c L φ /g48/g76/g70/g85/g82/g70/g75/g76/g83 /g55/g72/g70/g75/g81/g82/g79/g82/g74/g92 /g39/g85/g68/g90/g76/g81/g74 /g38/g19/g23/g16/g20/g19/g23/g37

 2004-2016 Microchip Technology Inc. DS20001889F-page 17 MCP111/112 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging

DS20001889F-page 18  2004-2016 Microchip Technology Inc. 0.15 C 0.15 C

0.10 C A B

C SEATING PLANE N TOP VIEW SIDE VIEW Microchip Technology Drawing C04-060C Sheet 1 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 3-Lead Plastic Small Outline Transistor (LB) [SC70] D EE1 e e 3X b A 0.30 C 3X TIPS END VIEW c L B A

 2004-2016 Microchip Technology Inc. DS20001889F-page 19 MCP111/112 Microchip Technology Drawing C04-060C Sheet 2 of 2 Number of Pins Overall Height Terminal Width Overall Width Terminal Length Exposed Pad Width Molded Package Thickness Pitch Standoff Units Dimension Limits A b e L E N

0.65 BSC

0.10 0.15 0.80 0.00 0.20

1.25 BSC

2.10 BSC

0.46 0.40 1.10 0.10 MAX c -0.20 0.26Lead Thickness 3-Lead Plastic Small Outline Transistor (LB) [SC70] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Overall Length Exposed Pad Length D D2 2.50

2.00 BSC

2.60 2.70 0.80 - 1.00 REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: 1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm per side. 2. Dimensioning and tolerancing per ASME Y14.5M

DS20001889F-page 20  2004-2016 Microchip Technology Inc. RECOMMENDED LAND PATTERN Microchip Technology Drawing No. C04-2060B 3-Lead Plastic Small Outline Transistor (LB) [SC70] BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M1. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Dimension Limits Units CContact Pad Spacing Contact Pitch MILLIMETERS E MAX 2.20 Contact Pad Length Contact Pad Width Y X 0.85 0.50 NOM Distance Between Pads G 1.25 C E X Y G SILK SCREEN

 2004-2016 Microchip Technology Inc. DS20001889F-page 21 MCP111/112 0LFURFKLS7HFKQRORJ\\'UDZLQJ& &6KHHWRI )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW KWWS ZZZPLFURFKLSFRPSDFNDJLQJ Note: SEATING PLANE F '$ '% '& $1<3$77(516+2:1 H H H E & $ % 3-Lead Plastic Small Outline Transistor (MB) - [SOT-89]

DS20001889F-page 22  2004-2016 Microchip Technology Inc. 0LFURFKLS7HFKQRORJ\\'UDZLQJ& &6KHHWRI2 )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW KWWS ZZZPLFURFKLSFRPSDFNDJLQJ Note: E/HDG:LGWK F/HDG7KLFNQHVV '&7DE/HQJWK 2SWLRQ& '2YHUDOO/HQJWK (0ROGHG3DFNDJH:LGWKDW7RS +2YHUDOO:LGWK $2YHUDOO+HLJKW %6&H2XWVLGH/HDG3LWFK %6&H3LWFK 0$;0,1'LPHQVLRQ/LPLWV 0,//,0(7(568QLWV )RRW/HQJWK / /HDGV :LGWK E 0ROGHG3DFNDJH:LGWKDW%DVH ( %6& %DVLF'LPHQVLRQ7KHRUHWLFDOO\\H[DFWYDOXHVKRZQZLWKRXWWROHUDQFHV SURWUXVLRQVVKDOOQRWH[FHHGPPSHUVLGH Notes: 1XPEHURI/HDGV 1 120 %6& %6& 7DE/HQJWK 2SWLRQ% 7DE/HQJWK 2SWLRQ$ 'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRU 'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(<0 3-Lead Plastic Small Outline Transistor (MB) - [SOT-89]

 2004-2016 Microchip Technology Inc. DS20001889F-page 23 MCP111/112 RECOMMENDED LAND PATTERN Microchip Technology Drawing C04-2029C 3-Lead Plastic Small Outline Transistor (MB) - [SOT-89] SILK SCREEN BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M1. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: Y X C Dimension Limits Units Y (2 PLACES) X2 (2 PLACES) MILLIMETERS MIN X (3 PLACES) MAX 1.300 3.125 NOM 1.50 (BSC)C 0.900 1.733 0.416 1.475 0.825 1.000 Y4Y3 G G (2 PLACES) 0.600

DS20001889F-page 24  2004-2016 Microchip Technology Inc.

5.2 Product Tape and Reel Specifications

FIGURE 5-1: Embossed Carrier Dimensions (8, 12, 16 and 24 mm tape only). FIGURE 5-2: 3-Lead SOT-23/SC70 Device Tape and Reel Specifications. CARRIER TAPE/CAVITY DIMENSIONS Case Outline Package Type Carrier Dimensions Cavity Dimensions Output Quantity Units Reel Diameter in mmW mm P mm mm mm mm TT SOT-23B 3L 8 4 3.15 2.77 1.22 3000 180 LB SC-70 3L 8 4 2.4 2.4 1.19 3000 180 Top Cover Tape P W Standard Reel Component Orientation Device Marking PIN 1 User Direction of Feed W P

DS20001889F-page 26  2004-2016 Microchip Technology Inc. NOTES:

 2004-2016 Microchip Technology Inc. DS20001889F-page 27 MCP111/112 APPENDIX A: REVISION HISTORY Revision F (July 2016) The following is the list of modifications: 1. Updated Table 3-1. 2. Updated Section 5.0 “Packaging informa- tion”. 3. Minor typographical corrections. Revision E (January 2013)

• Added a note to each package outline drawing. Revision D (June 2005) 1. Added SOT-89-3 package information throughout. Revision C (March 2005) The following is the list of modifications: 1. Added Section 4.4 “Using in PIC® Microcon- troller ICSP™ Applications (MCP111 only)” on using the MCP111 in PIC microcontroller ICSP applications. 2. Added V ODH specifications in Section 1.0 “Electrical Ch aracteristics” (for ICSP applications). 3. Added Figure 2-28. 4. Added devices features table to page 1. 5. Updated SC-70 package markings and added Pb-free marking information to Section 5.0 “Packaging information”. 6. Added Appendix A: “Revision History”. Revision B (August 2004) 1. Corrected package marking information in Section 5.0 “Packaging information”. Revision A (May 2004)
• Original release of this document.

DS20001889F-page 28  2004-2016 Microchip Technology Inc. NOTES:

 2004-2016 Microchip Technology Inc. DS20001889F-page 29 MCP111/112 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Device: MCP111: MicroPower Voltage Detector, open-drain MCP111T: MicroPower Voltage Detector, open-drain (Tape and Reel) MCP112: MicroPower Voltage Detector, push-pull MCP112T: MicroPower Voltage Detector, push-pull (Tape and Reel) Monitoring Options: 195 = 1.90V 240 = 2.32V 270 = 2.63V 290 = 2.90V 300 = 2.93V 315 = 3.08V 450 = 4.38V 475 = 4.63V Temperature Range: I = -40°C to +85°C (MCP11X-195 only) E = -40°C to +125°C (Except MCP11X-195 only) Package: LB = SC-70, 3-lead MB = SOT-89, 3-lead TO = TO-92, 3-lead TT = SOT-23B, 3-lead PART NO. XXX X TemperatureMonitoring Options Device Examples: a) MCP111T-195I/TT: Tape and Reel, 1.95V option, open-drain, -40°C to +85°C, SOT-23B package. b) MCP111T-315E/LB: Tape and Reel, 3.15V option, open-drain, -40°C to +125°C, SC-70-3 package. c) MCP111-300E/TO: 3.00V option, open-drain, -40°C to +125°C, TO-92-3 package. d) MCP111-315E/MB: 3.15V option, open-drain, -40°C to +125°C, SOT-89-3 package. a) MCP112T-290E/TT: Tape and Reel, 2.90V option, push-pull, - 40°C to +125°C, SOT-23B-3 package. b) MCP112T-475E/LB: Tape and Reel, 4.75V option, push-pull, -40°C to +125°C, SC-70-3 package. c) MCP112-450E/TO: 4.5V option, push-pull, -40°C to +125°C, TO-92-3 package. d) MCP112-315E/MB: 3.15V option, push-pull, -40°C to +125°C, SOT-89-3 package. Range XX Package X Tape/Reel Option

DS20001889F-page 30  2004-2016 Microchip Technology Inc. NOTES:

 2004-2016 Microchip Technology Inc. DS20001889F-page 31 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application me ets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY , PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting fr om such use. No licenses are conveyed, implicitly or ot herwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2004-2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-0860-4 Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification cont ained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal meth ods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC ® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 ==

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