MCM6226BB MOTOROLA | Alldatasheet
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Technical content
128K x 8 Bit Static Random Access Memory The MCM6226BB is a 1,048,576 bit static random access memory organized as 131,072 words of 8 bits. Static design eliminates the need for external clocks or timing strobes while CMOS circuitry reduces power consumption and provides for greater reliability. The MCM6226BB is equipped with both chip enable (E1 and E2) and output enable (G) pins, allowing for greater system flexibility and eliminating bus conten- tion problems. The MCM6226BB is available in 300 mil and 400 mil, 32 lead surface–mount SOJ packages.
- Single 5 V ± 10% Power Supply
- Fast Access Times: 15/17/20/25/35 ns
- Equal Address and Chip Enable Access Times
- All Inputs and Outputs are TTL Compatible
- Three State Outputs
- Low Power Operation: 190/180/165/150/130 mA Maximum, Active AC BLOCK DIAGRAM A A AAAA A A A A A A AA A MEMORY MATRIX
512 ROWS x
2048 COLUMNS
A A W G Order this document by MCM6226BB/D /C0077/C0079/C0084/C0079/C0082/C0079/C0076/C0065 SEMICONDUCTOR TECHNICAL DATA PIN ASSIGNMENT MCM6226BB EJ PACKAGE
300 MIL SOJ
CASE 857–02 PIN NAMES DQ VSS NC A A A A A A A A A A A DQ DQ VCC A W A A A G A DQ DQ DQ A DQ XJ PACKAGE
400 MIL SOJ
CASE 857A–02 DQ REV 2 10/31/96 Motorola, Inc. 1996
E1 E2 G W Mode I/O Pin Cycle Current H X X X Not Selected High–Z — ISB1 , ISB2 X L X X Not Selected High–Z — ISB1 , ISB2 L H H H Output Disabled High–Z — ICCA L H L H Read D out Read ICCA L H X L Write D in Write ICCA H = High, L = Low, X = Don’t Care ABSOLUTE MAXIMUM RATINGS (See Note) Rating Symbol Value Unit Power Supply Voltage Relative to VSS VCC – 0.5 to 7.0 V Voltage Relative to VSS for Any Pin Except VCC Vin, Vout – 0.5 to VCC + 0.5 V Output Current (per I/O) Iout ± 20 mA Power Dissipation PD 1.0 W Temperature Under Bias Tbias – 10 to + 85 °C Operating Temperature TA 0 to + 70 °C Storage Temperature Tstg – 55 to + 150 °C NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPER- ATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. DC OPERATING CONDITIONS AND CHARACTERISTICS (VCC = 5.0 V ± 10%, TA = 0 to 70°C, Unless Otherwise Noted) RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Max Unit Supply Voltage (Operating Voltage Range) VCC 4.5 5.5 V Input High Voltage VIH 2.2 VCC + 0.3** V Input Low Voltage VIL – 0.5* 0.8 V *VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width ≤ 20 ns). ** VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2 V ac (pulse width ≤ 20 ns). DC CHARACTERISTICS AND SUPPLY CURRENTS Parameter Symbol Min Max Unit Input Leakage Current (All Inputs, Vin = 0 to VCC ) Ilkg(I) — ± 1 µA Output Leakage Current (E* = VIH, Vout = 0 to VCC ) Ilkg(O) — ± 1 µA AC Active Supply Current (Iout = 0 mA, all inputs = MCM6226BB–15: tAVAV = 15 ns VIL or VIH, VIL = 0, VIH ≥ 3 V, cycle time ≥ tAVAV min, MCM6226BB–17: t AVAV = 17 ns VCC = max) MCM6226BB–20: t AVAV = 20 ns MCM6226BB–25: tAVAV = 25 ns MCM6226BB–35: tAVAV = 35 ns ICCA — 195 180 165 150 130 mA AC Standby Current (VCC = max, E* = VIH, f = fmax ) MCM6226BB–15: t AVAV = 15 ns MCM6226BB–17: tAVAV = 17 ns MCM6226BB–20: tAVAV = 20 ns MCM6226BB–25: tAVAV = 25 ns MCM6226BB–35: tAVAV = 35 ns ISB1 — mA CMOS Standby Current (E* ≥ VCC – 0.2 V, Vin ≤ VSS + 0.2 V or ≥ VCC – 0.2 V, VCC = max, f = 0 MHz) ISB2 — 5 mA Output Low Voltage (IOL = + 8.0 mA) VOL — 0.4 V Output High Voltage (IOH = – 4.0 mA) VOH 2.4 — V *E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E1. This device contains circuitry to protect the inputs against damage due to high static volt- ages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maxi- mum rated voltages to these high–impedance circuits. This CMOS memory circuit has been de- signed to meet the dc and ac specifications shown in the tables, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow of at least 500 linear feet per minute is maintained.
- W is high for read cycle.
- Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus con-
tention conditions during read and write cycles.
- E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E1.
- All timings are referenced from the last valid address to the first transitioning address.
- Addresses valid prior to or coincident with E
- At any given voltage and temperature, tEHQZ max is less than tELQX min, and tGHQZ max is less than tGLQX min, both for a given device
- Transition is measured ± 500 mV from steady–state voltage with load of Figure 1b.
- This parameter is sampled and not 100% tested.
- Device is continuously selected (E
provides data later than that time. Figure 1. AC Test Loads
READ CYCLE 1 (See Notes 1, 2, 3, and 9) A (ADDRESS) Q (DATA OUT) tAVAV tAXQX tAVQV DATA VALIDPREVIOUS DATA VALID READ CYCLE 2 (See Notes 3 and 5) ISB ICC tEHQZ tEHICCL DATA VALID tGHQZ tAVAV tELQX E (CHIP ENABLE) Q (DATA OUT) A (ADDRESS) tELICCH tELQV tAVQV tGLQV SUPPLY CURRENT HIGH–Z G (OUTPUT ENABLE) tGLQX
WRITE CYCLE 1 (W Controlled, See Notes 1, 2, 3, and 4) 6226BB–15 6226BB–17 6226BB–20 6226BB–25 6226BB–35 Parameter Symbol Min Max Min Max Min Max Min Max Min Max Unit Notes Write Cycle Time tAVAV 15 — 17 — 20 — 25 — 35 — ns 5 Address Setup Time tAVWL 0 — 0 — 0 — 0 — 0 — ns Address Valid to End of WritetAVWH 12 — 14 — 15 — 17 — 20 — ns Write Pulse Width tWLWH, tWLEH 12 — 14 — 15 — 17 — 20 — ns Data Valid to End of Write tDVWH 7 — 8 — 9 — 10 — 11 — ns Data Hold TIme tWHDX 0 — 0 — 0 — 0 — 0 — ns Write Low to Data High–Z tWLQZ — 6 — 7 — 7 — 8 — 8 ns 6, 7, 8 Write High to Output ActivetWHQX 5 — 5 — 5 — 5 — 5 — ns 6, 7, 8 Write Recovery Time tWHAX 0 — 0 — 0 — 0 — 0 — ns NOTES: 1. A write occurs during the overlap of E low and W low. 2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus con- tention conditions during read and write cycles. 3. E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E1. 4. If G goes low coincident with or after W goes low, the output will remain in a high–impedance state. 5. All timings are referenced from the last valid address to the first transitioning address. 6. Transition is measured ± 500 mV from steady–state voltage with load of Figure 1b. 7. This parameter is sampled and not 100% tested. 8. At any given voltage and temperature, tWLQZ max is less than tWHQX min both for a given device and from device to device. WRITE CYCLE 1 (W Controlled See Notes 1, 2, 3, and 4) tAVWH tWLQZ tWHAX tDVWH A (ADDRESS) E (CHIP ENABLE) W (WRITE ENABLE) D (DATA IN) Q (DATA OUT) DATA VALID HIGH–Z HIGH–Z tAVAV tAVWL tWLEH tWHDX tWLWH tWHQX
WRITE CYCLE 2 (E Controlled, See Notes 1, 2, 3, and 4) 6226BB–15 6226BB–17 6226BB–20 6226BB–25 6226BB–35 Parameter Symbol Min Max Min Max Min Max Min Max Min Max Unit Notes Write Cycle Time tAVAV 15 — 17 — 20 — 25 — 35 — ns 5 Address Setup Time tAVEL 0 — 0 — 0 — 0 — 0 — ns Address Valid to End of WritetAVEH 12 — 14 — 15 — 17 — 20 — ns Enable to End of Write tELEH, t 12 — 14 — 15 — 17 — 20 — ns 6, 7ELEH, tELWH Write Pulse Width tWLEH 12 — 14 — 15 — 17 — 20 — ns Data Valid to End of Write tDVEH 7 — 8 — 9 — 10 — 11 — ns Data Hold Time tEHDX 0 — 0 — 0 — 0 — 0 — ns Write Recovery Time tEHAX 0 — 0 — 0 — 0 — 0 — ns NOTES: 1. A write occurs during the overlap of E low and W low. 2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus con- tention conditions during read and write cycles. 3. E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E1. 4. If G goes low coincident with or after W goes low, the output will remain in a high–impedance state. 5. All timings are referenced from the last valid address to the first transitioning address. 6. If E goes low coincident with or after W goes low, the output will remain in a high–impedance state. 7. If E goes high coincident with or before W goes high, the output will remain in a high–impedance state. WRITE CYCLE 2 (E Controlled See Notes 1, 2, 3, and 4) tEHDX tDVEH tEHAXtELWHtAVEL tAVEH DATA VALID tAVAV HIGH–Z A (ADDRESS) W (WRITE ENABLE) E (CHIP ENABLE) Q (DATA OUT) D (DATA IN) tELEH tWLEH
ORDERING INFORMATION
(Order by Full Part Number) Motorola Memory Prefix Part Number Package (XJ = 400 mil SOJ, EJ = 300 mil SOJ) Full Part Numbers — MCM6226BBXJ15 MCM6226BBXJ15R2 MCM6226BBEJ15 MCM6226BBEJ15R2 MCM6226BBXJ17 MCM6226BBXJ17R2 MCM6226BBEJ17 MCM6226BBEJ17R2 MCM6226BBXJ20 MCM6226BBXJ20R2 MCM6226BBEJ20 MCM6226BBEJ20R2 MCM6226BBXJ25 MCM6226BBXJ25R2 MCM6226BBEJ25 MCM6226BBEJ25R2 MCM6226BBXJ35 MCM6226BBXJ35R2 MCM6226BBEJ35 MCM6226BBEJ35R2 Shipping Method (R2 = Tape and Reel, Blank = Rails) Speed (15 = 15 ns, 17 = 17 ns, 20 = 20 ns, 25 = 25 ns, 35 = 35 ns) MCM 6226BB XX XX XX
32 LEAD
CASE 857A–02 S MIN MIN MAX MAX MILLIMETERS INCHES DIM G -T- 0.10 (0.004) SEATING PLANE R -B- P 0.17 (0.007)S T SS BA 0.17 (0.007)S T S SAB 0.17 (0.007)S T SAB 0.25 (0.010)S T S SBA -A- L 32 17 161 K D 32 PL DETAIL Z RADIUS F 32 PL N NOTE 3 NOTE 3 DETAIL Z S CE A B C D E F G K L N P R S 20.83 10.03 3.26 0.41 2.24 0.67 0.89 0.76 11.05 9.27 0.77 21.08 10.29 3.75 0.50 2.48 0.81 1.14 1.14 11.30 9.52 1.01 0.820 0.395 0.128 0.016 0.088 0.026 0.035 0.030 0.435 0.365 0.030 0.830 0.405 0.148 0.020 0.098 0.032 0.045 0.045 0.445 0.375 0.040
1.27 BSC
0.64 BSC
0.050 BSC
0.025 BSC
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. TO BE DETERMINED AT PLANE -T-. 4. DIMENSION A & B DO NOT INCLUDE MOLD PROTRUSION. MOLD PROTRUSION SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 5. DIMENSION A & B INCLUDE MOLD MISMATCH AND ARE DETERMINED AT THE PARTING LINE. PACKAGE DIMENSIONS
CASE 857–02 SS B0.25 (0.010) SS A0.17 (0.007) G L K –A– –X– 1 16 1732 M F D P -B- E C R S NOTE 3 NOTE 4 NOTE 5 NOTE 5 RADIUS 32 PL 32 PL DETAIL Z 0.10 (0.004) SEATING PLANE -T- MIN MIN MAX MAX MILLIMETERS INCHES DIM A B C D E F G K L N P R S 20.83 7.50 3.26 0.41 2.24 0.67 0.89 0.76 8.38 6.60 0.77 21.08 7.74 3.75 0.50 2.48 0.81 1.14 1.14 8.64 6.86 1.01 0.820 0.295 0.128 0.016 0.088 0.026 0.035 0.030 0.330 0.260 0.030 0.830 0.305 0.148 0.020 0.098 0.032 0.045 0.045 0.340 0.270 0.040 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DATUM PLANE -X- LOCATED AT TOP OF MOLD PARTING LINE AND COINCIDENT WITH TOP OF LEAD, WHERE LEAD EXITS BODY. 4. TO BE DETERMINED AT PLANE -X-. 5. TO BE DETERMINED AT PLANE -T-. 6. DIMENSION A & B DO NOT INCLUDE MOLD PROTRUSION. MOLD PROTRUSION SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 7. 857-01 IS OBSOLETE, NEW STANDARD 857-02. SS A0.17 (0.007) SS B0.17 (0.007) Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;JAPAN : Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1, P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488 – US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 INTERNET : http://motorola.com/sps MCM6226BB/D◊