MCM60L256A-C MOTOROLA | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 8
Technical content
me SEMICONDUCTOR Saeeen ng TECHNICAL DATA Advance Information 32K x8 Bit CMOS Static Random Access Memory Extended Temperature Range: — 40 to 85°C ED) . ree ' CASE 761H ‘The MCM60L256A.-C is @ 262,144 bit low-power static random access memory orga- nized as 32,768 words of 8 bits, fabricated using silicon-gate CMOS technology. Static design eliminates the need for external clocks or timing strobes, while CMOS circuitry reduces power consumption and provides greater reliability. The operating current is PIN ASSIGNMENT 5 mA/MHz (typ) and the cycle time is 100 ns. For long cycle times (> 100 ns), the auto- matic power down (APD) circuitry will temporarily shut down various power consuming medic Dee circuits, thereby reducing the active power consumption. hw Chip enable (E) controls the power-down feature. It is not a clock but rather a chip ara? bad control that affects power consumption. When E is a logic high, the part is placed in low args 26 ats power standby mode. The maximum standby current is 2 «A (Ta =25°C). Chip enable nets 2s fas also controls the data retention mode. Another control feature, output enable (G) allows ass bas access to the memory contents as fast as 50 ns. Thus the MCM60L256A-C is suitable for use in various microprocessor application systems where high speed, low power, and moe apa battery backup are required. a3q7 2pe ‘The MCM60L256A.-C is offered in a 28 pin 330 mil gull-wing SO package. ate 21fao @ Single 5 V Supply, + 10% mga 2pe © 32K x8 Organization ang 10 19 loa? ‘© Fully Static — No Clock or Timing Strobes Necessary div wh © Low Power Dissipation—27.5 mW/MHz (Typical Active) 00 08 © Output Enable and Chip Enable Inputs for More System Design Flexibility and Low oar 12 ‘17 fogs Power Standby Mode 002913 16 P)oas © Battery Backup Capability (Maximum Standby Current=2 yA @ 25°C) Ngsl 14 15 Ploas @ Data Retention Supply Voltage=2.0 V to 5.5 V @ All inputs and Outputs Are TTL Compatible @ Three State Outputs @ Fast Access Time: MCM60L256A-C10 = 100 ns (Max) [PINNAMES =i AOAI sss ssee ee Aron BLOCK DIAGRAM We... Write Enable: »s—e— uw —fe— Do0-Da7. | || | Beta Input/Output s—ee— veneer |= ss no t=] _kow (512 ROWS AND. ss an foe 512 COLUMNS) Anz fs] ana fe——J m—_ tara | | 007 ren . RRRARRR PAID 4 an tees a i) Y | ‘This document contin nfomaton on 8 new product. Spetiaton and infomation har are sub tochange without nose MOTOROLA DRAM DATA MCM60L256A-C 6-23
‘TRUTH TABLE [= Te TW [Mode [sunpiy Current [vo Pin] jars conn crcl 10 pots tne [Hx [x [fet saecid [tgp [High | votes or tc tn however, to a [Woh 2] Yang a normal precawona be akan to Output avoid. of i | application of any voltage higher than [eres [tcc ot] tnt vttgee io toe Ng Wt tec Lin] pce eat, X=don't care ABSOLUTE MAXIMUM RATINGS (See Note) Powe Suppl Vohoge [vec [030 +70 | v | Vohoge to Any Pin with Respect to Ves Powe Dispaton Tanasrci soc|@p | os | w | [Opening Tenpeure | ta | ww ee | we | [Stomge Tonpomue | Tug | 850 +160 | =e | NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. DC OPERATING CONDITIONS AND CHARACTERISTICS (Vec=5.0 V + 10%, Ta= 40 to 85°C, Unless Otherwise Noted) RECOMMENDED OPERATING CONDITIONS: Suppl Vokage (OperaingVokoge Range [vec [+s | so | ss | v | [mut Wigh Voroge | |e |_| (ec [inout tow vote TT | ose | | os | vd 6 | Vi. lnin)= 013 Vd Vi nd > BDV a Ip wth ZB al DC CHARACTERISTICS [Parmeter i Symbet [min [te [Max] umn | Top Leakage Curent (Al np, Vin =0 1 Veg [ng [| <oor | sto | a_| Output Leakage Curent E=Vin or S=Vin or W=Vu-Vout=Ot0 Veo) | tugioy | | <00 | +10 | oa | Operating Current (Reed Cycle) locat ma (E=Vi_, W= Viz, Other Input= Vin/Vit, lout MA) — tavav=t ae tavay = 100 ns. (E=0.2 v, W=Vcec-0.2 V, Other Input=Vec-0.2 V/0.2 V, tout=0 mA) tavav=1 ss 0 ne Stacy Curent E=Vin [ser [| [30 ma | ‘Standby Current (Ez Vcc -0.2 V, Voc =2.0 to 6.5 VI 100 oA (Ta =25°C) 2 Ouaput Low Vaage Ug, =4.0 mA) [vo [= | - |e Tv | Typical values are referenced to Ta =25°C and Voc = 5.0 V CAPACITANCE (f= 1 MHz, Ta =25°C, Periodically Sampled Rather Than 100% Tested) [Charncroets | Siento | Min [Mex | umn | Tap Capacitance Vin= OV) Aioua treo 0a| Cy | | 0 | oF | 1/0 Capactanca(V/0=0¥1 val eyo | - | 0 | # | MCM60L256A-C MOTOROLA DRAM DATA 6-24
- Wis high at al times for read cycles.
3, These parameters are periodical sempled and not 100% tested. Figure 1. AC Test Load
WRITE CYCLE 1 AND 2 (See Note 1) [ Write Cyclo Time way | twee ff | ~*t [ Address Setwp Time tater | ws | o | - | = | — | | Address Vaid to End of Wite T tavwniitaven | aw | | — | me | — | | Write Puse width we we Pm | | me | 2 | | Deta Vaid to End of write tovwiltpven | tow | 3% | - | m | — | | Dsta Hod Time | twoxitenox | ton | 0 | - | = | — | [ Write Low to Output in High tox | wz | 0 | os | oe | 84 | | Write High to Output towz tnx | mz | to | — | mm | 34 | | wite Recovery Time ewnaxitenax | twa | o | - | m= | § | [Chip Enable to End of wite | tetwiteuen | tow | 8 | - | m | - | NOTES: 1. Outputs are in high impedance state if G is high during Write Cycle, 2. A.write occurs during the overtap (twp) of a low E and a low W. if W goes low prior to E low then outputs will remain in a high impedance rate, 3. All high-Z and low-Z parameters are considered in a high or low impedance state when the outputs have made # 100 mV transition from the pravious steady state voltage. (4, These parameters are periodically sampled and not 100% tested. 5. twr is measured from the eartier of E or W going high to the end of write cycle. WRITE CYCLE 1 (W CONTROLLED) way <= ——— 7, few oats SAA LLL LLLLL. AW OwRITE ENABLE) ae YYVY YY Y VY VY VV komo | VTVV VV VV maz twHOX HIGHT VYV WIGHZ YYVY oexnonn OX”) XXX) SE MCM60L256A-C MOTOROLA DRAM DATA 6-26
WRITE CYCLE 2 (E Controlled) ‘wav rumen YX ——SCSC—* TAVEL ELEM TeHAX I ‘ven TECHIP ENABLE) LH own ENABLED Wns | LTT. HGH IMPEDANCE GH IMPEDANCE (oATA OUT oven ‘eno. son a, DATA RETENTION CHARACTERISTICS (T= -40 to 85°C) [Parameter Symbot [min [tye | Mex | Unt | [Wor to Data Renton Evec-oav) SSS or | tof ss | | Data Retention Current (E=Vcc-0.2 V) Vee=3.0V | Iccor 50 oA Vec=5.5 V 100 [Chip Diablo to Dow Retonion Time SSSCSC~d Cc | [operon RecovryTine te | as | | *tavav= Read Cycle Time 6 | DATA RETENTION MODE COATA RETENTION MODE Yee av Yor=20¥ “sv con. fe - EaVpq-02 E cowTRot vw Yat NOTE: If the Viy of Eis 2.4 V in operation, Igg1 current flows during the period that the Vcc voltage is decreasing from 4.5 V to 2.4 V. a aa MOTOROLA DRAM DATA MCM60L256A-C 6-27
Figure 1. Input High Voltage versus Supply Voltage Figure 2. Input Low Voltage versus Supply Voltage Figure 3. Operating Current versus Ambient
4 SS SS_—q
Figure 4. Igg1 Standby Current versus Ambient Figure 5. Igp2 Standby Current versus Ambient
ORDERING INFORMATION
(Order by Full Part Number) MCM 60258A X X XX XX Motorola Memory Prefix —_- LL ‘Shipping Method (R2= Tape & Reel, Blank = Rails) Part Number ‘Speed (10= 100 ns) ‘Operating Temperature Range (C=Industrial Range, ~ 40 to 85°C) F=Gull-Wing SO) Full Part Number— MCM60L256AFC10 MCMEOL256AFC10R2 NOTE: For mechanical data, please see Chapter 10. —SSSSSSSSSSSSSSSSSSSSSSSSssssssssse MCM60L256A-C_ MOTOROLA DRAM DATA 6-30