MCM5101 MOTOROLA | Alldatasheet
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‘The MCMB101 family of CMOS RAMs offers ultra low power and ful- cmos ly static operation with a single 5-volt supply. The CMOS 1024bit devices are organized in 256 words by 4 bits. Seperate data inputs and (COMPLEMENTARY MOS) data outputs permit maximum flexibility in bus-oriented systems, Data retention at a power supply as low as 2.0 volts over temperature readily 1024-BIT STATIC allows design into applications using battery backup for nonvoiatilty RANDOM ACCESS MEMORY The MCM6101 is fully static and does not require clocking in standby mode. The MCM5101 is fabricated using the Motorola advanced ion- implanted, silicon-gate technology for high performance and high reliability. © Low Standby Power @ Fast Access Time © Single +6.0 Volt Supply my yt | © Fuily TTL Compatible — All Inputs and Outputs yyy ieee C SUFFIX © Three-State Output ce ACRE © Fully Static Operation ° = @ Data Retention to 2.0 Volts x © Direct Replacement for: a Inte! 5101 Series a] no ‘AMI SBI01 Series agile Hitachi HM435101 Series Py J--" | PSUFFX © Pin Replacement for Harris HM6501 Series yer caaree eed ‘Typical Current ‘Typical Current MCMBILOTCAS, PAB, [oreo ao PIN ASSIGNMENT MCMBILOICES, PES [org oo | wcnsroices, pes [oo Po so ast WT 2Pvec [_ mewsiorce9, pag Poa) ate 2ipas ads 20 flaw aos 19 ICE , BLOCK DIAGRAM ass iehoo “eo 3 Cell Array Aets \\7Hcen ae a2coumes| Gnd Ping ‘ (Enabie) onoge isflow ase pings 14003 we [ +0 - f>%.001 porto isos 3 ° oluma VO f cee Gy 1 > aon i im peg 12002 Ee f>“o002 aN oo. Input column pipes earl Data Decoder 01 ory contre! f>Seo0s TRUTH TABLE 013 os L__] Ly [cei] ce2|Oo[R/W)oin| Ourpurl Mode | owe H/] xX |X] X |X | High-Z[Not Selectes D> x]. |x| x | x | Hish-z|Not Selectes Sutters a But x] x |] H | x | Hign-zlouput disabied oo pS. D- Lf | HY | x | ign 2 |e “Ab Se’ L}H| LLL] x] dig [write tlw |e} wx] dou |Read (DS9628/9-80 3-9
MAXIMUM RATINGS (Voltages reteronced to Vss Pin 8). [ating TT Simba [Vee [Unit] This device contains circuitry to protect the in- [ BeSieprvouge vce T= pus egos aoe di oo sat vtoos DC Supp Votooe Nec _{ —o8t0+70 [7 V | Otic held, however, i's adv tor Vata er Any Pa Faawvec+03 tas pacatare be ace io we appa o Operating Temperature Range [Ta [Ot +706] any voltage nigher then maximum reted voltages Storage Temperature Range {0 is igh-mpedance cre NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are ex- ceeded. Functional operation should be resticted to RECOMMENDED OPERA. ING CONDITIONS, Exposure to higher than recommended voltages for extended Detiods of time could atfect device reliably DC OPERATING CONDITIONS AND CHARACTERISTICS (Ful operating voltage and temperature range uniess otherwise noted) RECOMMENDED OPERATING CONDITIONS: Parameter |" Symbot [Min [Tye [Mex [Unit | Logie 1 Voltage, All Inputs Vin | 23 | - Weeroa] vv] Logic 0 Voltage, All Inputs =o3 [=] oss Tv] DC CHRACTERISTICS q [iepur Curent w= Tso - fT -Psof - [-[sol - [ma] < rot gh Volage [vie [22] — Wecvod 22] - Wecrod aa] - Necwod_v_| oO input Low Voltage [vu [=o = [06s [-os| — | 06s [-o3f | oes |v | Output Hah Voge fgu=—TOmA | vow [24] —|~-—]2a[-= | -—Jaat 1 — Tv] ‘Output Low Votoge Toy =20 Al [vo [f= [oa [f= foe ff fee ‘Output Leakage Current Lol? To (CE1=2.2 V. VoL=0V to Veo) Lo * Operating Curent Win= Vcc, except CE150.65 V, teen " outputs open! Operating Current Win=2.2 V, Except CE1$0.65 V, lec2 2 a oulputs open) Standby Current a (CE250.2 V. Vin=0V of Veo) ‘ecu ” CAPACITANCE (f= 1.0 MHz, Ta=25°C. Voc=5 V periodically sampled rather than 100% tested) [Characteristic Symbol [Typ [Max [Unit | Input Capacitance Win= OV) [cin [ao [eo [oF | utput Capacitance (Vour=0 V) Sour [80] 20] oF | LOW Vcc DATA RETENTION CHARACTERISTICS (Excluding MCM5101-80) [ _____ Parameter | Tost Conctions YT Symbot_[ Min [Tye [Max [Unit | WGC for Data Ratntion |__| vor [20 | - |-- ]-v MCMBTLOT-45, -65 Data Retention Current ceaso2v | Von=20v | iccom | - | 01 | 0 | oA | MCMBIOI-65 Data Retention Curent Vor=20V | iccona | - | 070 | 20 | yA ‘Chip Deselect to Data Retention Time [con os [Operation Recover Time Pt ews J Notes 1, Typical velies are Ta = 25°C and nominal supply voltage 2. Current through al inputs and outputs included in lec measurement 3. tmc= Reed Cyete Time 4. Low current state is for CE2=0 only 3-10
LOW Vcc DATA RETENTION WAVEFORM TYPICAL ICCDR v8 TEMPERATURE ata Retention Vor cl-a2v Wee) 475y 1} vqe20v LA ' z | toon Lyon |" 3 | | Yow Ba Chip Enable o2Vv - | 0002030408080 70 TEMPERATURE (2c) AC OPERATING CONDITIONS AND CHARACTERISTICS (Full operating voltage and temperature unless otherwise noted) Input Pulse Leves. +066V1022V Ouiput Load. 1 TTL Gato and Cy = 100 pF Input Rise and Fall Tumos 2ns Timing Measurement Reference Level 18V READ CYCLE s ‘MCN1L07-65 a cmsi.01.45 | McMs101-65. | McMs101-80 Pm [ Reed Gye tne Paso = Peso | fom | as | Acewss Time tg ao 80 0s Chip Enable (CET) to Outowt [cor | =~] 400 | — | oo — | 000 ns] Chip Enable (CE2) to Output | tcoz [=| 800 [=| 700 | [[oviput sable i Gutpat gp = 80 a 0s] | Date Output to Highz Stare toe [0 | mo | 0 [eo fo | am | ns Previous Read Data Vaid with Respect to Adress Change ton | 0 | - [0 | - po} —- | 1s] Previous Read Date Valid with Respect to Chip Enable tow | 0 | - po fo] - prs WRITE CYCLE MCMEIL07-65 Parameter ‘Symbol MCMS5101-65 | MCM5101-80 [Min [Max [Min [Max |" Min [Max | Write Cycle | swe | so | [eo [= [eo [Tons | | Write Delay aw [a8 280s] | Chip Enabie EW to Wine tows [80 f= Yeo | eco Ps] | hip Enable (CER wo Wate Otc | 80 [=| oe [eo ns | Date Setup tow 26000 as] Date Hold [ton [so [= [oo [= 0 T= ns] Write Pulse [we | 20 | [ 400 [= | eo f= ns) Write Recovery [wa [bo [= [so [=o Te | Output Disable Setup SO a 3-11
| tRC neon CO) cer B hed | (Common 7011? om ac wn WRITE CYCLE TIMING oo TW nese CO) : | _ oD —| owe we own nw wwe we Saye ed owt se 9 epoaon 3-12