MC9RS08LA8 FREESCALE | Alldatasheet
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Data Sheet: Technical Data Document Number: MC9RS08LA8 Rev. 1, 10/2008 © Freescale Semiconductor, Inc., 2008. All rights reserved. This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. MC9RS08LA8 Features:
- 8-Bit RS08 Central Processor Unit (CPU) – Up to 20 MHz CPU at 2.7 V to 5.5 V across temperature range of –40°C to 85°C – Subset of HC08 instruction set with added BGND instruction
- O n - C h i p M e m o r y – 8 KB flash read/program/erase over full operating voltage and temperature – 256-byte random-access memory (RAM) – Security circuitry to prevent unauthorized access to flash
contents
- Power-Saving Modes – Wait and stop
- Clock Source Options – Oscillator (XOSC) — Loop- control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 39.0625 kHz or 1 MHz to 16 MHz – Internal clock source (ICS ) — Internal clock source module containing a frequency-locked-loop (FLL) controlled by internal or external reference; supports bus frequencies up to 10 MHz
- System Protection – Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source or bus clock – Low-v oltage detection with reset or interrupt; selectable trip points – Illegal opcode detection with reset – Illegal address detection with reset – Flash block protection
- Development Support – Single-wire background debug interface – Breakpoint capability to allow single breakpoint setting during in-circuit debugging
- Peripherals – LCD — Up to 8 × 21 or 4 × 25 segments; compatible with 5 V or 3 V LCD glass displays using on-chip charge pump; functional in wait, stop modes for very low power LCD operation; frontplane and backplane pins multiplexed with GPIO functions; selectable frontplane and backplane configurations – ADC — 6-channel, 10-bit resolution; 2.5 μs conversion time; automatic compare function; 1.7 mV/°C temperature sensor; internal bandgap reference channel; operation in stop; fully functional from 2.7 V to 5.5 V . – TPM — One 2-channel 16-bit timer/pulse-width modulator (TPM) module – SCI — One 2-channel serial communications interface module with optional 13-bit break; LIN extensions – SPI — One serial peripheral interface module in 8-bit data length mode with a receive data buffer hardware match function – ACMP — Analog comparator with option to compare to internal reference – MTIM — One 8-bit modulo timer – KBI — 8-pin keyboard interrupt module – RTI — One real-time interrupt module with optional reference clock.
- Input/Output – 33 GPIOs including 1 output only pin and 1 input only pin. – Hysteresis and configurable pullup device on all input pins; configurable slew rate and drive strength on all output pins.
- Package Options – 48-pin QFN – 48-pin LQFP MC9RS08LA8
48 QFN
48 LQFP
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Freescale Semiconductor2 Table of Contents
3.7 External (XOSC) and Internal (ICS) Oscillator
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com/ The following revision history table summarizes changes contained in this document. Revision Date Description of Changes 1 10/9/2008 Initial public released. Related Documentation Find the most current versions of all documents at: http://www.freescale.com Reference Manual (MC9RS08LA8RM) Contains extensive product information including modes of operation, memory, resets and interrupts, register definition, port pins, CPU, and all module information.
1 MCU Block Diagram
The block diagram, Figure 1, shows the structure of the MC9RS08LA8 MCU. Figure 1. MC9RS08LA8 Series Block Diagram
20 MHz INTERNAL CLOCK
1 MHz to 16 MHz
256 BYTES
8192 BYTES
- PTB2/RESET/VPP is an input only pin when used as port pin
- PTC6/ACMPO/BKGD/MS is an output only pin
2 Pin Assignments
This section shows the pin assignments in the packages available for the MC9RS08LA8 series. Table 1. Pin Availability by Package Pin-Count
48 Port Pin Alt 1 Alt 2 Alt 3 Alt 4 Alt 5
1 PTD7 LCD7
2 PTD6 LCD6
3 PTD5 LCD5
4 PTD4 LCD4
5 PTD3 LCD3
6 PTD2 LCD2
7 PTD1 LCD1
8 PTD0 LCD0
10 VCAP2
11 VLL1
12 VLL2
13 VLL3
14 PTA6 KBIP6 ACMP+
15 PTA7 KBIP7 ACMP–
16 V SSAD/VREFL
17 V DDAD/VREFH
18 PTB0 EXTAL
19 PTB1 XTAL
21 V SS
22 PTB2 RESET V PP
23 PTC0 RxD
24 PTC1 TxD
25 PTC2 TPMCH0
26 PTC3 TPMCH1
27 PTC6 ACMPO BKGD MS
28 PTC7 TCLK LCD28
29 PTA0 SS KBIP0 ADP0 LCD27
30 PTA1 SPSCK KBIP1 ADP1 LCD26
31 PTA2 MISO KBIP2 RxD ADP2 LCD25
32 PTA3 MOSI KBIP3 TxD ADP3 LCD24
33 PTA4 KBIP4 ADP4 LCD23
34 PTA5 KBIP5 ADP5 LCD22
35 LCD21
36 LCD20
37 LCD19
38 LCD18
39 LCD17
40 LCD16
41 PTE7 LCD15
42 PTE6 LCD14
43 PTE5 LCD13
44 PTE4 LCD12
45 PTE3 LCD11
46 PTE2 LCD10
47 PTE1 LCD9
48 PTE0 LCD8
Table 1. Pin Availability by Package Pin-Count (continued)
Figure 2. MC9RS08LA8 Series in 48-Pin QFN/LQFP Package
Electrical Characteristics
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Freescale Semiconductor 7
3 Electrical Characteristics
This chapter contains electrical and timing specifications.
3.1 Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the customer a better understanding the following classification is used and the parameters are tagged accordingly in the tables where appropriate: NOTE The classification is shown in the column labeled “C” in the parameter tables where appropriate.
3.2 Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the limits specified in Table 3 may affect device reliability or cause permanent damage to the device. For functional operating conditions, refer to the remaining tables in this chapter. This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for instance, either VSS or VDD) or the programmable pull-up resistor associated with the pin is enabled. Table 2. Parameter Classifications P Those parameters are guaranteed during production testing on each individual device. sample size across process variations. D Those parameters are derived mainly from simulations. Table 3. Absolute Maximum Ratings
MC9RS08LA8 Series MCU Data Sheet, Rev. 1
3.3 Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in on-chip logic and voltage regulator circuits and it is user-determined rather than being controlled by the MCU design. In order to take PI/O into account in power calculations, determine the difference between actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of unusually high pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very small. The average chip-junction temperature (TJ) in °C can be obtained from: TJ = TA + (PD × θJA) Eqn. 1 where: TA = Ambient temperature, °C θJA = Package thermal resistance, junction-to-ambient, °C /W PD = Pint + PI/O Pint = IDD × VDD, Watts chip internal power PI/O = Power dissipation on input and output pins user determined For most applications, PI/O << Pint and can be neglected. An approximate relationship between PD and TJ 1 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two resistance values. 2 All functional non-supply pins are internally clamped to VSS and VDD except the RESET/VPP pin which is internally clamped to VSS only. 3 Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if the clock rate is very low which would reduce overall power consumption. Table 4. Thermal Characteristics
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Freescale Semiconductor 9 (if PI/O is neglected) is: PD = K ÷ (TJ + 273°C) Eqn. 2 Solving Equation 1 and Equation 2 for K gives: K = PD × (TA + 273°C) + θJA× (PD)2 Eqn. 3 where K is a constant pertaining to the particular part. K can be determined from Equation A-3 by measuring PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by solving equations 1 and 2 iteratively for any value of TA.
3.4 ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge. Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage. All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits. During the device qualification ESD stresses were performed for the human body model (HBM), the machine model (MM) and the charge device model (CDM). A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot temperature, unless specified otherwise in the device specification. Table 5. ESD and Latch-up Test Conditions
MC9RS08LA8 Series MCU Data Sheet, Rev. 1
3.5 DC Characteristics
This section includes information about power supply requirements, I/O pin characteristics, and power supply current in various operating modes. Table 6. ESD and Latch-Up Protection Characteristics
1 Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
1 Human body model (HBM) V HBM ±2000 — V
2 Machine model (MM) V MM ±200 — V
3 Charge device model (CDM) V CDM ±500 — V
2 These pins meet JESD78A Class II (section 1.2) Level A (section 1.3) requirement of ±100 mA. 3 This pin meets JESD78A Class II (section 1.2) Level B (section 1.3) characterization to ±75 mA. Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient)
10 P Input leakage current (per pin)
11 P High impedance (off-state) leakage current (per pin)
12 C Internal pullup/pulldown resistors 2(all port pins) RPU 20 45 65 k Ω
14 C Maximum total I OH for all port pins |I OHT| — — 100 mA
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Freescale Semiconductor 11 Figure 3. Typical IOH vs. VDD-VOH (VDD = 5.5 V)
16 C Maximum total I OL for all port pins I OLT — — 100 mA
18 C Input capacitance (all non-supply pins) C In —— 7p F
1 This parameter is characterized and not tested on each device. 2 Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown. 3 The IOH is for high output drive strength. 4 It is tested under high output drive strength only. resistance values for positive and negative clamp voltages, then use the larger of the two values. 7 This parameter is characterized and not tested on each device. Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient) (continued)
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Figure 8. Typical VDD vs. VIL
3.6 Supply Current Characteristics
Table 8. Supply Current Characteristics
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Freescale Semiconductor 15
3.7 External (XOSC) and Internal (ICS) Oscillator Characteristics
Reference Figure 9 for crystal or resonator circuit. 6C RTI adder from stop with 1 kHz clock source enabled4 — 52 . 4 μA 31 . 9 μA 8C LVI adder from stop (LVDE = 1 and LVDSE = 1) — 57 0 μA 36 5 μA 1 Typicals are measured at 25 °C.
2 Does not include any dc loads on port pins
3 Required asynchronous ADC clock and LVD to be enabled. 4 Most customers are expected to find that auto-wakeup from stop can be used instead of the higher current wait mode. Wait mode typical is 1.37 mA at 5 V and 3 V with fBus = 10 MHz. Table 8. Supply Current Characteristics (continued)
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Table 9. External Oscillator Specifications (Temperature Range = –40 to 85°C Ambient) 1 Data in Typical column was characterized at 3.0 V, 25 °C or is typical recommended value. 2 See crystal or resonator manufacturer’s recommendation.
4 MHz
1 MHz
3 This parameter is characterized and not tested on each device. 4 Proper PC board layout procedures must be followed to achieve specifications. as the reference, this specification assumes it is already running.
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Freescale Semiconductor 17 Figure 9. Typical Crystal or Resonator Circuit
3.8 AC Characteristics
This section describes ac timing characteristics for each peripheral system.
3.8.1 Control Timing
6 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBUS. Table 10. Control Timing may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case. 3 Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40°C to 85°C.
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Figure 10. Reset Timing Figure 11. KBI Pulse Width
3.8.2 TPM/MTIM Module Timing
Figure 12. Timer External Clock Table 11. TPM/MTIM Input Timing
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Freescale Semiconductor 19 Figure 13. Timer Input Capture Pulse
3.9 Analog Comparator (ACMP) Electrical
3.10 Internal Clock Source Characteristics
Table 12. Analog Comparator Electrical Specifications 1 These data are characterized but not production tested. Measurements are made with the device entered STOP mode. Table 13. Internal Clock Source Specifications 1 Data in typical column was characterized at 3.0 V and 5.0 V, 25 °C or is typical recommended value.
3 This value has been trimmed to 20 MHz when out of factory
20 MHz
MC9RS08LA8 Series MCU Data Sheet, Rev. 1
3.11 ADC Characteristics
4 This parameter is characterized and not tested on each device. 5 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing from FLL disabled (FBILP) to FLL enabled (FEI, FBI). Table 14. 5 Volt 10-bit ADC Operating Conditions reference only and are not tested in production.
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Freescale Semiconductor 21 Figure 14. ADC Input Impedance Equivalency Diagram Table 15. 10-bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD)
MC9RS08LA8 Series MCU Data Sheet, Rev. 1
3.12 AC Characteristics
This section describes AC timing characteristics for each peripheral system.
3.12.1 Control Timing
Conversion time (Including sample time) Short Sample (ADLSMP = 0) Pt ADC —2 0— ADCK cycles Long Sample (ADLSMP = 1) — 40 — Sample time Short Sample (ADLSMP = 0) Pt ADS —3 . 5— ADCK cycles Long Sample (ADLSMP = 1) — 23.5 — Total unadjusted error 10-bit mode PE TUE — ±1 ±2.5 LSB2 8-bit mode — ±0.5 ±1.0 Differential non-linearity 10-bit mode PD N L — ±0.5 ±1.0 LSB2 8-bit mode — ±0.3 ±0.5 Monotonicity and no-missing-code guaranteed Integral non-linearity 10-bit mode CI N L — ±0.5 ±1.0 LSB2 8-bit mode — ±0.3 ±0.5 Zero-scale error 10-bit mode PE ZS — ±0.5 ±1.5 LSB2 8-bit mode — ±0.5 ±0.5 Full-scale error VADIN = VDDA 10-bit mode PE FS — ±0.5 ±1.5 LSB2 8-bit mode — ±0.5 ±0.5 Quantization error 10-bit mode DE Q —— ±0.5 LSB2 8-bit mode — — ±0.5 Input leakage error pad leakage3 * RAS 10-bit mode DE IL — ±0.2 ±2.5 LSB2 8-bit mode — ±0.1 ±1 1 Typical values assume VDDAD = 5.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference only and are not tested in production. 2 1 LSB = (VREFH – VREFL)/2N 3 Based on input pad leakage current. Refer to pad electrical. Table 16. Control Timing Table 15. 10-bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD) (continued)
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Freescale Semiconductor 23 Figure 15. Reset Timing Figure 16. KBI Pulse Width
3.13 Flash Specifications
memory. For detailed information about program/erase operations, see the reference manual. or may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case. 3 Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40 °C to 85 °C. Table 17. Flash Characteristics Table 16. Control Timing (continued)
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Figure 17. Example VPP Filtering 1 Typicals are measured at 25 °C. programmed more than twice before next erase. filter is shown in Figure 17. Table 17. Flash Characteristics (continued)
12 V 1 nF
Ordering Information
MC9RS08LA8 Series MCU Data Sheet, Rev. 1 Freescale Semiconductor 25 Figure 18. Flash Program Timing Figure 19. Flash Mass Erase Timing
4 Ordering Information
1 Next Data applies if programming multiple bytes in a single row, refer to MC9RS08LA8 Series Reference
2 VDD must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
1 VDD must be at a valid operating voltage before voltage is applied or removed from
5 Mechanical Drawings
This following pages contain mechanical specifications for MC9RS08LA8 series package options.
- 48-pin QFN (quad flat non-leader)
- 48-pin LQFP (low-profile quad flat-pack)
Table 18. Device Numbering System FLASH RAM Type Designator Document No.
9 RS08 LA XX
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