MC9RS08KB12 FREESCALE | Alldatasheet
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Data Sheet: Technical Data Document Number: MC9RS08KB12 Rev. 3, 8/2009 © Freescale Semiconductor, Inc., 2008-2009. All rights reserved. This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. MC9RS08KB12
- 8-Bit RS08 Central Processor Unit (CPU) – Up to 20 MHz CPU at 1.8 V to 5.5 V across temperature range of –40 °C to 85 °C – Subset of HC08 instruction set with added BGND instruction – Single Global interrupt vector
- O n - C h i p M e m o r y – Up to 12 KB flash read/p rogram/erase over full operating voltage and temperature,
12 KB/8 KB/4 KB/2 KB flash are optional
– Up to 254-byte random-access memory (RAM), 254-byte/126-byte RAM are optional – Security circuitry to prevent unauthorized access to flash
contents
- Power-Saving Modes – Wait mode — CPU shuts down; system clocks continue to run; full voltage regulation – Stop mode — CPU shuts down; system clocks are stopped; voltage regulator in standby – Wakeup from power-saving modes using RTI, KBI, ADC, ACMP, SCI and LVD
- Clock Source Options – Oscillator (XOSC) — Loop- control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 39.0625 kHz or 1 MHz to 16 MHz – Internal Clock Source (ICS ) — Internal clock source module containing a frequency-locked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allows 0.2% resolution and 2% deviation over temperature and voltage; supporting bus frequencies up to 10 MHz
- System Protection – Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal low power oscillator – Low-voltage detection with reset or interrupt – Illegal opcode detection with reset – Illegal address detection with reset – Flash-block protection
- Development Support – Single-wire background debug interface – Breakpoint capability to al low single breakpoint setting during in-circuit debugging
- Peripherals – ADC — 12-channel, 10-bit resolution; 2.5 μs conversion time; automatic compare function; 1.7 mV/°C temperature sensor; internal bandgap reference channel; operation in stop; hardware trigger; fully functional from 2.7 V to 5.5 V – ACMP — Analog comparator; full rail-to-rail supply operation; option to compare to fixed internal bandgap reference voltage; can operate in stop mode – TPM — One 2-channel timer/pulse-width modulator module; selectable input capture, output compare, or buffered edge- or center-aligned PWM on each channel – IIC — Inter-integrated circuit bus module capable of operation up to 100 kbps with maximum bus loading; capable of higher baud rates with reduced loading – SCI — One serial communicat ions interface module with optional 13-bit break; LIN extensions – MTIM — Two 8-bit modulo timers; optional clock sources – RTI — One real-time clock with optional clock sources – KBI — Keyboard interrupts; up to 8 ports
- Input/Output – 18 GPIOs in 20-pin package; 14 GPIOs in 16-pin package; 6 GPIOs in 8-pin package; including one output-only pin and one input-only pin – Hysteresis and configurable pullup device on all input pins; configurable slew rate and drive strength on all output pins
- Package Options – MC9RS08KB12/MC9RS08KB8/MC9RS08KB4 — 20-pin SOIC, 16-pin SOIC NB or TSSOP – MC9RS08KB2 — 8-pin SOIC or DFN MC9RS08KB12 Series Covers:MC9RS08KB12 MC9RS08KB8 MC9RS08KB4 MC9RS08KB2 16-Pin TSSOP Case 948F 20-Pin SOIC Case 751D 16-Pin SOIC N/B Case 751B 8-Pin SOIC Case 7518-Pin DFN Case 1452-02
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Freescale Semiconductor2 Table of Contents
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com/ The following revision history table summarizes changes contained in this document. Revision Date Description of Changes 1 4/13/2009 Updated on shared review comments, added package information. 2 5/22/2009 Completed most of the TBDs, corrected the block diagram. 3 8/31/2009 Completed all the TBDs. Changed VLVD and added RPD in the Table 7. Changed SIDD, ADC adder from stop, RTI adder from stop with 1 kHz clock source enabled and LVI adder from stop at 5 V in the Table 8. Related Documentation Find the most current versions of all documents at: http://www.freescale.com Reference Manual (MC9RS08KB12RM) Contains extensive product information including modes of operation, memory, resets and interrupts, register definition, port pins, CPU, and all module information.
1 MCU Block Diagram
The block diagram, Figure 1, shows the structure of the MC9RS08KB12 MCU. Figure 1. MC9RS08KB12 Series Block Diagram
2 Pin Assignments
This section shows the pin assignments in the packages available for the MC9RS08KB12 series.
20 MHz INTERNAL CLOCK
1 MHz to 16 MHz
- PTA5/TCLK/RESET/VPP is an input-only pin when used as port pin
- PTA4/ACMPO/BKGD/MS is an output-only pin when used as port pin
Table 1. Pin Availability by Package Pin-Count
333 V DD
444 V SS
can be configured only once. 2 TPM pins can be remapped to PTB4 and PTB5, default reset location is PTA0 and PTA1. can be configured only once.
MC9RS08KB12 Series MCU Data Sheet, Rev. 3
Electrical Characteristics
3 Electrical Characteristics
3.1 Introduction
This chapter contains electrical and timing specifications for the MC9RS08KB12 series of microcontrollers available at the time of publication.
3.2 Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the customer a better understanding the following classification is used and the parameters are tagged accordingly in the tables where appropriate: NOTE The classification is shown in the column labeled “C” in the parameter tables where appropriate.
3.3 Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the limits specified in Table 3 may affect device reliability or cause permanent damage to the device. For functional operating conditions, refer to the remaining tables in this chapter. This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for instance, VSS or VDD) or the programmable pull-up resistor associated with the pin is enabled. Table 2. Parameter Classifications P Those parameters are guaranteed during production testing on each individual device. sample size across process variations. D Those parameters are derived mainly from simulations. Table 3. Absolute Maximum Ratings
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Freescale Semiconductor 7
3.4 Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in on-chip logic and voltage regulator circuits and it is user-determined rather than being controlled by the MCU design. In order to take PI/O into account in power calculations, determine the difference between actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of unusually high pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very small. The average chip-junction temperature (TJ) in °C can be obtained from: TJ = TA + (PD × θJA) Eqn. 1 where: TA = Ambient temperature, °C θJA = Package thermal resistance, junction-to-ambient, °C /W PD = Pint + PI/O Pint = IDD × VDD, Watts chip internal power PI/O = Power dissipation on input and output pins user determined Storage temperature range T stg –55 to 150 °C 1 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two resistance values. 2 All functional non-supply pins are internally clamped to VSS and VDD except the RESET/VPP pin which is internally clamped to VSS only. 3 Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if the clock rate is very low which would reduce overall power consumption. Table 4. Thermal Characteristics Table 3. Absolute Maximum Ratings (continued)
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 For most applications, PI/O << Pint and can be neglected. An approximate relationship between PD and TJ (if PI/O is neglected) is: PD = K ÷ (TJ + 273°C) Eqn. 2 Solving Equation 1 and Equation 2 for K gives: K = PD × (TA + 273°C) + θJA× (PD)2 Eqn. 3 where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by solving Equation 1 and Equation 2 iteratively for any value of TA.
3.5 ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge. Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage. During the device qualification ESD stresses were performed for the human body model (HBM) and the charge device model (CDM). A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot temperature, unless specified otherwise in the device specification. Table 5. ESD and Latch-Up Test Conditions
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Freescale Semiconductor 9
3.6 DC Characteristics
This section includes information about power supply requirements, I/O pin characteristics, and power supply current in various operating modes. Table 6. ESD and Latch-Up Protection Characteristics
1 Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
1 Human body model (HBM) V HBM ±2000 — V
2 Charge device model (CDM) V CDM ±500 — V
3 Latch-up current at T A = 85 °C I LAT ±100 — mA
Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient)
4 C Power on RESET (POR) voltage V POR
9 C Input hysteresis (all digital inputs) V hys
10 P Input leakage current (per pin)
12 P Internal pullup resistors 2(all port pins) R PU 20 45 65 k Ω
13 P Internal pulldown resistors 2(all port pins) R PD 20 45 65 k Ω
5 V, ILoad = 2 mA
3 V, ILoad = 1 mA
5 V, I
3 V, ILoad = 3 mA
1.8 V, ILoad = 2 mA
15 C Maximum total I OH for all port pins |IOHT|— — 40 mA
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Figure 5. Typical VOH vs. IOH
17 C Maximum total I OL for all port pins IOLT —— 40 mA
19 C Input capacitance (all non-supply pins) CIn ——7 p F
1 This parameter is characterized and not tested on each device. 2 Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown. resistance values for positive and negative clamp voltages, then use the larger of the two values. resistance values for positive and negative clamp voltages, then use the larger of the two values. 6 This parameter is characterized and not tested on each device. Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient) (continued)
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Figure 28. Typical IOL vs. VOL
3.7 Supply Current Characteristics
Table 8. Supply Current Characteristics
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Freescale Semiconductor 23 Wait mode supply current3 measured at (fBus = 2.00 MHz) WIDD2 841.13 859.98 873.69 –40 μA8T 3 840.21 850.60 846.67 –40 9 T 1.80 630.64 635.10 643.67 –40 10 C Wait mode supply current measured at Bus = 1.00 MHz) WIDD1 667.86 683.38 688.02 –40 μA11 T 3 666.34 672.79 669.15 –40 12 T 1.80 505.39 509.28 502.52 –40 13 P Stop mode supply current SI DD 1.15 1.40 7.67 –40 μA14 C 3 1.05 1.26 4.52 –40 15 C 1.80 0.39 0.56 4.21 –40 16 C ADC adder from stop 3 — 128.86 140.44 154.97 –40 μA17 T 3 102.98 111.71 118.33 –40 18 T 1.80 54.77 66.33 74.42 –40 19 C ACMP adder from stop (ACME = 1) — 14.43 15.96 16.77 –40 μA20 T 3 14.37 14.72 14.45 –40 21 T 1.80 13.05 14.02 12.92 –40 Table 8. Supply Current Characteristics (continued)
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 RTI adder from stop with 1 kHz clock source enabled4 — 0.10 0.10 0.17 –40 μA23 T 3 0.02 0.06 0.02 –40 24 T 1.80 0.40 0.45 0.20 –40 25 T RTI adder from stop with 32.768KHz external clock source reference enabled 0.70 1.08 1.94 –40 μA26 T 3 0.56 0.56 0.62 –40 27 T 1.80 0.70 0.86 0.50 –40 28 C LVI adder from stop (LVDE = 1 and LVDSE = 1) — 58.93 68.27 76.60 –40 μA29 T 3 58.89 61.98 63.45 –40 30 T 1.80 52.84 54.52 52.49 –40 1 Maximum value is measured at the nominal VDD voltage times 10% tolerance. Values given here are preliminary estimates prior to completing characterization. 2 Not include any DC loads on port pins. 3 Required asynchronous ADC clock and LVD to be enabled. 4 Most customers are expected to find that auto-wakeup from stop can be used instead of the higher current wait mode. Wait mode typical is 1.3 mA at 3 V and 1 mA at 2 V with fBus = 1 MHz.
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Freescale Semiconductor 25
3.8 External Oscillator (XOSC) Characteristics
3.9 AC Characteristics
This section describes AC timing characteristics for each peripheral system. Table 9. Oscillator Electrical Specifications (Temperature Range = –40 to 85°C Ambient) 1 Typical data was characterized at 5.0 V, 25 °C or is recommended value. 2 The input clock source must be divided using RDIV to within the range of 31.25 kHz to 39.0625 kHz.
2 D Load capacitors C 1, C2
4 MHz
1 MHz
MC9RS08KB12 Series MCU Data Sheet, Rev. 3
3.9.1 Control Timing
Figure 29. Reset Timing Figure 30. KBI Pulse Width Table 10. Control Timing
1 D Bus frequency (t cyc = 1/fBus)f Bus 0— 1 0 M H z
2 D Real time interrupt internal oscillator period t RTI 700 1000 1300 μs
3 D External RESET pulse width1
1 This is the shortest pulse guaranteed to pass through the pin input filter circuitry. Shorter pulses may or may not be recognized.
4 D KBI pulse width 2
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
5 D KBI pulse width in stop 1 tKBIPWS 100 — — ns
3 Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40 °C to 85 °C.
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Freescale Semiconductor 27
3.9.2 TPM/MTIM Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that can be used as the optional external source to the timer counter. These synchronizers operate from the current bus rate clock. Figure 31. Timer External Clock Figure 32. Timer Input Capture Pulse
3.10 Analog Comparator (ACMP) Electrical
Table 11. TPM Input Timing
1 D External clock frequency f TPMext DC f Bus/4 MHz
2 D External clock period t TPMext 4— t cyc
Table 12. Analog Comparator Electrical Specifications
2 P Supply current (active) I DDAC —2 0 3 5 μA
4 C Analog input offset voltage 1 VAIO —2 0 4 0 m V
6 C Analog source impedance 1 RAS —— 1 0 k Ω
MC9RS08KB12 Series MCU Data Sheet, Rev. 3
3.11 Internal Clock Source Characteristics
3.12 ADC Characteristics
9P Analog Comparator bandgap reference voltage VBG 1.1 1.208 1.3 V 1 These data are characterized but not production tested. Table 13. Internal Clock Source Specifications 1 Data in typical column was characterized at 3.0 V and 5.0 V, 25 °C or is typical recommended value.
7 C FLL acquisition time 2,3
2 This parameter is characterized and not tested on each device. changing from FLL disabled (FBILP) to FLL enabled (FEI, FBI). Table 14. 10-Bit ADC Operating Conditions Table 12. Analog Comparator Electrical Specifications (continued)
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Freescale Semiconductor 29 Figure 33. ADC Input Impedance Equivalency Diagram for reference only and are not tested in production. Table 15. 10-Bit ADC Characteristics (VREFH = VDDAD, VREFL = VSSAD) Table 14. 10-Bit ADC Operating Conditions (continued)
MC9RS08KB12 Series MCU Data Sheet, Rev. 3
3.13 Flash Specifications
This section provides details about program/erase times and program-erase endurance for the flash memory. For detailed information about program/erase operations, see the reference manual. C Supply Current ADLPC = 0 ADLSMP = 0 ADCO = 1 I DDAD — 0.582 1 mA C ADC Asynchronous Clock Source High Speed (ADLPC = 0) f ADACK 23 . 35 M H z t ADACK = 1/fADACK Low Power (ADLPC = 1) 1.25 2 3.3 D Conversion Time (Including sample time) Short Sample (ADLSMP = 0) t ADC — 20 — ADCK cycles See reference manual for conversion time variances Long Sample (ADLSMP = 1) — 40 — D Sample Time Short Sample (ADLSMP = 0) t ADS — 3.5 — ADCK cycles Long Sample (ADLSMP = 1) — 23.5 — CT o t a l Unadjusted Error 10-bit mode E TUE — ±1.5 ±3.5 LSB 2 Includes quantization 8-bit mode — ±0.7 ±1.5 T Differential Non-Linearity 10-bit mode DNL — ±0.5 ±1.0 LSB 2 8-bit mode — ±0.3 ±0.5 Monotonicity and No-Missing-Codes guaranteed C Integral Non-Linearity 10-bit mode INL — ±0.5 ±1.0 LSB 2 8-bit mode — ±0.3 ±0.5 P Zero-Scale Error 10-bit mode E ZS — ±1.5 ±2.5 LSB 2 VADIN = VSSA 8-bit mode — ±0.5 ±0.7 P Full-Scale Error 10-bit mode E FS — ±1 ±1.5 LSB 2 VADIN = VDDA 8-bit mode — ±0.5 ±0.5 D Quantization Error 10-bit mode E Q —— ±0.5 LSB 2 8-bit mode — — ±0.5 D Input Leakage Error 10-bit mode E IL — ±0.2 ±2.5 LSB 2 Pad leakage2 * RAS8-bit mode — ±0.1 ±1 1 Typical values assume VDDAD = 5.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference only and are not tested in production. 2 Based on input pad leakage current. Refer to pad electricals.
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Freescale Semiconductor 31 Figure 34. Example VPP Filtering Table 16. Flash Characteristics 1 Typicals are measured at 25 °C.
5 P Byte program time tprog 20 — 40 μs
6 P Mass erase time tme 500 — — ms
7 C Cumulative program HV time 2
programmed more than twice before next erase.
9 D HVEN to program setup time tpgs 10 — — μs
10 D PGM/MASS to HVEN setup time tnvs 5— — μs
11 D HVEN hold time for PGM tnvh 5— — μs
12 D HVEN hold time for MASS tnvh1 100 — — μs
13 D V PP to PGM/MASS setup time tvps 20 — — ns
14 D HVEN to V PP hold time tvph 20 — — ns
15 D V PP rise time3
filter is shown in Figure 34.
16 D Recovery time trcv 1— — μs
17 D Program/erase endurance
18 C Data retention tD_ret 15 — — years
12 V 1 nF
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Figure 35. Flash Program Timing Figure 36. Flash Mass Erase Timing
1 Next Data applies if programming multiple bytes in a single row, refer to MC9RS08KB12 Series
2 VDD must be at a valid operating voltage before voltage is applied or removed from the VPP pin. 1 VDD must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
MC9RS08KB12 Series MCU Data Sheet, Rev. 3 Freescale Semiconductor 33
3.14 EMC Performance
Electromagnetic compatibility (EMC) performance is highly dependant on the environment in which the MCU resides. Board design and layout, circuit topology choices, location and characteristics of external components as well as MCU software operation all play a significant role in EMC performance. The system designer should consult Freescale applications notes such as AN2321, AN1050, AN1263, AN2764, and AN1259 for advice and guidance specifically targeted at optimizing EMC performance.
3.14.1 Radiated Emissions
Microcontroller radiated RF emissions are measured from 150 kHz to 1 GHz using the TEM/GTEM Cell method in accordance with the IEC 61967-2 and SAE J1752/3 standards. The measurement is performed with the microcontroller installed on a custom EMC evaluation board while running specialized EMC test software. The radiated emissions from the microcontroller are measured in a TEM cell in two package orientations (North and East).
MC9RS08KB12 Series MCU Data Sheet, Rev. 3
Ordering Information
4 Ordering Information
This section contains ordering numbers for MC9RS08KB12 series devices. See below for an example of the device numbering system.
5 Mechanical Drawings
This following pages contain mechanical specifications for MC9RS08KB12 series package options.
- 20-pin SOIC (small outli ne integrated circuit)
- 16-pin SOIC NB (narrow body smal l outline integrated circuit)
- 16-pin TSSOP (thin shri nk small outline package)
- 8-pin SOIC NB (narrow body small outline integrated circuit)
- 8-pin DFN (plastic dual in-line pin)
Table 17. Device Numbering System Flash RAM Type Designator Document No.
20 SOIC WB WJ 98ASB42343B
16 SOIC NB SG 98ASB42566B
16 TSSOP TG 98ASH70247A
8 SOIC NB SC 98ASB42564B
8 DFN DC 98ARL100557D
9 RS08 KB XX
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