MC92610

MC92610 MOTOROLA | Alldatasheet

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MHTL INTEGRATED CIRCUITS MiTL *MC660 P,L Series (-30°C to +75°C) *MC66O0TL Series (—55°C to +125°C) Motorola's MHTL integrated circuits are especially designed to meet pLasr enn the requirements of industrial applications because of the outstanding " case Gao Noise immunity. MHTL circuits provide error-free operation in high | | noise environments far beyond the tolerance of other integrated circuit families. Multifunction packages and broad operating temperature range PLAS Te rae waGe further tailor this device family to the industrial designer's requirements. R CASE 64a “*MHTL cermaic dual in-line devices are available with specification over the -55°C to +125°C temperature range and/or with hi-rel processing on special order. See your Motorola representative for pricing. TL, L SUFFIX MHTL, MOTL, MTTL, and MATL are trademarks of Motorola Inc il CERAMIC PACKAGE CASE 620 | a! P SUFFIX hail PC SUFFIX wn TL, L SUFFIX PLASTIC PACKAGE PLASTIC PACKAGE CERAMIC PACKAGE CASE 675 CASE 676 CASE 632 FUNCTIONS AND CHARACTERISTICS (Vcc = 15 V + 1.0 Vdc, Ta = 25°C) Power Loading Propagation Dissipation Type Factor Delay mW ie Each Output ns typ typ/pkg | Expandable Oval input WAND Gate (active puliup) _[ _mceso | 10 «| ~—stn0——~«d?SCt a @ | wae | [ Expandabie Dusi 4 input NANO Gate (passive pullup) | _Mcesi__| 10 | 125 | 80/26@) | 6aa.cas | | Expendable Qual input Line Driver (NAND) | mces2 [3040 —«dstw026 @ | oa2.646 | | 30mHz@ | 200 [632.646 | [hor Sve 8's Fp Fog esse 2] so | 00] MATLWS 104 (MATL) | tuple Lever Transiavor Teese ft Ss «YS —=«dé(Cit a | Quel Monostable Multivibrator cee? [0d ta —«dY Sao —«idtCi ws | Quad 2 input NAND Gare (passive puiup) [cess [0d Sts «d= @ | 602,606 | | Oval 4 input Expander cosa a cas | [Triple Sinput NAND Gate (passive pullup) [cov [od «dita | es2.cas | | Tple input NAND Gate (active pulp) [cov [0 —dta2ae | 6s2.606 | | Quod 2input NAND Gate (active pulup) [| mce72 [10 iY 0 +t tee @ | 62,646 | [Duet Zinput AND OR.INVERT Gere (ective pulup) | _mce7a | ___ 10] 110] 160780 @ | 632,646 | |_Ouei 2 input AND-ORINVERT Gate (passive puilup) [ceva [10 «(| 128 —+| 160/s0@ | 2.646 | a [ BCD To Decimal Decoder Driver | cere [CY S00 SC«dY~SSi—~«d;sCié Oa | Hex inverter With Strobe (activepullup) | mca77 [0 —C«dYSt0—=«dt~Ci B® | 620,600 | [Hex Inverter With Strobe (without output resistors) | _mce7a__| 10 | 125] 192706 @) | 620,648] | Quai Lamp/tine Driver ce798 [125 | OSustve | 250/90@ | 632,646 | [Hex tnverter (active pullupy "ices fod tt ares @ | aa2.cas_| | Mex inverter (open collector) coat [to —C«dY Stas «| ~i9296@ | 62,646 _| | Gued Latch conoid 20a | | QueczinputExciusive OR Gate | coos | tT «dS CSCO —*dY~C—ira2, ga | | Oscace Counter cosa to ose @ | 480 —*| 620,640 _| | Bmary Counter cess [0 sma @ | 40+ ~—ez0.eaa_| [ 48x shitt Register CU cess 00s @ | 480 | 620,600 | | Over SK Fipfiop cess 0 ase @ [375 [620.648 _| | Hex inverter (high voltage) cess [0 CdS Cd 7B @ | 632,686 | [_ Hex inverter active puttup) cosa | to —«dYSStSO + tae @ | 6a2,c46 | Laeivererinnrss tener [coor [ro [200 soornso@ | eazes | | | 250 ~A Quad 2:inputNAND Gate (Schmitt Trigger) [essa [ 200 «| —-400_~—=S«~=SCtis0o—=«d;Ct wa Ta ine Orv T0@ 10VV [astrimgenncmerenene wee (RS RYYE| ow [eed | omen _| Tex towerter (Passive Pull-uo) TC [$00 =A Duel 2input AND Gate (Schmitt Trigger) | cess | 400_—=«_—=wo—=«;~SSCt8O «dCi G76 | T ~ a +fiz aenores Dual in:Line Ceramic Package, P denotes Dual in-Line Plastic Package (i.e., MC660L = Dual In-Line Ceramic, UCEEOP = Due In-Line Piastic Package) 2-0-8 eg tnput Low @ trog nn

i MC660 MC661 MC668 Expandable Expandable Quad 2-Input NAND Gate Dual 4-Input NAND Gate Dual 4-Input NAND Gate (passive output pullup) {active output pullup) (passive output pullup) (yd aod wD a ) 2 3 (10) 6 (10) m2 6(10) ay 2 i ¢ (4 (i) 4 as ‘ m5 iD ka 3 3 a) & ny) 9 9 10 8 (10) 8 (10) ) (a) 12 (112 (1) 12 1 11:(10) (13 y413 (13. " u tpg = 110.95 typ tog = 125 ns typ tpg = 125 ns typ Pp = 88 mW typ/pkg (Inputs High) Pp = 88 mW typ/pkg (Inputs High) Po = 176 mW typ/pkg (Inputs High) 26 mW typ/pkg (Input Low) 26 mW typ/pkg (Input Low) 52 mW typ/pkg (Input Low) Mc670 MC671 MC672 Triple 3-Input NAND Gate Triple 3-Input NAND Gate Quad 2-Input NAND Gate {passive output pullup) {active output pullup) {active output pullup) a) 3 a) 3 aot as m 5 Wy 4 mo 1 6((10) (1) 9 wn wn —{ >» (10) m4 ma a) 10 mM 2 12(10) mM (1) 12 2 1200) 11: (10) (13 (1) 13 41) 13 Pp = 132 mW typ/pkg (Inputs High) Pp = 132 mW typ/pkg (Inputs High) Pp = 176 mW typ/pkg (Inputs High) 39 mW typ/pkg (Input Low) 39 mW typ/pkg (Input Low) 52 mW typ/pkg (Input Low) MC673 MC674 Expandable Dual 2-Wide 2-Input AND-OR-INVERT Gate Expandable Dual 2-Wide 2-Input AND-OR-INVERT Gate {active output pullup) (passive output pullup) (yt (oa (a) 2 (2 | 3 6 (10) 3 6(10) qa) 4 () 4 a) 5s () 5 (13 (13 (1) 12 (1) 12 Ww 8 (10) W 8 (10) | (1) 10 (1) 10 | Pp = 160 mW typ/pkg (Inputs High) Pp = 160 mW typ/pkg (Inputs High) 50 mW typ/pkg (Input Low) 50 mW typ/pkg (Input Low) Tee EEO ee

a Numbers at ends of terminals represent pin numbers. Numbers in parenthesis indicate loading. (Vcc + Pin 14, Gnd = Pin 7 for Case 646 and 632; Vcc = Pin 16, Gnd = Pin 8 for Case 648 and 620.) GATES tcontinued) FLIP-FLOPS MC683 MC663 Quad 2-input Exclusive OR Dual J-K Flip-Flop a 5 J a 6 (9) 24 2 (15) 4 c (2) 2 - ’ 3 (10) m2 K Ap & 1 (9) t (2) 3 | mos J Qa 8 (9) (2) (sit0 é | (2) 8 6 (10) 12 K Fp & 1319) (2)011 | (29 tote frog = 30 MH? typ 8 (10) Pp = 200 mW typ/pkg (2) 12 TRUTH TABLE (2) 13 19.10) re rs — [i [oti to] Direct input (Fin) must be high Pp = 380 mW typ/pkg 0 = low state 1 = high state ty = time period prior to negative transition of clock pulse tne = time period subsequent to negative transition of clock pulse Op, = state of Q output in time period ty NOTE: A tow state “0” at the direct reset Rp causes a low state “0” at the Q output and the complement at the O output. MC664 Master-Slave R-S Flip-Flop DIRECT INPUT CLOCKED OPERATION OPERATION a rn [era] (10 Pe pepa yey So fetefe te Pees (1) 3 s ab—~sw) pee Pee ered a4 fi [opr yo] a t a (2 é ee | ana Lo | tute ee ce | ! - Giock InputiGlmust be low Poot ; (nie a ii O= tow state rs a : Ro 1 = high state Direct inputs (Ap. 5p) ns NC = No change must be high. : NA = Not allowed : X = state of input does not affect state of the circuit ' fog = 3.0 MHz typ U = indeterminate state i { PEE 160 mW typ/pkg ty = time period prior to negative transition of clock pulse i i tn+1 = time period subsequent to negative transition of clock pulse | i Qy = state of Q output in time period ty f i (continued)

FLIP-FLOPS (continued) MC682 MC688 H Quad Latch Dual J-K Flip-Flop | (3) () TRUTH TABLE c a 3 (10) dr . oO oO 1 a) 3 js Sa 6 (10) “lod 1 ° { a,|é y 1-—gc n in on af-s a0) 4 K a 7 (10) } : ° Har a 2 ) i an | On (2) 12 O = Low state iC Qa 10 (10) (1) 13 3s Sa 10 (10) x = Don’t care yn etl - - transition of clock pulse. m Le (1) 14—]K_R_GE—9 (10) tat = Time period subsequent to negative transition of clock (2) 11 pulse. c Qa 13.(10) Qpy = State of Q output in time _ + = Clock pulse must be in low state tog = 250 ns typ f Tog = 2.5 MHz tvp Pp = 375 mW typ/pkg Pp = 375 mW typ/pkg MC669 MC662 C679, MC679B Dual 4-Input Expander Expandable Dual Lamp Driver Dual 4-Input Line Driver (active output pullup) \\ aa aa a) 2 \\, a) 2 (1) 2 a3 ‘, 6 6 4 aya (30) a4 (125) m5 ms m5 1) 6 3 3 (1) 10: a9 \\ (1)10 8 8 ay12 u (13. (113 (1):13 W " tod = 140 ns tye tog = 0.5 Hs typ 26 mW typ/pkg (Input Low) 30 mW (input Low!

Triple Level Translator Hex Inverter With/Strobe {active pullup) MHTL ' 3 m3 / 8 10) 2 (MDTL = 8) (4 (MTTL MI = 5.5) (MATL = 5) 7 40) 6 8 6 Mc691 2 (10)

8 Hex Inverter/Translator

(low level to high level) 9 Wo (a3 1 2 1710) (1s ro) — aa Yo 4 14 3=1¢ (2) 3 (192 5 aa >O— 6 tpd = 40 ns typ s—[>o—s Po = 83 mW typ/pkg (MOTL) 104 mW typ/pkg (MATL) n 10 ted © 110 ns typ > ° Po = 246 mW typ/pkg (Inputs High) 96 mW typ/pkg (Input Low) MC666 3—f>o— 12 Triple Level Translator | Mc678 - Hex Inverter With/Strobe Positive Logic: 2= 7 (without output resistors) (1.0) 2 MOTL MTTL Input Loading Factor = 0.4 (0.8) 1 re were Output Loading Factor = 10 ao Propagation Delay Time: - (3 “wn 13 t%. = 150 ns typ. 5 (10) 4 = 300 ns typ (m4

5 Typical T otal Power Dissipation:

Inputs High = 500 mW typ/pkg 6 7 (10) Input Low = 150 mW typ/pka o . 3 at 2 (10) (110 ° 9 (10) (13, 8 11(70) (nis Q WwW 14(10) (112 12=2¢(1) +13 tog = 125 ns typ tog = 75 as typ Pp = 192 mW typ/pkg (Inputs High) Pp = 105 mW typ/pko 96 mW typ/pkg (Inputs Low) (continued)

F INVERTERS (continues) | Mc680 Mc681 C697 i Hex Inverter Hex Inverter Hex Inverter ! (active pullup) (open collector) (passive pull-up) i m io? ao) or) ipo 0) a of>o4 (10) i) spo 4 (10) oo s—f>o-s (10) i) s—>o-s (10 2-7 2=T () e—[>o—8 (10) or) o—f>o-e (10) | oy 1 —fo— 10010) iy 1—f>o— 10 10) a 312.010) oy 13—f>o— 1210) tpg = 110 ns typ tpg = 125 ns typ Pp = 246 mW typ/pkg (Inputs High) Pp = 192 mW typ/pkg (Inputs High) 96 mW typ/pkg (Input Low) 96 mW typ/pkg (Input Low) mceso Mceg0 Hex Inverter Hox Inverter (high voltage) {active pullup) a 1eo-2 (0) on) io (10) mM aos 0) a s—fo-4 (10) a s—f>o~s (vo a soos (ao 2-7 2=T oo s—>o—e ao io) o—f>o-8 (10) a 1 fe 10 (109 wy 1—f>e— 10.109 on 3—fSo— 12000 on 13 >o— 12.010) tpg 7 150 ns typ tpg = 150 ns typ Pp = 173 mW typ/pkg (Inputs High) Pp = 173 mW typ/pkg (Inputs High) 55 mW typ/pkg (Inputs Low) 55 mW typ/pkg (Inputs Low) mc667 Mcé675 Dual Monostable Multivibrator Dual Pulse Stretcher/Multivibrator M40) Pe (2 O— 6 ob6 (10 - 140 0s tod = 150 ns typ (Pins 1. 61 ted = 40 06 9 tw 110 ns typ (Pins 5. 6! 1 = mW typ) ay = m\\ ‘1 TH12 G0) tana BD L > : Pp = 180 mW typ/pkg 1 ° (5 13-4755 To) oFs (10) | ; as

mcesa Mcéss Decade Counter Binary Counter (5) 1 qMR a0 3 (10) 6) 1 qMR a0 3 (10) (2) 2 4so (2) 2 so 2 8 dsi at 4 (10) (2) s——dsgi 1 4 (10) (2) 10 ds2 2) 10 g a2 11 (10) ‘ 82 a2 11: (10) m6 c a3 13 (10) a 6 cas 13 (10) a7 ce m7 ce Tou 12 (10) Te, (2) 9 ¢),7Cour ) (2) 9 T¢,,TCout 12 (10) fog 0.5 MHz min fog = 0.5 MHz min Pp = 480 mW typ/pkg Pp = 480 mW typ/pkg i mc676 MC686 BCD-To-Decimal Decoder-Driver 4-Bit Shift Register ao! s ) 7—GJa ait (6) 1 qMR a0 3 (10) a2}—3 (2) 2 dso oar— a2 11 (10) as|—15 (2) 14d 3 19—Te Gs;—14 m6 © as 13 (10) a7;-—13 a7 ce ast—n1 { i = 500 ns T i ‘pd ~ 500 ns TP frog = 0.8 MHz min i Power Dissipation = 380 mW typ/pkg P_p = 480 mW typ/pkg i i

at a T LL LOGIC DIAGRAMS DRIVERS mce93 250 mA Quad 2-Input NAND Driver i (open collector, high voltage output with inductive load clamp) (Schmitt Trigger Inputs) Mc696 Dual Interface Element, a) | nee 44 Line Driver/Receiver 3 (200) (4) 2 | (1/2 Device Shown) 4 (4) 6 Vret 5 (200) 4(12) (.4) 7 ays 1.4) 9 11 (200) (4/10 (10) 6 7 (9) 12 13 (200) (415 Gnd = Pin8 (13) 3) Vecs Pin 16 tod = 400 ns Typ Numbers in parenthesis denotes pin numbers for Pp = 300 mW Typ/Pka. other half of device. tpg * 400 ns tye mc699 - Py = 225 mW typ/pka (Inputs High) 500 mA Dual 2-Input AND Gate/Oriver 96 mW typ/pkg (Inputs Low) (high voltage output (Schmitt Trigger Inputs) (4) 2 2E—3 (4) 12 Of g (400) (a) 13 SE —9 OE = Open Emiter OC = Open Collector Positive Logic (with Pin 3 at Gnd): 6 = 1+2 Input Loading Factor = 0.415* Propagation Delay Time - 360 ns typ* Typical Tota! Power Dissipation = 450 mw typ/pkg* += Voc = 15 MAXIMUM RATINGS (Ta = 25°C) ee Power Supply Voltage Vee Vae Continuous Pulsed, 1.03 Tnput Voltege Vin Vac MCBEE MoTL =1.0 1016.0 Mare 4010 40 All others 1010 +18 Output Current [into outputs = made mcs62 60 MC663 28 cosa 26 cess All Otners except Power Drivers 20 [input Reverse Currens@ rev | in| [Forward Current (inawidual MCGEE | ie | [~mase | [Storege Temperature Raroe | ang | eros PY