MC92460EC NXP | Alldatasheet
Document overview
- Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 16
Technical content
This document contains detailed information on p ower considerations, DC/ AC electrical characteristics, and AC timing specifications for the MC92460 Multichannel HDLC Controller. The following topics are addressed: Topic Page Section 1.1, “Features” 2 Section 1.2, “Electrical and Thermal Characteristics” 4 Section 1.2.1, “DC Electrical Characteristics” 4 Section 1.2.2, “Thermal Characteristics” 6 Section 1.2.3, “Power Considerations” 6 Section 1.2.4, “Power Dissipation” 6 Section 1.2.5, “AC Specifications” 7 Section 1.2.5.1, “SYSCLK Timing” 7 Section 1.2.5.2, “EXCLK Timing” 7 Section 1.2.5.3, “AC Timing” 8 Section 1.3, “Pinout” 11 Advance Information MC92460EC/D Rev. 1.0, 5/2002 MC92460 HDLC Controller Hardware Specifications NCSD Applications
MC92460 HDLC Controller Hardware Specifications MOTOROLA
Features
Figure 1 shows a block diagram of the MC92460. Figure 1. MC92460 Block Diagram
1.1 Features
- Channels — 40 full-duplex HDLC channels — Programmable channel assignment (any logical channel to any signal) — Each channel has a default of 64 buffer descriptors (Rx and Tx) but the number of buffer descriptors per channel is configurable
- Controllers — Maximum throughput of 1919 Mbps; individual controllers operate up to 66.7 Mbps — All communication controllers operate asynchronously — Programmable frame size (maximum 65,535 bytes) — Transparent memory access with internal memory controller
- 60x Bus — MC92460 directly connects with a 64-bit data and 32-bit address 60x bus — Supports 66.7 MHz 60x bus speed, with aggregate bandwidth of up to 1919 Mbps depending Register interrupt Bus Interface MPC8260 dual-port RAM
32 Kbyte
40 Channels
MC92460 HDLC Controller Hardware Specifications on the type of main memory used — Up to four MC92460’s may be connected in parallel on the 60x bus — Bus supports multiple master design
- Communication Buffers — Data Buffer – 256 Kbits on-chip memory for data buffers – 256 Kbit communication buffer can store up to 819 bytes per frame. – 80 channel virtual DMA functionality executes between off-chip memory and the communication buffer — BD Buffer – 32 Kbyte on-chip dual-port RAM for buffer descriptors – A total of 4096 buffer descriptors (2048 TxBD and 2048 RxBD)
- JTAG Support — Supports the IEEE1149.1 JTAG controller standard
- Power and Clocks — Supports single-beat and burst accesses — On-chip PLL for baud rate generator (maximum of 66.7 MHz) — Separate power supplies for core internal logic (1.8V) and for I/O (3.3V)
- Package — 480 pin TPGA, 1.27 mm pitch
1.2 Electrical and Thermal Characteristics
This section provides AC and DC electical specifications and thermal characteristics for the MC92460.
1.2.1 DC Electrical Characteristics
Table 2 lists recommended operational voltage conditions. Table 3 shows DC electrical characteristics. Table 1. Maximum Temperatures and Voltages Table 2. Recommended Operating Conditions Table 3. DC Electrical Characteristics
Table 3. DC Electrical Characteristics (continued)
1.2.2 Thermal Characteristics
Table 4 describes thermal characteristics.
1.2.3 Power Considerations
1.2.4 Power Dissipation
Table 5 describes maximum chip core power dissipation. Table 4. Maximum Temperatures and Voltages Table 5. Maximum Core Power Dissipation (P
1.2.5 AC Speci fications
These AC specifications are target specifications.
1.2.5.1 SYSCLK Timing
Table 6 shows the system clock timing. Figure 2. SYSCLK
1.2.5.2 EXCLK Timing
Table 7 shows the external clock timing. Table 6. Clock Timing Table 7. Clock Timing
8 MC92460 HDLC Controller Hardware Specifications MOTOROLA
Figure 3. EXCLK
1.2.5.3 AC Timing
at expected load capacitance CL=8pF. Figure 4. HDLC External Clock Figure 5 shows an HDLC internal clock (TxCK/RxCK output mode) whose polarity is not inverted. Figure 5. HDLC Internal Clock
10 MC92460 HDLC Controller Hardware Specifications MOTOROLA
Table 9 shows the bus signal I/O characteristics. The frequency is 20 MHz. Table 9. Bus Input/Output Characteristics
1.3 Pinout
Table 10. Pin Assignments
12 MC92460 HDLC Controller Hardware Specifications MOTOROLA
13 MC92460 HDLC Controller Hardware Specifications MOTOROLA
14 MC92460 HDLC Controller Hardware Specifications MOTOROLA
MOTOROLA MC92460 HDLC Controller Hardware Specifications 15
HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution P .O. Box 5405, Denver, Colorado 80217 1-303-675-2140 or 1-800-441-2447 JAPAN: Motorola Japan Ltd. SPS, Technical Information Center 3-20-1, Minami-Azabu Minato-ku Tokyo 106-8573 Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd. Silicon Harbour Centre, 2 Dai King Street Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 TECHNICAL INFORMATION CENTER: 1-800-521-6274 HOME PAGE: http://www.motorola.com/semiconductors DOCUMENT COMMENTS: FAX (512) 933-2625 Attn: NCSD Applications Engineering Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. digital dna is a trademark of Motorola, Inc. All other product or service names are the property of their respective owners. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. © Motorola, Inc. 2002