MC34023P

MC34023_05 ONSEMI | Alldatasheet

Document overview

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Technical content

Features

• 50 ns Propagation Delay to Output
• High Current Totem Pole Output
• Wide Bandwidth Error Amplifier
• Fully−Latched Logic with Double Pulse Suppression
• Latching PWM for Cycle−By−Cycle Current Limiting
• Soft−Start Control with Latched Overcurrent Reset
• Input Undervoltage Lockout with Hysteresis
• Low Startup Current (500 /C0109A Typ)
• Internally Trimmed Reference with Undervoltage Lockout
• 90% Maximum Duty Cycle (Externally Adjustable)
• Precision Trimmed Oscillator
• V oltage or Current Mode Operation to 1.0 MHz
• Functionally Similar to the UC3823
• Pb−Free Packages are Available* Error Amp Oscillator Vref Clock RT CT Ramp Error Amp Output Inverting Input Soft−Start Soft−Start Latching PWM Ground10

9 Current

5.1V Reference Current Limit RefThis device contains 176 active transistors. Output Noninverting Input Figure 1. Simplified Application dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package

MC34023, MC33023 http://onsemi.com Device Package Shipping† MC33023DW SOIC−16W 47 Units / Rail MC33023DWG SOIC−16W (Pb−Free)

47 Units / Rail

MC33023DWR2 SOIC−16W 1000 Units / Reel MC33023DWR2G SOIC−16W (Pb−Free)

1000 Units / Reel

MC34023P PDIP−16 25 Units / Rail MC34023PG PDIP−16 (Pb−Free)

25 Units / Rail

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MAXIMUM RATINGS Rating Symbol Value Unit Power Supply Voltage VCC 30 V Output Driver Supply Voltage VC 20 V Output Current, Source or Sink (Note 1) DC Pulsed (0.5 /C0109s) IO 0.5 2.0 A Current Sense, Soft−Start, Ramp, and Error Amp Inputs Vin −0.3 to +7.0 V Error Amp Output and Soft−Start Sink Current IO 10 mA Clock and RT Output Current ICO 5.0 mA Power Dissipation and Thermal Characteristics SO−16L Package (Case 751G) Maximum Power Dissipation @ TA = +25°C Thermal Resistance, Junction−to−Air Maximum Power Dissipation @ TA = +25°C Thermal Resistance, Junction−to−Air PD R/C0113JA PD R/C0113JA 862 145 mW °C/W 1.25 100 W °C/W Operating Junction Temperature TJ +150 °C Operating Ambient Temperature (Note 2) MC34023 MC33023 TA 0 to +70 −40 to +105 Storage Temperature Range Tstg −55 to +150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

MC34023, MC33023 http://onsemi.com ELECTRICAL CHARACTERISTICS (VCC = 15 V, RT = 3.65 k/C0087, CT = 1.0 nF, for typical values TA = +25°C, for min/max values TA is the operating ambient temperature range that applies [Note 2], unless otherwise noted.) Characteristic Symbol Min Typ Max Unit REFERENCE SECTION Reference Output Voltage (IO = 1.0 mA, TJ = +25°C) Vref 5.05 5.1 5.15 V Line Regulation (VCC = 10 V to 30 V) Regline − 2.0 15 mV Load Regulation (IO = 1.0 mA to 10 mA) Regload − 2.0 15 mV Temperature Stability TS − 0.2 − mV/°C Total Output Variation over Line, Load, and Temperature Vref 4.95 − 5.25 V Output Noise Voltage (f = 10 Hz to 10 kHz, TJ = +25°C) Vn − 50 − /C0109V Long Term Stability (TA = +125°C for 1000 Hours) S − 5.0 − mV Output Short Circuit Current ISC − 30 −6 5 −100 mA OSCILLATOR SECTION Frequency TJ = +25°C Line (VCC = 10 V to 30 V) and Temperature (TA = Tlow to Thigh) fosc 380 370 400 400 420 430 kHz Frequency Change with Voltage (VCC = 10 V to 30 V) /C0068fosc//C0068V − 0.2 1.0 % Frequency Change with Temperature (TA = Tlow to Thigh) /C0068fosc//C0068T − 2.0 − % Sawtooth Peak Voltage VOSC(P) 2.6 2.8 3.0 V Sawtooth Valley Voltage VOSC(V) 0.7 1.0 1.25 V Clock Output Voltage High State Low State VOH VOL 3.9 4.5 2.3 2.9 V ERROR AMPLIFIER SECTION Input Offset Voltage VIO − − 15 mV Input Bias Current IIB − 0.6 3.0 /C0109A Input Offset Current IIO − 0.1 1.0 /C0109A Open−Loop Voltage Gain (VO = 1.0 V to 4.0 V) AVOL 60 95 − dB Gain Bandwidth Product (TJ = +25°C) GBW 4.0 8.3 − MHz Common Mode Rejection Ratio (VCM = 1.5 V to 5.5 V) CMRR 75 95 − dB Power Supply Rejection Ratio (VCC = 10 V to 30 V) PSRR 85 110 − dB Output Current, Source (V O = 4.0 V) Output Current, Sink (VO = 1.0 V) ISource ISink 0.5 1.0 3.0 3.6 mA Output Voltage Swing, High State (I O = −0.5 mA) Output Voltage Swing, Low State (IO = 1 mA) VOH VOL 4.5 4.75 0.4 5.0 1.0 V Slew Rate SR 6.0 12 − V//C0109s PWM COMPARATOR SECTION Ramp Input Bias Current IIB − −0.5 −5.0 /C0109A Duty Cycle, Maximum Duty Cycle, Minimum DC(max) DC(min) Zero Duty Cycle Threshold Voltage Pin 3(4) (Pin 7(9) = 0 V) Vth 1.1 1.25 1.4 V Propagation Delay (Ramp Input to Output, TJ =+ 2 5°C) tPLH(in/out) − 60 100 ns SOFT−START SECTION Charge Current (VSoft−Start = 0.5 V) Ichg 3.0 9.0 20 /C0109A Discharge Current (VSoft−Start = 1.5 V) Idischg 1.0 4.0 − mA 1. Maximum package power dissipation limits must be observed. 2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Tlow =0 °C for MC34023 T high = +70 °C for MC34023 =− 4 0 °C for MC33023 = +105 °C for MC33023

MC34023, MC33023 http://onsemi.com ELECTRICAL CHARACTERISTICS (VCC = 15 V, RT = 3.65 k/C0087, CT = 1.0 nF, for typical values TA = +25°C, for min/max values TA is the operating ambient temperature range that applies [Note 3], unless otherwise noted.) Characteristic Symbol Min Typ Max Unit CURRENT SENSE SECTION Input Bias Current (Pin 9(12) = 0 V to 4.0 V) IIB − − 15 /C0109A Current Limit Comparator Input Offset Voltage (Pin 11(14) = 1.1 V) VIO − − 45 mV Current Limit Reference Input Common Mode Range (Pin 11(14)) TJ =+ 2 5°C VCMR 1.0 − 3.0 V Shutdown Comparator Threshold Vth 1.25 1.40 1.55 V Propagation Delay (Current Limit/Shutdown to Output, TJ =+ 2 5°C) tPLH(in/out) − 50 80 ns OUTPUT SECTION Output Voltage Low State (I Sink = 20 mA) (ISink = 200 mA) High State (ISource = 20 mA) (ISource = 200 mA) VOL VOH 0.25 1.2 13.5 0.4 2.2 V Output Voltage with UVLO Activated (VCC = 6.0 V, ISink = 0.5 mA) VOL(UVLO) − 0.25 1.0 V Output Leakage Current (VC = 20 V) IL − 100 500 /C0109A Output Voltage Rise Time (CL = 1.0 nF, TJ = +25°C) tr − 30 60 ns Output Voltage Fall Time (CL = 1.0 nF, TJ = +25°C) tf − 30 60 ns UNDERVOLTAGE LOCKOUT SECTION Startup Threshold (VCC Increasing) Vth(on) 8.8 9.2 9.6 V UVLO Hysteresis Voltage (VCC Decreasing After Turn−On) VH 0.4 0.8 1.2 V TOTAL DEVICE Power Supply Current Startup (VCC = 8.0 V) Operating ICC 0.5 1.2 mA 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Tlow =0 °C for MC34023 T high = +70 °C for MC34023 =− 4 0 °C for MC33023 = +105 °C for MC33023

1.0 MHz

Figure 2. Timing Resistor versus Figure 3. Oscillator Frequency Figure 4. Error Amp Open Loop Gain and Figure 5. PWM Comparator Zero Duty Cycle Figure 6. Error Amp Small Signal Figure 7. Error Amp Large Signal

Figure 14. Soft−Start Charge Current Figure 15. Output Saturation Voltage Figure 16. Drive Output Rise and Fall Time Figure 17. Drive Output Rise and Fall Time Figure 18. Supply Voltage versus Supply Current

120 Hz Rate

MC34023, MC33023 http://onsemi.com OPERATING DESCRIPTION The MC33023 and MC34023 series are high speed, fixed frequency, single−ended pulse width modulator controllers optimized for high frequency operation. They are specifically designed for Off−Line and DC−to−DC converter applications offering the designer a cost effective solution with minimal external components. A representative block diagram is shown in Figure 19. Oscillator The oscillator frequency is programmed by the values selected for the timing components RT and CT. The RT pin is set to a temperature compensated 3.0 V . By selecting the value of R T, the charge current is set through a current mirror for the timing capacitor C T. This charge current runs continuously through CT. The discharge current is ratioed to be 10 times the charge current, which yields the maximum duty cycle of 90%. CT is charged to 2.8 V and discharged to 1.0 V . During the discharge of CT, the oscillator generates an internal blanking pulse that resets the PWM Latch and, inhibits the outputs. The threshold voltage on the oscillator comparator is trimmed to guarantee an oscillator accuracy of 5.0% at 25°C. Additional dead time can be added by externally increasing the charge current to CT as shown in Figure 24. This changes the charge to discharge ratio of CT which is set internally to Icharge/10 Icharge. The new charge to discharge ratio will be: % Deadtime /C0043 Iadditional /C0041Icharge 10 (Icharge) A bidirectional clock pin is provided for synchronization or for master/slave operation. As a master, the clock pin provides a positive output pulse during the discharge of C As a slave, the clock pin is an input that resets the PWM latch and blanks the drive output, but does not discharge C T. Therefore, the oscillator is not synchronized by driving the clock pin alone. Figures 28, 29 and 30 provide suggested synchronization. Error Amplifier A fully compensated Error Amplifier is provided. It features a typical DC voltage gain of 95 dB and a gain bandwidth product of 8.3 MHz with 75 degrees of phase margin (Figure 4). Typical application circuits will have the noninverting input tied to the reference. The inverting input will typically be connected to a feedback voltage generated from the output of the switching power supply. Both inputs have a common mode voltage (V CM) input range of 1.5 V to 5.5 V . The Error Amplifier Output is provided for external loop compensation. Soft−Start Latch Soft−Start is accomplished in conjunction with an external capacitor. The Soft−Start capacitor is charged by an internal 9.0 /C0109A current source. This capacitor clamps the output of the error amplifier to less than its normal output voltage, thus limiting the duty cycle. The time it takes for a capacitor to reach full charge is given by: t /C0091(4.5 • 105)C Soft-Start A Soft−Start latch is incorporated to prevent erratic operation of this circuitry. Two conditions can cause the Soft−Start circuit to latch so that the Soft−Start capacitor stays discharged. The first condition is activation of an undervoltage lockout of either V CC or V ref. The second condition is when current sense input exceeds 1.4 V . Since this latch is “set dominant”, it cannot be reset until either of these signals is removed and, the voltage at CSoft−Start is less than 0.5 V . PWM Comparator and Latch A PWM circuit typically compares an error voltage with a ramp signal. The outcome of this comparison determines the state of the output. In voltage mode operation the ramp signal is the voltage ramp of the timing capacitor. In current mode operation the ramp signal is the voltage ramp induced in a current sensing element. The ramp input of the PWM comparator is pinned out so that the user can decide which mode of operation best suits the application requirements. The ramp input has a 1.25 V offset such that whenever the voltage at this pin exceeds the error amplifier output voltage minus 1.25 V , the PWM comparator will cause the PWM latch to set, disabling the outputs. Once the PWM latch is set, only a blanking pulse by the oscillator can reset it, thus initiating the next cycle. Current Limiting and Shutdown A pin is provided to perform current limiting and shutdown operations. Two comparators are connected to the input of this pin. The reference voltage for the current limit comparator is not set internally. A pin is provided so the user can set the voltage. When the voltage at the current limit input pin exceeds the externally set voltage, the PWM latch is set, disabling the output. In this way cycle−by−cycle current limiting is accomplished. If a current limit resistor is used in series with the power devices, the value of the resistor is found by: RSense /C0043 ILimit Reference Voltage Ipk (switch) If the voltage at this pin exceeds 1.4 V , the second comparator is activated. This comparator sets a latch which, in turn, causes the soft start capacitor to be discharged. In this way a “hiccup” mode of recovery is possible in the case of output short circuits. If a current limit resistor is used in series with the output devices, the peak current at which the controller will enter a “hiccup” mode is given by: Ishutdown /C00431.4 V RSense

biasing pin 11 to a level greater than 1.4 V but less than 3.0 V. causing the converter to enter an hiccup mode. There are two undervoltage lockout circuits within the IC. the outputs can be enabled and the Soft−Start latch released. allowing the IC to have an off−line bootstrap startup circuit. Typical startup current is 500 /C0109A. specifically designed for direct drive of power MOSFETs. rise and fall time of 30 ns driving a 1.0 nF load. Separate pins for V C and Power Ground are provided. for powering additional control system circuitry. less than 0.5 inches for effective bypassing for snubbing. is caused by a double pole at half the switching frequency. of the current−sense waveform, stability can be achieved. Figure 21. Ramp Compensation

1 Error Amp

This pin is usually used for feedback from the output of the power supply.

2 Error Amp

error amp. Usually this is connected to Vref, however an external reference can also be used.

3 Error Amp

supply system, mostly the output LC filter. 4 Clock This is a bidirectional pin used for synchronization. 5 RT The value of RT sets the charge current through timing Capacitor, CT. 6 CT In conjunction with RT, the timing Capacitor sets the switching frequency. connected through a filter to the current sensing element. 8 Soft−Start A capacitor at this pin sets the Soft−Start time.

9 Current Limit/

excessive, this pin will reinitiate a Soft−Start cycle. 10 Ground This pin is the ground for the control circuitry.

11 Current Limit

This pin voltage sets the threshold for cycle−by−cycle current limiting. reduce the effects of switching transient noise on the control circuitry. 14 Output This is a high current totem pole output. 15 VCC This pin is the positive supply of the control IC. 16 Vref This is a 5.1 V reference. It is usually connected to the noninverting input of the error amplifier. Figure 22. Voltage Mode Operation Amplifier from 0% to 90% duty cycle is from 2.25 V to 4.05 V. Figure 23. Current Mode Operation to filter the leading edge spike caused by turn−on of a power MOSFET.

Figure 24. Resistive Current Sensing Figure 25. Primary Side Current Sensing

1.25 VRM

by IM = CMSe. Then RM can be calculated by RM = VCC/IM.

Figure 35. Application Circuit

Figure 36. PC Board With Components

Figure 37. PC Board Without Components

MC34023, MC33023 http://onsemi.com PACKAGE DIMENSIONS PDIP−16 P SUFFIX CASE 648−08 ISSUE T NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. −A− B F C S H G D J L M 16 PL SEATING 916 K PLANE−T− MAM0.25 (0.010) T DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0 10 0 10 S 0.020 0.040 0.51 1.01 /C0095/C0095/C0095/C0095 SOIC−16W DW SUFFIX CASE 751G−03 ISSUE C D 14X B16X SEATING PLANE SAM0.25 B ST 16 9 h X 45/C0095 MBM0.25 H8X E B A e T A L C /C0113 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM MIN MAX MILLIMETERS A 2.35 2.65 A1 0.10 0.25 B 0.35 0.49 C 0.23 0.32 D 10.15 10.45 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 q 0 7 /C0095/C0095 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 MC34023/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.