MC34023

MC34023 ONSEMI | Alldatasheet

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/C0077/C0067/C0051/C0052/C0048/C0050/C0051 /C0077/C0067/C0051/C0051/C0048/C0050/C0051 Order this document by MC34023/D DW SUFFIX PLASTIC PACKAGE CASE 751G (SO–16L) P SUFFIX PLASTIC PACKAGE CASE 648 PIN CONNECTIONS (Top View) Device Operating Temperature Range Package

ORDERING INFORMATION

MC33023DW SO–16L TA = –40° to +105°C MC33023P Plastic DIP Error Amp Noninverting Input Soft–Start Ramp C T R T Clock Error Amp Output Error Amp Inverting Input Current Limit/ Shutdown Current Limit Reference Power Ground Output VCC Vref Ground VC MC34023P T A = 0° to +70°C Plastic DIP 1MOTOROLA ANALOG IC DEVICE DATA /C0072/C0105/C0103/C0104 /C0083/C0112/C0101/C0101/C0100 /C0083/C0105/C0110/C0103/C0108/C0101/C0045/C0069/C0110/C0100/C0101/C0100 /C0080/C0087/C0077 /C0067/C0111/C0110/C0116/C0114/C0111/C0108/C0108/C0101/C0114 The MC34023 series are high speed, fixed frequency, single–ended pulse width modulator controllers optimized for high frequency operation. They are specifically designed for Off–Line and DC–to–DC converter applications offering the designer a cost–effective solution with minimal external components. These integrated circuits feature an oscillator, a temperature compensated reference, a wide bandwidth error amplifier, a high speed current sensing comparator, and a high current totem pole output ideally suited for driving a power MOSFET. Also included are protective features consisting of input and reference undervoltage lockouts each with hysteresis, cycle–by–cycle current limiting, and a latch for single pulse metering. The flexibility of this series allows it to be easily configured for either current mode or voltage mode control.

• 50 ns Propagation Delay to Output
• High Current Totem Pole Output
• Wide Bandwidth Error Amplifier
• Fully–Latched Logic with Double Pulse Suppression
• Latching PWM for Cycle–By–Cycle Current Limiting
• Soft–Start Control with Latched Overcurrent Reset
• Input Undervoltage Lockout with Hysteresis
• Low Start–Up Current (500 µA Typ)
• Internally Trimmed Reference with Undervoltage Lockout
• 90% Maximum Duty Cycle (Externally Adjustable)
• Precision Trimmed Oscillator
• Voltage or Current Mode Operation to 1.0 MHz
• Functionally Similar to the UC3823 Simplified Application Error Amp Oscillator Vref Clock R T C T Ramp Error Amp Output Inverting Input Soft–Start Soft–Start Latching PWM Ground10

9 Current

5.1V Reference Current Limit Ref This device contains 176 active transistors. Output Noninverting Input  Motorola, Inc. 1996 Rev 2

2 MOTOROLA ANALOG IC DEVICE DATA

Power Supply Voltage VCC 30 V Output Driver Supply Voltage VC 20 V Output Current, Source or Sink (Note 1) DC Pulsed (0.5 µs) IO 0.5 2.0 A Current Sense, Soft–Start, Ramp, and Error Amp InputsVin –0.3 to +7.0 V Error Amp Output and Soft–Start Sink Current IO 10 mA Clock and RT Output Current ICO 5.0 mA Power Dissipation and Thermal Characteristics SO–16L Package (Case 751G) Maximum Power Dissipation @ TA = +25°C Thermal Resistance, Junction–to–Air PD R θJA 862 145 mW °C/W Maximum Power Dissipation @ TA = +25°C Thermal Resistance, Junction–to–Air PD R θJA 1.25 100 W °C/W Operating Junction Temperature TJ +150 °C Operating Ambient Temperature (Note 2) MC34023 MC33023 TA 0 to +70 –40 to +105 Storage Temperature Range Tstg –55 to +150 °C ELECTRICAL CHARACTERISTICS (VCC = 15 V, RT = 3.65 kΩ , CT = 1.0 nF, for typical values TA = +25°C, for min/max values TA is the operating ambient temperature range that applies [Note 2], unless otherwise noted.) Characteristic Symbol Min Typ Max Unit REFERENCE SECTION Reference Output Voltage (IO = 1.0 mA, TJ = +25°C) Vref 5.05 5.1 5.15 V Line Regulation (VCC = 10 V to 30 V) Reg line – 2.0 15 mV Load Regulation (IO = 1.0 mA to 10 mA) Reg load – 2.0 15 mV Temperature Stability TS – 0.2 – mV/°C Total Output Variation over Line, Load, and Temperature Vref 4.95 – 5.25 V Output Noise Voltage (f = 10 Hz to 10 kHz, TJ = +25°C) Vn – 50 – µV Long Term Stability (TA = +125°C for 1000 Hours) S – 5.0 – mV Output Short Circuit Current ISC – 30 –6 5 –100 mA OSCILLATOR SECTION Frequency TJ = +25°C Line (VCC = 10 V to 30 V) and Temperature (TA = Tlow to Thigh) fosc 380 370 400 400 420 430 kHz Frequency Change with Voltage (VCC = 10 V to 30 V) Δfosc/ΔV – 0.2 1.0 % Frequency Change with Temperature (TA = Tlow to Thigh) Δfosc/ΔT – 2.0 – % Sawtooth Peak Voltage VOSC(P) 2.6 2.8 3.0 V Sawtooth Valley Voltage VOSC(V) 0.7 1.0 1.25 V Clock Output Voltage High State Low State VOH VOL 3.9 4.5 2.3 2.9 V NOTES: 1. Maximum package power dissipation limits must be observed. 2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Tlow =0 °C for MC34023 T high = +70°C for MC34023 Tlow = – 40°C for MC33023 Thigh = +105°C for MC33023

3MOTOROLA ANALOG IC DEVICE DATA ELECTRICAL CHARACTERISTICS (VCC = 15 V, RT = 3.65 kΩ , CT = 1.0 nF, for typical values TA = +25°C, for min/max values TA is the operating ambient temperature range that applies [Note 2], unless otherwise noted.) Characteristic Symbol Min Typ Max Unit ERROR AMPLIFIER SECTION Input Offset Voltage VIO – – 15 mV Input Bias Current IIB – 0.6 3.0 µA Input Offset Current IIO – 0.1 1.0 µA Open–Loop Voltage Gain (VO = 1.0 V to 4.0 V) AVOL 60 95 – dB Gain Bandwidth Product (TJ = +25°C) GBW 4.0 8.3 – MHz Common Mode Rejection Ratio (VCM = 1.5 V to 5.5 V) CMRR 75 95 – dB Power Supply Rejection Ratio (VCC = 10 V to 30 V) PSRR 85 110 – dB Output Current, Source (VO = 4.0 V) Output Current,Sink (VO = 1.0 V) ISource ISink 0.5 1.0 3.0 3.6 mA Output Voltage Swing, High State (IO = –0.5 mA) Output Voltage Swing,Low State (IO = 1 mA) VOH VOL 4.5 4.75 0.4 5.0 1.0 V Slew Rate SR 6.0 12 – V/µs PWM COMPARATOR SECTION Ramp Input Bias Current IIB – –0.5 –5.0 µA Duty Cycle, Maximum Duty Cycle,Minimum DC (max) DC (min) Zero Duty Cycle Threshold Voltage Pin 3(4) (Pin 7(9) = 0 V) Vth 1.1 1.25 1.4 V Propagation Delay (Ramp Input to Output, TJ =+ 2 5°C) tPLH(in/out) – 60 100 ns SOFT–START SECTION Charge Current (VSoft–Start = 0.5 V) Ichg 3.0 9.0 20 µA Discharge Current (VSoft–Start = 1.5 V) Idischg 1.0 4.0 – mA CURRENT SENSE SECTION Input Bias Current (Pin 9(12) = 0 V to 4.0 V) IIB – – 15 µA Current Limit Comparator Input Offset Voltage (Pin 11(14) = 1.1 V) VIO – – 45 mV Current Limit Reference Input Common Mode Range (Pin 11(14)) VCMR 1.0 – 1.25 V Shutdown Comparator Threshold Vth 1.25 1.40 1.55 V Propagation Delay (Current Limit/Shutdown to Output, TJ =+ 2 5°C) tPLH(in/out) – 50 80 ns OUTPUT SECTION Output Voltage Low State (ISink = 20 mA) (ISink = 200 mA) High State (ISource = 20 mA) (ISource = 200 mA) VOL VOH 0.25 1.2 13.5 0.4 2.2 V Output Voltage with UVLO Activated (VCC = 6.0 V, ISink = 0.5 mA) VOL(UVLO) – 0.25 1.0 V Output Leakage Current (VC = 20 V) IL – 100 500 µA Output Voltage Rise Time (CL = 1.0 nF, TJ = +25°C) tr – 30 60 ns Output Voltage Fall Time (CL = 1.0 nF, TJ = +25°C) tf – 30 60 ns UNDERVOLTAGE LOCKOUT SECTION Start–Up Threshold (VCC Increasing) Vth(on) 8.8 9.2 9.6 V UVLO Hysteresis Voltage (VCC Decreasing After Turn–On) VH 0.4 0.8 1.2 V TOTAL DEVICE Power Supply Current Start–Up (VCC = 8.0 V) Operating ICC 0.5 1.2 mA NOTES: 1. Maximum package power dissipation limits must be observed. 2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Tlow =0 °C for MC34023 T high = +70°C for MC34023 Tlow = – 40°C for MC33023 Thigh = +105°C for MC33023

4 MOTOROLA ANALOG IC DEVICE DATA

1.0 MHz

Figure 1. Timing Resistor versus Figure 2. Oscillator Frequency versus Temperature Figure 3. Error Amp Open Loop Gain and Figure 4. PWM Comparator Zero Duty Cycle Figure 5. Error Amp Small Signal Figure 6. Error Amp Large Signal

6 MOTOROLA ANALOG IC DEVICE DATA

Figure 13. Soft–Start Charge Current Figure 14. Output Saturation Voltage Figure 15. Drive Output Rise and Fall Time Figure 16. Drive Output Rise and Fall Time Figure 17. Supply Voltage versus Supply Current

120 Hz Rate

8 MOTOROLA ANALOG IC DEVICE DATA

The MC33023 and MC34023 series are high speed, fixed frequency, single–ended pulse width modulator controllers optimized for high frequency operation. They are specifically designed for Off–Line and DC–to–DC converter applications offering the designer a cost effective solution with minimal external components. A representative block diagram is shown in Figure 18. Oscillator The oscillator frequency is programmed by the values selected for the timing components RT and CT. The RT pin is set to a temperature compensated 3.0 V. By selecting the value of RT, the charge current is set through a current mirror for the timing capacitor CT. This charge current runs continuously through CT. The discharge current is ratioed to be 10 times the charge current, which yields the maximum duty cycle of 90%. CT is charged to 2.8 V and discharged to 1.0 V. During the discharge of CT, the oscillator generates an internal blanking pulse that resets the PWM Latch and, inhibits the outputs. The threshold voltage on the oscillator comparator is trimmed to guarantee an oscillator accuracy of 5.0% at 25°C. Additional dead time can be added by externally increasing the charge current to CT as shown in Figure 23. This changes the charge to discharge ratio of CT which is set internally to Icharge/10 Icharge. The new charge to discharge ratio will be: % Deadtime /C0043 Iadditional/C0041Icharge 10 (Icharge) A bidirectional clock pin is provided for synchronization or for master/slave operation. As a master, the clock pin provides a positive output pulse during the discharge of CT. As a slave, the clock pin is an input that resets the PWM latch and blanks the drive output, but does not discharge CT. Therefore, the oscillator is not synchronized by driving the clock pin alone. Figures 27, 28 and 29 provide suggested synchronization. Error Amplifier A fully compensated Error Amplifier is provided. It features a typical DC voltage gain of 95 dB and a gain bandwidth product of 8.3 MHz with 75 degrees of phase margin (Figure 3). Typical application circuits will have the noninverting input tied to the reference. The inverting input will typically be connected to a feedback voltage generated from the output of the switching power supply. Both inputs have a common mode voltage (VCM ) input range of 1.5 V to 5.5 V. The Error Amplifier Output is provided for external loop compensation. Soft–Start Latch Soft–Start is accomplished in conjunction with an external capacitor. The Soft–Start capacitor is charged by an internal 9.0 µA current source. This capacitor clamps the output of the error amplifier to less than its normal output voltage, thus limiting the duty cycle. The time it takes for a capacitor to reach full charge is given by: t /C0091(4.5• 105)C Soft-Start A Soft–Start latch is incorporated to prevent erratic operation of this circuitry. Two conditions can cause the Soft–Start circuit to latch so that the Soft–Start capacitor stays discharged. The first condition is activation of an undervoltage lockout of either VCC or Vref. The second condition is when current sense input exceeds 1.4 V. Since this latch is “set dominant”, it cannot be reset until either of these signals is removed and, the voltage at CSoft–Start is less than 0.5 V. PWM Comparator and Latch A PWM circuit typically compares an error voltage with a ramp signal. The outcome of this comparison determines the state of the output. In voltage mode operation the ramp signal is the voltage ramp of the timing capacitor. In current mode operation the ramp signal is the voltage ramp induced in a current sensing element. The ramp input of the PWM comparator is pinned out so that the user can decide which mode of operation best suits the application requirements. The ramp input has a 1.25 V offset such that whenever the voltage at this pin exceeds the error amplifier output voltage minus 1.25 V, the PWM comparator will cause the PWM latch to set, disabling the outputs. Once the PWM latch is set, only a blanking pulse by the oscillator can reset it, thus initiating the next cycle. Current Limiting and Shutdown A pin is provided to perform current limiting and shutdown operations. Two comparators are connected to the input of this pin. The reference voltage for the current limit comparator is not set internally. A pin is provided so the user can set the voltage. When the voltage at the current limit input pin exceeds the externally set voltage, the PWM latch is set, disabling the output. In this way cycle–by–cycle current limiting is accomplished. If a current limit resistor is used in series with the power devices, the value of the resistor is found by: R Sense /C0043 ILimit Reference Voltage Ipk (switch) If the voltage at this pin exceeds 1.4 V, the second comparator is activated. This comparator sets a latch which, in turn, causes the soft start capacitor to be discharged. In this way a “hiccup” mode of recovery is possible in the case of output short circuits. If a current limit resistor is used in series with the output devices, the peak current at which the controller will enter a “hiccup” mode is given by: Ishutdown/C00431.4 V R Sense

There are two undervoltage lockout circuits within the IC. the outputs can be enabled and the Soft–Start latch released. allowing the IC to have an off–line bootstrap start–up circuit. Typical start–up current is 500 µA. and fall time of 30 ns driving a 1.0 nF load. Separate pins for VC and Power Ground are provided. powering additional control system circuitry. less than 0.5 inches for effective bypassing for snubbing. current–sense waveform, stability can be achieved. in which external ramp compensation can be implemented. Figure 20. Ramp Compensation

10 MOTOROLA ANALOG IC DEVICE DATA

1 Error Amp

This pin is usually used for feedback from the output of the power supply.

2 Error Amp

error amp. Usually this is connected to Vref, however an external reference can also be used.

3 Error Amp

supply system, mostly the output LC filter. 4 Clock This is a bidirectional pin used for synchronization. 5 R T The value of RT sets the charge current through timing Capacitor, CT. 6 C T In conjunction with RT, the timing Capacitor sets the switching frequency. connected through a filter to the current sensing element. 8 Soft–Start A capacitor at this pin sets the Soft–Start time.

9 Current Limit/

excessive, this pin will reinitiate a Soft–Start cycle. 10 Ground This pin is the ground for the control circuitry.

11 Current Limit

This pin voltage sets the threshold for cycle–by–cycle current limiting. the effects of switching transient noise on the control circuitry. 14 Output This is a high current totem pole output. 15 VCC This pin is the positive supply of the control IC. 16 Vref This is a 5.1 V reference. It is usually connected to the noninverting input of the error amplifier. Figure 21. Voltage Mode Operation Amplifier from 0% to 90% duty cycle is from 2.25 V to 4.05 V. Figure 22. Current Mode Operation to filter the leading edge spike caused by turn–on of a power MOSFET.

Figure 23. Resistive Current Sensing Figure 24. Primary Side Current Sensing

1.25 VR M

by IM = CM Se. Then RM can be calculated by RM = VCC /IM.

12 MOTOROLA ANALOG IC DEVICE DATA

Figure 26. Dead Time Addition Figure 27. External Clock Synchronization Figure 29. Synchronization Over Long Distances

14 MOTOROLA ANALOG IC DEVICE DATA

Figure 34. Application Circuit

Figure 35. PC Board With Components

16 MOTOROLA ANALOG IC DEVICE DATA

Figure 36. PC Board Without Components

17MOTOROLA ANALOG IC DEVICE DATA MIN MAX MILLIMETERS 10.15 7.40 2.35 0.35 0.50 0.25 0.10 10.05 0.25 10.45 7.60 2.65 0.49 0.90 0.32 0.25 10.55 0.75

1.27 BSC

CASE 648–08 OUTLINE DIMENSIONS DW SUFFIX PLASTIC PACKAGE CASE 751G–02 (SO–16L) MIN MIN MAX MAX INCHES MILLIMETERS DIM A B C D F G H J K L M S 18.80 6.35 3.69 0.39 1.02 0.21 2.80 7.50 0.51 19.55 6.85 4.44 0.53 1.77 0.38 3.30 7.74 1.01 0.740 0.250 0.145 0.015 0.040 0.008 0.110 0.295 0.020 0.770 0.270 0.175 0.021 0.070 0.015 0.130 0.305 0.040 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL.

2.54 BSC

0.100 BSC

0.050 BSC

–A– B 916 F H G D 16 PL S C –T– SEATING PLANE K J M L TA0.25 (0.010)M M 916 MIN MAX INCHES DIM A B C D F G J K M P R 0.400 0.292 0.093 0.014 0.020 0.010 0.004 0.395 0.010 0.411 0.299 0.104 0.019 0.035 0.012 0.009 0.415 0.029 –A– –B– P 8 PL G 14 PL –T– D 16 PL K C SEATING PLANE M R X 45° 0.25 (0.010) BM M 0.25 (0.010) T A BM S S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. F J

18 MOTOROLA ANALOG IC DEVICE DATA

–T– FN SUFFIX PLASTIC PACKAGE CASE 775–02 (PLCC) OUTLINE DIMENSIONS A B C E F G H J K R U V W X Y Z MIN MIN MAX MAX INCHES MILLIMETERS DIM 9.78 9.78 4.20 2.29 0.33 0.66 0.51 0.64 8.89 8.89 1.07 1.07 1.07 7.88 1.02 10.03 10.03 4.57 2.79 0.48 0.81 9.04 9.04 1.21 1.21 1.42 0.50 8.38 0.385 0.385 0.165 0.090 0.013 0.026 0.020 0.025 0.350 0.350 0.042 0.042 0.042 0.310 0.040 0.395 0.395 0.180 0.110 0.019 0.032 0.356 0.356 0.048 0.048 0.056 0.020 0.330 1.27 BSC0.050 BSC NOTES: 1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIM G1, TRUE POSITION TO BE MEASURED AT DATUM –T–, SEATING PLANE. 3. DIM R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). –N– Y BRK –M––L– W V D D 20 1 A R Z C G E J VIEW S B U Z G1X H F VIEW S K VIEW D–D 0.007 (0.180) T L –M S N SM 0.007 (0.180) T L –M S N SM SEATING PLANE 0.010 (0.250) T L –M S N SS 0.007 (0.180) T L –M S N SM 0.007 (0.180) T L –M S N SM 0.010 (0.250) T L –M S N SS 0.007 (0.180) T L –M S N SM 0.007 (0.180) T L –M S N SM 0.004 (0.100)

19MOTOROLA ANALOG IC DEVICE DATA Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;JAPAN : Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1, P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488 – US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 INTERNET : http://motorola.com/sps MC34023/D◊