MC34016 MOTOROLA | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 16

Technical content

/C0077/C0067/C0051/C0052/C0048/C0049/C0054 SEMICONDUCTOR TECHNICAL DATA CORDLESS UNIVERSAL TELEPHONE INTERFACE

ORDERING INFORMATION

SO–20 DW SUFFIX PLASTIC PACKAGE CASE 751D (Top View) PIN CONNECTIONS Order this document by MC34016/D P SUFFIX PLASTIC PACKAGE CASE 738 1 20 Clk Data Out2 Stab Out1 BEN LAI AGC Tx1 R x1 129 VCC Iref R x2 1110HYL HYS Tx2 SRF LAO Gnd HKSW TA = –20° to +70°C 1MOTOROLA ANALOG IC DEVICE DATA /C0067/C0111/C0114/C0100/C0108/C0101/C0115/C0115 /C0085/C0110/C0105/C0118/C0101/C0114/C0115/C0097/C0108 /C0084/C0101/C0108/C0101/C0112/C0104/C0111/C0110/C0101 /C0073/C0110/C0116/C0101/C0114/C0102/C0097/C0099/C0101 The MC34016 is a telephone line interface meant for use in cordless telephone base stations for CT0, CT1, CT2 and DECT. The circuit forms the interface towards the telephone line and performs all speech and line interface functions like dc and ac line termination, 2–4 wire conversion, automatic gain control and hookswitch control. Adjustment of transmission parameters is accomplished by two 8–bit registers accessible via the integrated serial bus interface and by external components.

  • DC Masks for Voltage and Current Regulation
  • Supports Passive or Active AC Set Impedance Applications
  • Double Wheatstone Bridge Sidetone Architecture
  • Symmetrical Inputs and Outputs with Large Signal Swing Capability
  • Gain Setting and Mute Function for Tx and Rx Amplifiers
  • Very Low Noise Performance
  • Serial Bus Interface SPI Compatible
  • Operation from 3.0 to 5.5 V

FEATURES

  • Two DC Masks for Voltage Regulation
  • Two DC Masks for Current Regulation
  • Passive or Active Set Impedance Adjustment
  • Double Wheatstone Bridge Architecture
  • Automatic Gain Control Function Transmit Channel
  • Symmetrical Inputs Capable of Handling Large Voltage Swing
  • Gain Select Option via Serial Bus Interface
  • Transmit Mute Function, Programmable via Bus
  • Large Voltage Swing Capability at the T elephone Line Receive Channel
  • Double Sidetone Architecture for Optimum Line Matching
  • Symmetrical Outputs Capable of Producing High Voltage Swing
  • Gain Select Option via Serial Bus Interface
  • Receive Mute Function, Programmable via Serial Bus Serial Bus Interface
  • 3–Wire Connection to Microcontroller
  • One Programmable Output Meant for Driving a Hookswitch
  • Two Programmable Outputs Capable of Driving Low Ohmic Loads
  • Two 8–Bit Registers for Parameter Adjustment  Motorola, Inc. 1996 Rev 1

2 MOTOROLA ANALOG IC DEVICE DATA

Representative Block Diagram This device contains 610 active transistors + 242 gates. R x Tx Supply Serial Bus Interface AGC Line Driver Serial Bus Inputs Logic Outputs R x1 R x2 Tx1 Tx2 R x Outputs Tx Inputs HYS HYL LAI SRF LAO Gnd VCC Iref Clk Data BEN Out1 Out2 HKSW AGC Hook Switch A (Tip) B (Ring) IBG VBG MC34016 +5.0 V MAXIMUM RATINGS Rating Symbol Value Unit Operation Supply Voltage VCC –0.5, 6.5 V All Other Inputs Vin –0.5, VCC +0.5 V Operating Ambient T emperature TA –20 to +70 °C Junction Temperature TJ +150 °C NOTE : ESD data available upon request.

3MOTOROLA ANALOG IC DEVICE DATA DC ELECTRICAL CHARACTERISTICS (All parameters are specified with Bit 0 of Register 1 set to 1, the rest of the bits in both registers set to 0, TA = 25°C, VCC = 5.0 V, Iline = 15 mA, f = 1.0 kHz, Test Circuit in Figure 9, unless otherwise noted.) Parameter Condition Min Typ Max Unit VOLTAGE REGULATION Line Voltage Vline Iline = 5.0 mA Iline = 15 mA Iline = 60 mA 3.7 4.0 4.3 VLine Voltage Vline Iline = 5.0 mA Iline = 15 mA Iline = 60 mA 3.7 4.2 6.6 4.0 4.5 6.85 4.3 4.8 7.1 V line = 15 mA Iline = 60 mA 6.6 6.85 7.1 CURRENT REGULATION (Bit 4, Reg.1 = 1; Bit 1, Reg. 2 = 1; RAGC = 47 kΩ ) Line Voltage Vline Iline = 15 mA 4.2 4.5 4.8 V Line Current Iline Vline = 10 V Vline = 35 V mALine Current Iline Vline = 10 V Vline = 35 V mA Line Current Iline in Protection Mode Vline = 70 V – 28 – mA DC BIASING Operating Supply Voltage VCC – 3.0 – 5.5 V Current Consumption from VCC VCC = 3.0 V, all Bits to 0 VCC = 5.0 V, all Bits to 0 3.0 3.5 4.0 4.5 mACurrent Consumption from VCC VCC = 3.0 V, all Bits to 0 VCC = 5.0 V, all Bits to 0 3.0 3.5 4.0 4.5 mA Source Capabiltiy Pin LAO in Speech Mode VLAO = 0.7 V – – –2.0 mA Source Capability Pin LAO in Dialing Mode (Bit 5, Reg. 1 = 1) VLAO = 0.7 V – – –5.0 mA Internal Pull Down Resistor at Pin LAO – – 11 – kΩ Bias Voltage at Pins HYL, HYS and LAI – – 1.3 – V Bias Voltage at Pins Tx1 and Tx2 – – 1.5 – V Bias Voltage at Pins Rx1 and Rx2 – – 1.3 – V LOGIC INPUTS Logic Low Level Pins Clk, Data, BEN – – – 0.6 V Logic High Level Pins Clk, Data, BEN – 2.2 – – V LOGIC OUTPUTS Source Capability from Pins HKSW, Out1, Out2 Output Voltage at VCC – 1.3 V – – –1.0 mA Sink Capability into Pins HKSW, Out1, Out2 Output Voltage at 0.5 V 5.0 – – mA AC ELECTRICAL CHARACTERISTICS (All parameters are specified with Bit 0 of Register 1 set to 1, the rest of the bits in both registers set to 0, TA = 25°C, VCC = 5.0 V, Iline = 15 mA, f = 1.0 kHz, Test Circuit in Figure 9, unless otherwise noted.) Parameter Condition Min Typ Max Unit TRANSMIT CHANNEL Transmit Gain from VTx to Vline MC34016P MC34016DW VT x = 0.1 Vrms –1.0 –1.25 0.25 –0.20 1.5 0.85 dB Gain Variation with Line Current Referred to Iline = 15 mA with the AGC Function Switched “Off” Iline = 70 mA, Bit 0, Reg. 2 = 1 –0.7 – 0.7 dB Gain Reduction in Mute Condition Bit 2, Reg. 2 = 1 65 – – dB Input Impedance at Tx1 or Tx2 – – 30 – kΩ Maximum Input Swing for VTx THD ≤ 2% – 4.0 – Vpp THD at the Line (Vline) VT x = 3.0 dBm – 1.0 2.0 % Psophometrically Weighted Noise Level at the Line (Vline) 200 Ω Between Tx1 and Tx2 – –79 – dBmp RECEIVE CHANNEL Receive Gain from Vline to VRx Vline = 0.1 Vrms –1.0 0 1.0 dB Gain Variation with Line Current Referred to Iline = 15 mA with the AGC Function Switched “Off” Iline = 70 mA, Bit 0, Reg. 2 = 1 –0.7 – 0.7 dB

4 MOTOROLA ANALOG IC DEVICE DATA

AC ELECTRICAL CHARACTERISTICS (continued) (All parameters are specified with Bit 0 of Register 1 set to 1, the rest of the bits in both registers set to 0, TA = 25°C, VCC = 5.0 V, Iline = 15 mA, f = 1.0 kHz, Test Circuit in Figure 9, unless otherwise noted.) Parameter UnitMaxTypMinCondition RECEIVE CHANNEL Gain Reduction in Mute Condition Bit 3, Reg. 2 = 1 70 – – dB Input Impedance at HYL or HYS – – 30 – kΩ Output Impedance at Rx1 or Rx2 – – 150 – Ω Maximum Input Swing at HYL or HYS for THD ≤ 2% – 800 – mVpp Maximum Output Swing VRx for THD ≤ 10% – 3.5 – Vpp Total Harmonic Distortion at VRx Vline = 3.0 dBm – 1.0 2.0 % Psophometrically Weighted Noise Level at VRx 200 Ω Between Tx1 and Tx2 – 80 – µVrms AUTOMATIC GAIN CONTROL Gain Reduction in Transmit and Receive Channel with Respect to Iline = 15 mA Iline = 70 mA 5.0 6.0 7.0 dB Highest Line Current for Maximum Gain – – 20 – mA Lowest Line Current for Minimum Gain – – 60 – mA Gain Reduction in Transmit and Receive Channel with Respect to Iline = 35 mA Iline = 85 mA, Bit 1, Reg. 2 = 1 5.0 6.0 7.0 dB Highest Line Current for Maximum Gain Bit 1, Reg. 2 = 1 – 40 – mA Lowest Line Current for Minimum Gain Bit 1, Reg. 2 = 1 – 80 – mA BALANCE RETURN LOSS Balance Return Loss with Respect to 600Ω f = 1.0 kHz 20 – – dB SIDETONE Voltage Gain from VTx to VRx Iline = 15 mA, Bit 0, Reg. 2 = 1 – – –20 dB SERIAL BUS Clock Frequency – – – 550 kHz BEN Rising Edge Setup Time Before First Clk Rising Edge See t1 in Timing Diagram 500 – – ns Data Setup Time Before Clk Rising Edge See t2 in Timing Diagram 500 – – ns Data Hold Time After Clk Rising Edge See t3 in Timing Diagram 500 – – ns BEN Falling Edge Delay Time After Last Clk Rising Edge See t4 in Timing Diagram 1.5 – – µs BEN Rising Edge Delay Time After Last BEN Falling Edge See t5 in Timing Diagram 6.0 – – µs Power Supply Reset Voltage VCC – – 2.5 – V

5MOTOROLA ANALOG IC DEVICE DATA PIN FUNCTION DESCRIPTION Pin Symbol Description

1 Clk Serial bus clock input

2 Data Serial bus data input

3 Out2 Logic output 2

4 Stab Line driver compensation

5 Gnd Ground

6 HKSW Logic output for the hook switch

7 Out1 Logic output 1

8 VCC Supply input (+5.0 V)

9 Iref Reference current adjustment

10 HYL Hybrid input for long lines

11 HYS Hybrid input for short lines

12 R x2 Receive output 2

13 R x1 Receive output 1

14 Tx1 Transmit input 1

15 Tx2 Transmit input 2

16 AGC Automatic gain control input

17 SRF Sidetone reference input

18 LAI Line amplifier input

19 LAO Line amplifier output

20 BEN Serial bus enable input

6 MOTOROLA ANALOG IC DEVICE DATA

DESCRIPTION OF THE CIRCUIT Throughout this part, please refer to the typical application of Figure 10. The data given in this chapter refers to typical data of the characteristics. DC OPERATION For dc, the MC34016 incorporates four different masks which can be selected via the serial bus interface: ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ Bit 4, Reg. 1 ‘DC Mask’ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ Bit 5, Reg. 1 ‘DC Mode’ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ Bit 1, Reg. 2 ‘AGC Ratio’ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ DC Mask Selected ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ X ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ Voltage Regula- tion Mask ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ X ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ X ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ Pulse Dial Mask ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ Current Regula- tion Mask with AGC Ratio 1:2 ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ Current Regula- tion Mask with AGC Ratio 3:5 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ X = don’t care Voltage Regulation Mask The voltage regulation mask is the default setting of the MC34016 after power–up. In this mode, the circuit behaves as a zener with a series resistor. The line voltage can be expressed as: Vline= VBG + (IBG x RDC1 ) + (Iline x RS) with: V BG =1.3 V IBG = 5.2 µA R DC1 = DC setting resistor of 470 kΩ in the typical application Iline= Line current R S = Slope resistor of 50 Ω in the typical application thus: V line= 3.75 + (50 x Iline) By choosing different values of RDC1 , the zener voltage can be adjusted to fit country specific requirements. In Figure 1, a curve show s Vline versus Iline for different RDC1 values. Pulse Dial Mask In this mask, the circuit is forced into a very low voltage drop mode meant for pulse dialing (e.g. make period during pulse dialing). Pin LAO of the MC34016 sources a current of 5.0 mA in this mode, saturating output transistor Q1. The line voltage Vline is now determined by the saturation voltage of Q1 and the dc slope resistor RS: Vline = VCE(sat)Q1 + (RS x Iline) ≅ 0.1 + (50 x Iline) Figure 2 shows Vline versus Iline. Current Regulation Masks These masks are equal to the voltage regulation mask up to a knee current. Above this current, the dc slope changes to a higher value fulfilling requirements such as those in France. Vline = 3.75 + (RS x Iline) for IAGC < Iknee Vline = [IBG + (2.5 x (IAGC – Iknee))] x RDC1 + [VBG + (RS x Iline)] for IAGC > Iknee with : IAGC /C0043Ilinex R S R AGC Iknee = 21 µA for AGC ratio 1:2 Iknee = 31 µA for AGC ratio 3:5 With RS = 50 Ω and RAGC = 47 kΩ , and the AGC ratio set to 3:5, IAGC will equal Iknee at a line current of 29 mA. With the AGC ratio set to 1:2, the knee occurs at 20 mA. Above these line currents, it can be derived that the dc slope of the circuit changes to: R Slope/C00432.5 x R S x RDC1 R AGC /C0041R S With the component values mentioned, a slope of 1300 Ω will occur. Figures 3 and 4 shows Vline versus Iline in the two current regulation masks for different values of RDC1 . When IAGC reaches 62 µA for AGC ratio 3:5 or 52 µA in case of AGC ratio 1:2, the MC34016 will enter protection mode after about 800 ms. In practice this mode occurs only under overload conditions. In protection mode, the MC34016 decreases the p owe r dissipation in Q 1 b y drastically increasing the dc slope starting from Iknee. This results in a reduced line current which remains practically constant over line voltage. With the equation for Iagc it can be derived that: ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ AGC ratio ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ Line Current to Enter Protection Mode ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ Line Current in Protection Mode ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ 3:5 ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ 58 mA ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ 29 mA ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ 1:2 ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ 49 mA ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ 20 mA Once the MC34016 enters protection mode, it remains there until the output HKSW is toggled via Bit 0 of Register 1 (on–hook, off–hook). Supply Voltage VCC The MC34016 operates from an external supply within a voltage range of 3.0 to 5.5 V. The current consumption with AC SET IMPEDANCE The MC34016 offers two possibilities for the adjustment of the ac set impedance. Either a passive or an active set impedance can be obtained. Passive Set Impedance In this application, the set impedance is formed by the ac impedance of the circuit itself in parallel with resistor RSET and capacitor CSET . An equivalent network equals: R DC1 C M R DC1 x CM x RS R S C SET R SET

inductor has a value of about 2.4 H and RDC1 equals 470 kΩ . a fairly large parallel impedance to RSET and C SET . network to obtain a complex set impedance. Figure 11. By doing so, the MC34016 itself generates the ac regulation mask, rather high line voltages can be reached. drive, one input can be tied to Gnd via an external capacitor. network is used for short lines and one for long lines. current and is described in the automatic gain control section. passive or an active set impedance is set.

8 MOTOROLA ANALOG IC DEVICE DATA

and R17. With R14 = 3.0 kΩ and ZHYS = 18 kΩ the receive gain equals 0 dB for the passive impedance application. Outputs The outputs Rx1 and Rx2 of the receive channel have an output impedance of 150 Ω and are designed to drive a 10 kΩ resistive load or a 47 nF capacitive load with a 3.5 Vpp swing. AUTOMATIC GAIN CONTROL The automatic gain control function (AGC) controls the transmit and receive gains and the switchover for the sidetone networks for short and long lines according to the line current (which represents line length). The effect of AGC on the transmit and receive amplifiers is 6.0 dB at default and it can be disabled via the serial bus. The switchover for the sidetone networks tracks the AGC curves for the transmit and receive amplifier gain. This feature can also be disabled via the serial bus: ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ Bit 6, Reg. 2 ‘PABX Mode’ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ Bit 0, Reg. 2 ‘AGC Range’ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ

Description

ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ AGC Gain Range of 6.0 dB, Sidetone Switchover Enabled ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ No AGC Gain Range, Sidetone Switchover Enabled ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ AGC Range of 6.0 dB, only HYS Input Active, HYL Muted ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ No AGC Gain Range, only HYS Input Active, HYL Muted The ratio between start and stop current for the AGC curves is programmable for both voltage a nd current regulation mode: ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ Bit 4, Reg. 1 ‘DC Mask’ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ Bit 1, Reg. 2 ‘AGC Ratio’ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ AGC Ratio Selected ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ IAGCstart (µA) ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ IAGCstop (µA) ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ Voltage Regu- lation, AGC Ratio 1:3 ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ Voltage Regu- lation, AGC Ratio 1:2 ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ Current Regu- lation, AGC Ratio 1:2 ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ Current Regu- lation, AGC Ratio 3:5 ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ The relation between line current and Istart and Istop is given by: Ilinestart/C0043 R AGC R S x IAGCstart Ilinestop/C0043 R AGC R S x IAGCstop Figures 5, 6, 7 and 8 show the AGC curves for both voltage regulation a nd c urrent regulation. In c urrent regulation, the start point for the AGC curves is coupled to the knee point of the dc characteristic, or: Iknee = IAGCstart. LOGIC OUTPUT DRIVERS The MC34016 is equipped with three logic outputs meant to interface to the front end of a telephone. The outputs can be controlled via the serial bus interface. As shown in the characteristics, the logic outputs are capable of sourcing at least 1.0 mA and sinking at least 5.0 mA. Output HKSW Output HKSW is dedicated to drive the hookswitch. With HKSW low , the line is opened via Q 2 a nd Q 3 a nd automatically switches off the line driver transistor Q1. This feature guarantees fast dc settling after line breaks occurring during pulse dialing. Outputs Out1 and Out2 Outputs Out1 and Out2 may be used for any logic function, such as control of an earth switch and/or a shunt wire. SERIAL BUS INTERFACE The serial interface of the MC34016 enables a simple three wire connection to a micro controller. Timing Times t1, t2, t3, t4 and t5 are specified in the electrical characteristics. With BEN high, data can be clocked into the serial port by using Data and Clk lines. On the rising edge of the Clk, the data enters the MC34016. The last 8–bits of data entered are shifted into the registers when BEN is forced low. With BEN low, the serial port of the MC34016 is disabled. BEN must be kept low until the next register update is needed. Data should be written by entering the most significant bit first (Bit 7) and the least significant bit (Bit 0) last. With BEN low, the Data and Clk lines may be used to control other devices in the application.

10 MOTOROLA ANALOG IC DEVICE DATA

Figure 3. Line Voltage versus Line Current Figure 4. Line Voltage versus Line Current Figure 5. AGC Weighting Factor versus Iline Figure 6. AGC Weighting Factor versus Iline Figure 7. AGC Weighting Factor versus Iline Figure 8. AGC Weighting Factor versus Iline

Figure 9. Test Diagram

12 MOTOROLA ANALOG IC DEVICE DATA

Figure 10. Typical Application with Passive Impedance and Voltage Regulation NOTE: Sidetone Networks not adapted to country specific telephone lines.

Figure 11. Typical Application with Active Impedance and Current Regulation NOTE: Sidetone Networks not adapted to country specific telephone lines.

14 MOTOROLA ANALOG IC DEVICE DATA

CASE 738–03 ISSUE E DW SUFFIX PLASTIC PACKAGE CASE 751D–04 ISSUE E OUTLINE DIMENSIONS NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A– –B– SAM0.010 (0.25) B ST D20X MBM0.010 (0.25) P10X J F G18X K C –T– SEATING PLANE M R X 45/C0095 DIM MIN MAX MIN MAX INCHESMILLIMETERS A 12.65 12.95 0.499 0.510 B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.50 0.90 0.020 0.035 G 1.27 BSC 0.050 BSC J 0.25 0.32 0.010 0.012 K 0.10 0.25 0.004 0.009 M 0 7 0 7 P 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029 /C0095 /C0095/C0095 /C0095 1.070 0.260 0.180 0.022 0.070 0.015 0.140 15° 0.040 1.010 0.240 0.150 0.015 0.050 0.008 0.110 0.020 25.66 6.10 3.81 0.39 1.27 0.21 2.80 0.51 27.17 6.60 4.57 0.55 1.77 0.38 3.55 15° 1.01

0.050 BSC

0.100 BSC

0.300 BSC

1.27 BSC

2.54 BSC

7.62 BSC

A B C D E F G J K L M N NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. -A- C K NE G F D 20 PL J 20 PL L M -T- SEATING PLANE 1 10 1120 0.25 (0.010) T AM M 0.25 (0.010) T BM M B

15MOTOROLA ANALOG IC DEVICE DATA NOTES

16 MOTOROLA ANALOG IC DEVICE DATA

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE : Motorola Literature Distribution; JAPAN : Nippon Motorola Ltd.; T atsumi–SPD–JLDC, T oshikatsu Otsuki, P .O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 6F Seibu–Butsuryu–Center, 3–14–2 T atsumi Koto–Ku, T okyo 135, Japan. 03–3521–8315 INTERNET : http://Design–NET .com 51 Ting Kok Road, T ai Po, N.T ., Hong Kong. 852–26629298 MC34016/D /C0042/C0077/C0067/C0051/C0052/C0048/C0049/C0054/C0047/C0068/C0042