MC3303

MC3303_V01 STMICROELECTRONICS | Alldatasheet

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Technical content

■ SHORT-CIRCUIT PROTECTED OUTPUTS ■ CLASS AB OUTPUT STAGE FOR MINIMAL CROSSOVER DISTORTION ■ SINGLE SUPPLY OPERATION: +3V TO +36V ■ DUAL SUPPLIES: ±15V TO ±18V ■ LOW INPUT BIAS CURRENT: 500nA MAX ■ INTERNALLY COMPENSATED ■ SIMILAR PERFORMANCE TO POPULAR UA741

DESCRIPTION

The MC3403 is a low-cost, quad operational am- plifier with true differential inputs. The device has electrical characteristics similar to the popular UA741. However the MC3403, has several dis- tinct advantages over standard operational ampli- fiers types in single supply applications. The quad amplifier can operate at supply voltage as low as 3 Volts or as high as 36 volts with quiescent currents about one third of those associated with the UA741 (on a per amplifier basis). The com- mon-mode input range includes the negative sup- ply, thereby eliminating the necessity for external biasing components in many applications. ORDER CODE N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) P = Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT) PIN CONNECTIONS (top view) Part Number Temperature Range Package NDP Example : MC3403N N DIP14 (Plastic Package) D SO14 (Plastic Micropackage) P TSSOP14 (Thin Shrink Small Outline Package) Inverting Input 2 Non-inverting Input 2 Non-inverting Input 1 CCV -CCV Output 3 Output 4 Non-inverting Input 4 Inverting Input 4 Non-inverting Input 3 Inverting Input 3 Output 1 Inverting Input 1 Output 2 LOW POWER QUAD BIPOLAR OPERATIONAL AMPLIFIERS November 2001 MC3303 MC3403 - MC3503

SCHEMATIC DIAGRAM (each amplifier) SCHEMATIC DIAGRAM DUAL SUPPLIES ABSOLUTE MAXIMUM RATINGS (1 stage) Q20 Q23 8pF Q19 Q18 Q17 Q16 Output Q27 V CC Q29 Q28 Q15 25 Ω Q30 8.2kΩ V CC (Ground) Q12 Q11 Q10 Q13 37 kΩ 31k Ω 0.7kΩ Q14 12k Ω Q4Q3 Q21 Q22 Q24 Q25 Non-inverting input input Inverting V CC V CC +3V to +30V 1.5V to 18V 1.5V to 18V V CC V CC Symbol Parameter MC3503 MC3403 MC3303 Unit VCC Supply voltage ±18 or 36 V Vi Input Voltage 1) 1. For supply voltage less than ±15V, the absolute maximum input voltage is equal to the supply voltage. ±18 V Vid Differential Input Voltage ±36 V Output Short-circuit Duration 2) 2. Any of the amplifier outputs can be shorted to ground indefinitly; however more than one should not be simultaneously shorted as the maximum junction will be exceeded. Infinite Ptot Power Dissipation 500 mW Toper Operating Free-air Temperature Range -55 to +125 0 to +70 -40 to +105 °C Tstg Storage Temperature Range -65 to +150 °C

ELECTRICAL CHARACTERISTICS

VCC = ±15V, Tamb = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit Vio Input Offset Voltage (Rs ≤ 10kΩ ) Tamb = 25°C Tmin ≤ Tamb ≤ Tmax mV Iio Input Offset Current Tamb = 25°C Tmin ≤ Tamb ≤ Tmax 55 0 200 nA Iib Input Bias Current Tamb = 25°C Tmin ≤ Tamb ≤ Tmax 40 500 800 nA Avd Large Signal Voltage Gain (Vo = ±10V, RL = 2kΩ) Tamb = 25°C Tmin ≤ Tamb ≤ Tmax

200 V/mV

Supply Voltage Rejection Ratio (Rs ≤ 10kΩ ) Tamb = 25°C Tmin ≤ Tamb ≤ Tmax 90 dB Icc Supply Current, all Amp, no load Tamb = 25°C MC3503 Tmin ≤ Tamb ≤ Tmax MC3503 2.8 7 mA V icm Input Common Mode Voltage Range Tamb = 25°C Tmin ≤ Tamb ≤ Tmax -15 -15 +13 +13 V CMR Common Mode Rejection Ratio (Rs ≤ 10kΩ ) Tamb = 25°C Tmin ≤ Tamb ≤ Tmax 90 dB Ios Output Short-circuit Current 10 30 45 mA ±Vopp Output Voltage Swing Tamb = 25°C R L ≤ 10kΩ R L ≤ 2kΩ Tmin ≤ Tamb ≤ Tmax R L ≤ 10kΩ R L ≤ 2kΩ 13.5 13 V SR Slew Rate (VI = ±10V, RL = 2kΩ , CL = 100pF, Tamb = 25°C, unity gain) 0.35 0.5 V/µs tr, tf Rsie Time (Vo = ±20mV, RL = 2kΩ , CL = 100pF,Tamb = 25°C, unity gain) 0.18 µs KOV Overshoot (VI = ±20mV, RL = 2kΩ , CL = 100pF, Tamb = 25°C, unity gain) 10 % ZI Input Impedance 0.3 1 ΜΩ ZO Output Impedance 75 Ω Bom Power Bandwidth (RL = 2kΩ , CL = 100pF, AV = 1, Tamb = 25°C, VO = 2Vpp, THD ≤ 5%) 9 kHz B Unity Gain Bandwidth Vo = 10mV, RL = 2kΩ , CL = 100pF, Tamb = 25°C, unity gain) 1M H z

VCC + = 5V, VCC - = Ground, Tamb = 25°C (unless otherwise specified) GBP Gain Bandwith Product (VO = 10 mV, RL = 2kΩ , CL = 100pF f =100kHz, Tamb = 25°C) 0.7 1 MHz THD Total Harmonic Distortion (f = 1kHz, Av = 20dB, RL = 2kΩ C L = 100pF, Vo = 2Vpp, Tamb = 25°C) 0.02 % en Equivalent Input Noise Voltage (f = 1kHz, Rs = 100Ω 43 φm Phase Margin 60 Degrees DV io Input Offset Voltage Drift Tmin ≤ Tamb ≤ Tmax 10 µV/°C DIio Input Offset Current Drift Tmin ≤ Tamb ≤ Tmax 50 pA/°C Vo1/Vo2 Channel Separation 120 dB Symbol Parameter Min. Typ. Max. Unit Vio Input Offset Voltage (Rs ≤ 10kΩ ) Tamb = 25°C Tmin ≤ Tamb ≤ Tmax mV Iio Input Offset Current Tamb = 25°C Tmin ≤ Tamb ≤ Tmax 55 0 200 nA Iib Input Bias Current Tamb = 25°C Tmin ≤ Tamb ≤ Tmax 40 500 800 nA Avd Large Signal Voltage Gain (Vo = 1.4Vto 2.4V, RL = 2kΩ) Tamb = 25°C Tmin ≤ Tamb ≤ Tmax Supply Voltage Rejection Ratio (Rs ≤ 10kΩ ) Tamb = 25°C Tmin ≤ Tamb ≤ Tmax 90 dB Icc Supply Current, all Amp, no load MC3503 2.8 4 mA Vopp Output Voltage Range (RL = 10kΩ) VCC = +5V +5 < VCC ≤ +30V 3.3 V CC + -2V 3.5 VCC + -1.7V V Symbol Parameter Min. Typ. Max. Unit nV Hz

The MC3403 is made using four internally com- pensated, two-stage operational amplifiers. The first stage of each consists of differential input de- vices Q24 and Q22 with input buffer transistors Q25 and Q21 and the differential to single ended converter Q3 and Q4. The first stage performs not only the first stage gain function but also performs the level shifting and transonductance reduction functions. By reducing the transconductance a smaller compensation capacitor (only 8pF) can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of Q24 and Q22. Another feature of this input stage is that the input com- mon-mode range can include the negative supply fo ground, in single supply operation, without sat- uration either the input devices or the differential to single-ended converter. The second stage consists of a standard current source load amplifier stage. The output stage is unique because it allows the output to swing to ground in single supply operation and yet does not exhibit any crossover distortion in split supply op- erations. This is possible because class AB oper- ation is utilized. Each amplifier is biased from an internal voltage regulator which has a low temperature coefficient thus giving each amplifier good temperature char- acteristics as well as excellent power supply rejec- tion. TYPICAL PERFORMANCE CURVES

APPLICATION INFORMATION

20µs/div. AV = 100 MC3403 VO V CC V CC 10kΩ VO = V CC VO R1 R1 + R2 V CC= 10kΩ 50kΩ 5kΩ 10kΩ MC3403 VO V CC V(ref) R C CR V(ref)= 1 V CC fO = 1 2 π RC For fO = 1kHz R = 16kΩ C = 0.01µF

HIGH IMPEDANCE DIFFERENTIAL AMPLIFIER COMPARATOR WITH HYSTERESIS BI-QUAD FILTER FUNCTION GENERATOR MC3403 MC3403 MC3403 a R1 b R1 C R R C R R eo eo = C (1 + a + b) ( - )e1e2 MC3403 VO V (ref) V I VO Hysteresis V OH V OL V (ref) VIL VIH V = [V - V ] + VOL R1+R2 (ref) (ref) V = [V - V ] + VOL R1+R2 (ref) (ref) H = [V - V ] OLR1 R1+R2 IL IH OH MC3403 MC3403 MC3403 MC3403 R R C C R 100kΩ 100kΩC1 R2 eI V(ref) Bandpass output V(ref) V(ref) R3 V(ref) Notch outputR = 160k Ω C = 0.001 µ F R1 = 1.6M Ω R2 = 1.6M Ω R3 = 1.6M Ω T = Passband notch gainN Where T = Center frequency gainBP MC3403 V (ref) V (ref) 1 VCC= Triangle wave output C MC3403 300kΩ Square wave output 75kΩ 100kΩ V (ref) R1 + R2

4 CR R1f =

f if R3 =R2 R1 R2 + R1 R f

MULTIPLE FEEDBACK BANDPASS FILTER TYPICAL PERFORMANCE CURVES MC3403 eo VCC C O C O = 10C C e I V (ref) V (ref) 1 VCC= C Given f = center frequency ; chosse valuesf,C than A (f ) = gain at center frequency For less than 10% error from operational amplifier QF BW If source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters o o o oo < 0.1 where f and BW are expressed in Hzo R3 = R1 = R2 = Q fC/c112 o 2A (f )o R1 R5 4Q R1-R5

14 PINS - PLASTIC PACKAGE

a1 0.51 0.020 B 1.39 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 0.280 i 5.1 0.201 L 3.3 0.130 Z 1.27 2.54 0.050 0.100

14 PINS - PLASTIC MICROPACKAGE (SO)

A 1.75 0.069 a1 0.1 0.2 0.004 0.008 a2 1.6 0.063 b 0.35 0.46 0.014 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.020 c1 45° (typ.) D (1) 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 7.62 0.300 F (1) 3.8 4.0 0.150 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.020 0.050 M 0.68 0.027 S 8° (max.) Note : (1) D and F do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (.066 inc) ONLY FOR DATA BOOK. D M F 1 7 b e E LG C c1 A b1s

14 PINS - THIN SHRINK SMALL OUTLINE PACKAGE

A 1.20 0.05 A1 0.05 0.15 0.01 0.006 b 0.19 0.30 0.007 0.15 c 0.09 0.20 0.003 0.012 E 6.40 0.252 e 0.65 0.025 k 0° 8° 0° 8° L1 1.00 0.039 aaa 0.100 0.004 c k L E e b D PIN 1 IDENTIFICATION SEATING PLANE C aaa C 0,25 mm .010 inch GAGE PLANE A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States © http://www.st.com