MC1906

MC853 MOTOROLA | Alldatasheet

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MD T tL INTEGRATED CIRCUITS FROM MOTOROLA MDT. MC830 Series (0 to +75°C) ISSLE 4 MC930 Series (-55 to +125°) MAXIMUM RATINGS. MDTL integrated circuits provide an excellent balance of scees ee power dissipation, and noise immunity for general purpose 0 +3 applications. The line includes many multifunction types, 49¢ ‘Supply Voltage — Vde tional logic power is provided by the “wired OR” capability of te Operating 4510 5.5 basic MDTL gate. Continuous 8.0 Pulsed, <1 second 12 G SUFFIX ‘Output Current (Into Outputs with METAL PACKAGE Outputs Low) Case 603-02 SUFFIX Buffers, Power Gates ~ Continuous 100 TO-100 PLASTIC PACKAGE Pulsed, < 30 ms 300 \\ CASE 645, All other types — Continuous 30 Rey Pulsed, < 30 ms 20 i Input Forward Current — mAde Continuous -10 — Pulsed, < 30 ms -30 LES «SUFFIX or CERAMIC PACKAGE P SUFFIX Negative Voltage at Input — Vde CASE 607 Peasr’s PACKAGE Continuous -0.5 ASE 61 Pulsed, < 30 ms -1.5 Input Reverse Current mAde 8 or Positive Voltage at Diode Input Vide t cure Fi 0G L SUFFIX Operating Temperature Range CERAMIC PACKAGE MC930 Series -55 to +125 CASE 620 Lsurrix MC830 Series 0 to +75 CERAMIC PACKAGE Storage Temperature Range CASE 632 Metal Can, Ceramic Package -65 to +150 TO-116 Plastic Package 55 to +125 Maximum Junction Temperature ec MC930 Series 175 MC830 Series 150 FUNCTIONS AND CHARACTERISTICS (Vcc = 5.0 Vdc, Ta = 25°C) Loading | Propage Power Type @ type @ Fector tion Dissipation Oto -55 to | Each Delay mw +75°C +125°C Case Output _|_ns typ tye/pkg Expandable Qual 4 Input NAND Gate MC830 607,632,646 | MC930 607.632 | 8 30 22 Expandable Oual 3.2 Input NAND Gate M830 603 MC930 603 8 30 22 Expandable Dual 4 Input Buffer mca32 607,632,646 | Mc932 | 607,632 25 35 85 Expandable Qual 3.2 Input Buffer McB32 603 MC932 603 [25 35 85 Dual 4 input Expander MC833 607,632,646 | MC933 | 607.632 = = = Dual 43 Input Expander C833 603 mc933 603 - - - Hex Inverter McB34 607,632,646 | Mc934 607.632 8 30 66 Hex Inverter (without output resistors! McB35 607,632,646 | MC935 607.632 8 30 42 Hex Inverter Mca36 607.632.646 | Mc936 | 607.632 8 30 66 Hex Inverter MCBa7 607,632,646 | MC937 607,632 7 25 30 Decade Counter MC838 607,632,646 | MC938 | 607.632 8 |30 MHz g 150 Divide-by-Sixteen Counter McB39 607,632,646 | MC939 | 607.632 a [30 MHz @ 150 Hex Inverter (without input diodes) mcsao 607,632,646 | MC940 | 607,632 8 30 66 Hex Inverter (without output resistors and input diodes) mceat 607,632,646 | MC941 607,632 8 30 az Expandable Qual 4 Input Power Gate mcaaa 607,632,646 | mcoaa 607,632 27 30 | 6s Expandable Oual 3:2 Input Power Gate mceaa 603 mcoaa 603 27 30 65 Clocked Flip-Flop mceas | 603,607,632,646 | mc945_ | 603,607,632 | 12/10@| 40 60 Quad 2: Input NAND Gate McB46 607,632,646 | Mc946 607,632 8 30 46 ‘Quad Inverter MCB46 603 MC946 603 8 30 ery Quad 2:Input Gate Expander McB47 607,632,646 | Mc947 607.632 - Clocked Flip-Flop mcsas | 603,607,632,646 | Mc948_ | 603,607,632 | 11/9 @| 40 7 Quad 2 Input NAND Gate (2k pullup resistor) | MCB49 607,632,646 | MC949 607,632 7 28 55 Quad Inverter (2 k pullup resistor) mcga9 603 Mc949 603 7 25 69 Pulse Triggered Binary 1cas0 | 603,607,632,646 | mc950 | 603,607,632 [10/8 @/ 15 30 Monostable Multivibrator mceas1 | 603,607,632,646 | MC951_ | 603,607,632 | 10 40 30 Dual J-K Flip-Flop (common clock and Cp, separate Sp) mcas2 | 607,632,646 | MC952 607.632 | 12/710@! 40 320 Dual J K Flip Flop (separate clock and Sp. no Co) mcas3 | 607,632,646 | mcos3 | 607.632 | 12102 40 120 @ F wstix canotes Gorrie Fat Package G six denotes Mosel Can, Lsutfx denotes Dual in-Line Ceramic Package. © ills denotes cont ~-ea Rasen ore atastie Package. (i.e, MCB30G ~ Metal Con, MCB3OF = Flat Package, MC83OL. « Dual In-Line Ceramic Package MeB30P = Plastic Packoge) @ Fonout for MC80 series type/Fan-out for MC930 series type @ counting frequency 7

MDTL (continued) Loading | Propaga Power Type @ Type @ Factor tion Dissipation Oto -55 to Each Delay mw Function +75°C +125°C Case Output ns typ. typ/pkg Dual dK Flip Flop (common clock and Cp, separate Sp, 2k pullup resistor) mcess | 607,692,646 | mcoss | 607.692 | 119 @| ao 140 Dual J-K Flip-Flop (separate clock and Sp, no Cp, 2k pullup resistor) mcase | 607,692,646 | cose | 607.632 | 119 @| 40 140 Quad 2-Input Buffer MC857 607 632,646 MC957 607.632 25 35 170 Quad 2: Input NAND Power Gate Mc858 607,632,646 MC958 607,632 27 30 130 Expandable Oual 4:Input NANO Gate (2 k pullup resistor) MC861 607,632,646 MC961 607,632 7 25 33 Expandable Dual 3-2 Input NAND Gate (2k pullup resistor) MC861 603 MC961 603 7 25 33 Triple 3-Input NAND Gate MC862 607,632,646 MC962 607,632 8 30 33 Dual 2-Input NAND Gate plus Inverter MC862 603 MC962 603 8 30 30 Triple 3-Input NAND Gate (2 k pullup resistor) mces3 | 607,632,646 | mc9s3_| 607.632 7 25 50 Dual 2-Input NAND Gate plus Inverter (2 k pullup resistor) MC863 603 MC963, 603 7 | 25 45 Qual 5 Input NANO Gate (6K pullup resistor)| Mc1800 | 607,632,646 | MC1900| 607,632 8 30 22 Dual 5-Input NAND Gate (2k pullupresistor) | MC1801 607.632.646 mc1901 | 607,632 7 | 25 33 Expandable 8-Input NAND Gate Mc1802 607.632.646 mc1902 | 607,632 8 | 30 " Expandable 8-Input NANO Gate (2k pullup resistor) MC1803 607,632,646 MC1903 607,632 7 25 165 10-Input NAND Gate MC 1804 607,632,646 MC 1904 607,632 8 30 WwW 10-Input NANO Gate (2k pullup resistor) MC1805 607,632,646 MC1905 607,632 7 25 16.5 Quad 2-Input AND Gate MC 1806, 607,632,646 MC1906 607,632 8 35 72 Quad 2-Input AND Gate(2k pullup resistor) MC1807 607,632,646 MC1907 607,632 7 30 85 Quad 2-Input OR Gate MC1808 607 632,646 MC1908 607,632 8 35 97 Quad 2-Input OR Gate (2k pullup resistor) MC1809 607 632,646 MC1909, 607,632 7 30 VW15 Quad 2-Input NOR Gate MC1810 607 632,646 MC1910 607,632 8 30 60 Quad 2-Input NOR Gate (2k pullup resistor) MC1811 607,632,646 MC1911 607,632 7 25 72 Quad 2-Input Exclusive OR Gate MC1812 607,632,646 MC1912 607,632 cy 40 120 Quad Latch MC1813 620,648 _ _ 7 35 220 Quad Latch MC1814 607 632,646 MC1914 607,632 7 35 220 Parallel Gated Clocked Flip-Flop MC1815 607 632,646 MC1915 607,632 12/10 40 65 Parallel Gated Clocked Flip-Flop MC1816 607,632,646 MC1916 607,632 Wg 40 75 Quad 2:Input NAND Gate (without Output resistor) MC1818 607,632,646 MC1918 607,632 8 30 32 High Voltage Hex inverter MC1820 632,646 _ ~ 7 40 42 © F suttix denotes Ceramic Flat Package, G suffix denotes Metal Can, L suffix denotes Dual in Line Ceramic Package, P suffix denotes ual In-Line Plastic Package. (\\,e., MCB3OG ~ Metal Can, MCBIOF ® Flat Package. MCB3OL. = Oval tn'Line Ceram Pack ona, *Uniess otherwise noted MCB30P = Plastic Package! = @ Fan-out for MCB30 series type /Fan-out for MC920 series type [case | -6°> | nce, © cours wecueney [seats [10] [eas [7 a] [sor | 7 fia [eas |e Te GATES Numbers at ends of terminals represent pin numbers. Numbers in parenthesis indicate loading. [692] 7 | 14 | Mc830/Mc930 MC830G/MC930G mcaaa/micoaa MC861/MC961 MC861G/MC961G Expandable Expandable Dual 4-Input NAND Gate Expandable Dual 4-Input Power NAND Gate Dual 3-2 Input NAND Gate a4 yd a2 . (4 6 (27) as m3 as 3 ame 3 a9 ag 618) (7) a9 (1):10 (1): 10 . 8 (27) (13 (1) 13 n "1 “Applies to MC861/MC961 “Applies to MC861G/MC961G (continued)

GATES (continued) MC844G/MC944G mc846/Mc946 Mcas8/Mc9ss Expandable Mc849/Mc949 Quad 2-Input NAND Power Gate Dual 3-2 Input NAND Power Gate Quad 2-Input NAND Gate ma stant aa nm 1 iy 2 8) 17) a) 2 3127 ya ma 6 (8) (7) os 42 ae as 7 (12 (1) 12. 11 (8) (7) 111275 ais ays 4-723 35162 3512 | * Applies 10 MCB49/MC949 mca62/Mca62 MC862G/MC962G MC1800/MC 1900 MC863/MC963 MC863G/MC963G MC1801/MC1901 Triple 3-Input NAND Gate Dual 2-Input NAND Gate Dual 5-Input NAND Gate Plus Inverter 8) (7) 4 ‘ : is ie? a) 4 3 gf pawn sine | 8 aay (V8 mM 9 (13 (10 af 07 3 4-253 6=374a-5 6-78 —_ 9-7 6-7-2-3-4°5 * Applies to MC863/MC963 * Applies to MC863G/MC963G * Applies to MC1801/MC 1901 MC1802/MC 1902 MC1804/MC 1904 MC1806/MC1906 MC1803/MC 1903 MC1805/MC 1905 MC1807/MC1907 Expandable 8-Input NAND Gate 10-Input NAND Gate Quad 2-Input AND Gate aa aa aa (2 ay 2 ay 2 suey 4 a 3 ms aiine | ine me 6 (8) (7)* a 9 m5 eae as (10 a9 a9 (13 a aye ais. a3. Pee ee 0 anre2 “Applies to MC1803/MC1903 * Applies to MC1805/MC 1905 “Applies to MC1807/MC1907 (continued)

GATES (continued) MC1808/MC 1908 MC 1810/MC1910 MC1809/MC 1909 MC 1811/MC1911 Quad 2-Input OR Gate Quad 2-Input NOR Gate 14 oa . (3) uy a hoa 618) (7) 6 (ei 13 m9 cuaine tae nie eu ee 110) as (@) 3-192 3-T * Applies to MC1809/MC 1909 “Applies to MC1811/MC1911 | MC1812/MC1912 MC1818/MC1918 Quad 2-Input Exclusive OR Gate Quad 2-Input NAND Gate (2) 7 (Without Output Resistors) (22 3h (2) 4 6 (8) mo 3 (8) (2) 8 a) 2 98 aa 81a) (2) 12 a) 9 1108) B-163+T+2 (12 FUNCTIONAL LOGIC DIAGRAM (13 1108) 2 3 = 3-72 MC851/MC951 Monostable Multivibrator F.LP, PACKAGES G PACKAGE Voc = Pin 6, Gnd = Pin 1 9 10 «11 2 3 4 (2) 3 JY we 6 (10) (2) 9 > Cd 10 (10) 2 8

FL, & P PACKAGES G PACKAGES (2) 10 7 ++ a andG loading factor: 12 for MCB45 types a - Q 10 for MC945 types (2/3) 3 ED So (2/3) 2 ED 50 11 for MCB4B types (73) 482 abe 6 cy (7/3) 3452 aba (ery 9 for MC948 types (2 2? gt (2) 1S ar (2/3) 124; ates ) (3) 94q aps Ic (2/3) 11-402 fp (2/3) 8 42 co (2) 5 Jk TRUTH TABLE SYNCHRONOUS TRUTH TABLE (Connect $2 to @, C2 to Q) a aC a ee x [xy & | a a | ee a [ox pe ee Se x 1 0 ; ee on | u Sa a ee poy F 3 es | Tow State imore negate) 1 — High State (more positive) es | X — State of the input does not affect the state of the Asynchronous inputs. eirect set So and direct clear circuit (Cov overrige the synchronous inputs: they are inde U-— Indeterminate State pendent of all other inputs mcas2/Mc952 Mc8s3/Mc953 MCB855/MC955 MC856/MC956 Dual J-K Flip-Flop ASYNCHRONOUS TRUTH TABLE Dual J-K Flip-Flop MC952/MC852 and MC955/MC855 a a (2) 4 poe fa 4 =] 1 LT | = 2) = z i 41 s*°Q\\ 6") So, oe (a4 oft ay 1 2dr (ay 2 a a *) ASYNCHRONOUS TRUTH TABLE (23) 2 gi") 5( MC953/MC853 and MC956/MCB56 ) lc a sunt qt el [4 iS Qk Bt") Asynchronous inputs, direct set (So) and direct clear > oe (2/3) 11 ; }s~al 8 ce“ (Co), override the synchronous inputs: they are in- (2/3) 11 ; (273) ar dependent of al! other inputs. (2) 13 si ar 2/9) 12 - De a 9) J-K TRUTH TABLE (2/3) 12 Fe al gis (a9 a 12 — Mc852 ee 12 — MCBS3 i 10 wicas2 ee 10 — Mc953 \\ 7 J & K inputs must not change while clock is high. 11 — MC856 9 — MC955 9 — Mc9s6 (cork Wee , W

FLIP-FLOPS (continued) MC 1813 MC 1814/MC1914 Quad Latch Quad Latch FUNCTIONAL LOGIC DIAGRAM 2° c G4 e may Lh. tn (2) 2 pa 30 . a | ce ahs c Gb—a (7 c 27 ob abe (7 (2) 6 oD atb—s (7) Information present at the Da TRUTH TABLE c Gina) 1 Inpur D is transferred to ca 10(7) [| the Q output when the clock th [| is high, and the Q output will Input as long as the clock re 1 1 mains high. Information pre ° ° a sent at the Q output will be re (2) 18 © OF 1217) Gained as the clock goes low (218 © until such time as the clock is *As applicable (ay 1a bo af 1a(7) Permitted to go high (see loading diagram) (2) 12 oa ne MC1815/MC1915 MC1816/MC1916 Parallel Gated Clocked Flip-Flop (2/3) 2 ) (2/3) 3 (2/3) 4 &) )> Ss abe (2/3) 5 *Q and G loading factor (3) 13 dr 12-MC1815 10- Mc1915 (2a) 9 17 MC1816 alee - MC1916 (2/3) 10-{e1 ) De cp G8 9. Mc (2/73) (2/3) 12-4c4 J-K TRUTH TABLE SYNCHRONOUS TRUTH TABLE (Connect $2 and S4 to Q, C2 and C4 to Q) Fee] [eto | | co [es [ca fcr] cat ss sa [si s2 [7a | [si [ss [ci Toa | a} rfo}ofofofofofofofa Q, vida 1] o0]0j; 0] o0]o0] 0 0 1 r}ofof]1]1]of]of}]o] 0 ° ° 1 o ° o ° 1 1 ° o 1 Qn | r}afa]of}oj41 1 | 0] 0 u | 1fo}o faa 1 1 | 0] 0 u sv! poiriatatay a} at atololu “SHUT TABLE ho) a }o}o}ofloj;o} oj 4 1 1 1 | ofo}a)41}o}o)]4 1 u ! 1 1 1 1 1 ° ° 1 1 u NC NC 1 | o}o}oj]o]1 1 1 1 1 ° 1 rir} a]ol}ota 1 1 1 u ri o}oj1]4 1 1 1 1 vu i fl Asynchronous input, direct : 1 1 4 1 1 1 4 1 uv clear (CE), overrides the syn- chronous inputs. Clocked op- 0 - Low State (more negative) NC — No Change eration will occur only when 1 - Hagh State (more positive) U — Indeterminate State Cp is in the High State.

a MCc834/MC934 McB35/MC935 MC836/MC936 Hex Inverter Hex Inverter MC837/MC937 (Without Output Resistors) Hex Inverter m i—f>e—s (a) mM 1 >o— 2 (8) 17)" i) — >o— 2 18) a 2—f>o— ay a—pema wo as Poa io) a s—[>e-« wot a 5 6 (8) ay (iz > ne) a1 fo 10081 71" ay 10 (8) = > ° 2-7 (1). 13 12 (8) 6-7 oa “Applies to MC837/MC937 mcg40/Mc940 McB41/MC941 Hex Inverter Hex Inverter (Without Input Diodes) (Without Output Resistors and Input Diodes) BUFFERS MC832/MC932

4 Expandable Dual 4-Input Buffer

4 Se 2 18)

fe (3) a4 a—f>o—« (8) a) 4 s * a) 5: fee a s—fo-« (8) 3 9 a) 9 8 a) (1) 12: n—o— 1018 (4) 13. n—fe— 1008) "1 arn r—fo— Tree PER REREEESECD 2-7 MC832G/MC932G Expandable Dual 3-2 Input Buffer aa 5 MC846G/MC946G mc1820 () 2 4 (25) MC849G/MC949G High Voltage (03 Quad Inverter Hex Inverter ae. {Without Output Resistors) ins 6 (25) oy 1—fDe-2 in aeteaea [> MC857/MC957 onr—fPDpo- 2 om ms an Quad 2-Input Buffers ys f>e— aie on a s— >o—6 7) m Ts oe a) 2 oy s—f>o—e om mn 7—P Dosa on o Tp os 0 a—f oe on a 8 10 25 : on3—fPpe— 2 a9 2-1 (1). 13. i * Applies to MCB49G/MC949G 3-2 |

3Sp1 4Q, 12Sp2 1109 10Sp3 903 5Sp4 6 Aq DECODING LoGic — Plt ae ee “ Bo, 8 EASY Sr 45. So, inp So, 21% @ & Eso 4 Pe, ek Eat 4 |g ea i]o mo (cP 10 | | ja/a @ o (& Yoo,a Io, (e Yec, a (E }e coal j6)a @ acs Jf co9 > d Go ae Heo dcr JE Co! rla a a | fe ja a ofa a 18) Cp 20) oF j Mca39/Mc939 Divide-by-Sixteen Counter DECODING LoGic 35, 4a 12S 11a 10S, 9a. 5S 6Q, 7 * “ 01 1 02 2 03 3 Da 4 2.4 a a a 379 @ & & oa — 4]a & @ & {Essa 1g, Ysa £ f§ YsS°d 61a a2 a & i} 7) @ a a Qa Pros a a> : P 6 a sia @ &@ a 1D a d aD au wld a & «

7 Y 7 Nn} a @ @ a

2a & a a bla a@ a a w)O a @ a (5)Cp2 15 Q Qa: Qa a Mc833/Mc933 MC833G/MC933G mcea7/mce47 Dual 4-Input Expander Dual 4-3 Input Expander Quad 2-Input Gate Expander | . | a 2 () 10. a2 a | a) 3 Ng aa eS m3 i a) 5 3 aa MS a6 m4 as i) 9 ay t0 * (My 6 s (9 Se ania ™ a 3 ™s (a) 10 a3 x. " N a) ‘Sas (1) 12. ee

MC850/MC950 | Pulse Triggered Binary SYNCHRONOUS ASYNCHRONOUS SINGLE TRIGGER \\ TRUTH TABLE TRUTH TABLE TRUTH TABLE (Pins Sq and C ee tis eegetnen FL, & P PACKAGES tspsyepel 2] TP Ne (18) 13 oy oyof oyu ry a : b rf xjalxja o| o a Oe (15) 4-4 Sq] . xJarjxiaila ofa 0 0 v4 3 (8) * (10) 0 1 1 0 Qa. 1 0 © (100 pF) : q 0 ° x 1 1 Oo tow tage rave) of 1]. (100 pF) 6 —fe . COLE] x] a | te nign state (more positive) | 1 | | a (45) 10 ce sg ab 10) | | x | o | 0 | 0 | X= don't care . q 2 U = indeterminate state 5 x} i {ojo} 0 as) 1 NC = no change G PACKAGE (1.5) 9 .! 3-9 Ss, (1.8) fs ye Dgl_2 (8) * (10) (100pF) 4—- 100pF) 5—q (oor C1 Ys. ate ie) * (10) as) 7-QS2 Co (1.5) 4 G Pkg: Voc = Pin 10, Gnd = Pin 6 “Applies to MC950