MC13158 MOTOROLA | Alldatasheet

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/C0077/C0067/C0049/C0051/C0049/C0053/C0056 SEMICONDUCTOR TECHNICAL DATA WIDEBAND FM IF SUBSYSTEM FOR DECT AND DIGITAL APPLICATIONS

ORDERING INFORMATION

MC13158FTB T A = – 40 to +85°C TQFP–32 FTB SUFFIX PLASTIC PACKAGE CASE 873 (Thin QFP) Order this document by MC13158/D 1MOTOROLA ANALOG IC DEVICE DATA /C0087/C0105/C0100/C0101/C0098/C0097/C0110/C0100 /C0070/C0077 /C0073/C0070 /C0083/C0117/C0098/C0115/C0121/C0115/C0116/C0101/C0109 The MC13158 is a wideband IF subsystem that is designed for high performance data and analog applications. Excellent high frequency performance is achieved, with low cost, through the use of Motorola’s MOSAIC 1.5  RF bipolar process. The MC13158 has an on–board grounded collector VCO transistor that may be used with a fundamental or overtone crystal in single channel operation or with a PLL in multi–channel operation. The mixer is useful to 500 MHz and may be used in a balanced differential or single ended configuration. The IF amplifier is split to accommodate two low cost cascaded filters. RSSI output is derived by summing the output of both IF sections. A precision data shaper has an Off function to shut the output off to save current. An enable control is provided to power down the IC for power management in battery operated applications. Applications include DECT, wideband wireless data links for personal and portable laptop computers and other battery operated radio systems which utilize GFSK, FSK or FM modulation.

  • Designed for DECT Applications
  • 1.8 to 6.0 Vdc Operating Voltage
  • Low Power Consumption in Active and Standby Mode
  • Greater than 600 kHz Detector Bandwidth
  • Data Slicer with Special Off Function
  • Enable Function for Power Down of Battery Operated Systems
  • RSSI Dynamic Range of 80 dB Minimum
  • Low External Component Count Representative Block Diagram This device contains 234 active transistors. RSSI 2532 31 30 29 28 27 26 EnableVEE1N/C Osc Base Osc EmitN/C Mix In1 Mix In2 RSSI Buf DS Gnd DS Out DS In2 DS “off” DS In1 Det Out IF Amp LIM Amp 5.0 p Bias Data Slicer MC13158 VEE2 Det Gain N/C Quad Lim Out N/C Lim Dec2 Lim Dec1 Mix Out VCC1 IF In IF Dec1 IF Dec2 IF Out VCC2 Lim In  Motorola, Inc. 1996 Rev 1

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Rating Pin Symbol Value Unit Power Supply Voltage 16, 26 VS(max) 6.5 Vdc Junction Temperature TJMAX +150 °C Storage Temperature Range Tstg –65 to +150 °C NOTE: 1. Devices should not be operated at or outside these values. The “Recommended Operating Conditions” provide for actual device operation. RECOMMENDED OPERATING CONDITIONS (VCC = V2 = V7; VEE = V16 = V22 = V26; VS = VCC – VEE ) Rating Pin Symbol Value Unit Power Supply Voltage 2, 7 VS 2.0 to 6.0 Vdc TA = 25°C –40°C ≤ TA ≤ 85°C 16, 26 Input Frequency 31, 32 Fin 10 to 500 MHz Ambient Temperature Range TA –40 to +85 °C Input Signal Level 31, 32 Vin 200 mVrms DC ELECTRICAL CHARACTERISTICS (TA = 25°C; VS = 3.0 Vdc; No Input Signal; See Figure 1.) Characteristic Condition Pin Symbol Min Typ Max Unit Total Drain Current VS = 2.0 Vdc 16, 26 ITOTAL 2.5 5.5 8.5 mA VS = 3.0 Vdc 3.5 5.7 8.5 VS = 6.0 Vdc 3.5 6.0 9.5 See Figure 2 DATA SLICER (Input Voltage Referenced to VEE ; VS = 3.0 Vdc; No Input Signal) Output Current; V18 LO; V19 = VEE 21 I21 2.0 5.9 – mA Data Slicer Enabled (DS “on”) V18 < V20 V20 = VS/2 See Figure 3 Output Current; V18 HI; V19 = VEE 21 I21 – 0.1 1.0 µA Data Slicer Enabled (DS “on”) V18 > V20 V20 = VS/2 See Figure 4 Output Current; V19 = VCC 21 I21 – 0.1 1.0 µA Data Slicer Disabled (DS “off”) V20 = VS/2 AC ELECTRICAL CHARACTERISTICS (TA = 25°C; VS = 3.0 Vdc; fRF = 110.7 MHz; fLO = 100 MHz; See Figure 1.) Characteristic Condition Pin Symbol Min Typ Max Unit MIXER Mixer Conversion Gain Vin = 1.0 mVrms 31, 32, 1 – – 22 – dB See Figure 5 Noise Figure Input Matched 31, 32, 1 NF – 14 – dB Mixer Input Impedance Single–Ended 31, 32 Rp – 865 – Ω See Figure 15 Cp – 1.6 – pF Mixer Output Impedance 1 – – 330 – Ω

Figure 1. Test Circuit

110.7 MHz

100 MHz

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Figure 2. Total Supply Current versus Figure 3. Data Slicer On Output Current Figure 4. Data Slicer On Output Current Figure 5. Normalized Mixer Gain Figure 6. Mixer RSSI Output Current versus Figure 7. Normalized IF Amp Gain

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The MC13158 is a low power single conversion wideband FM receiver incorporating a split IF. This device is designated for use as the backend in digital FM systems such as Digital European Cordless Telephone (DECT) and wideband data links with data rates up to 2.0 Mbps. It contains a mixer, oscillator, Received Signal Strength Indicator (RSSI), IF amplifier, limiting IF, quadrature detector, power down or enable function, and a data slicer with output off function. Further details are covered in the Pin Function Description which shows the equivalent internal circuit and external circuit requirements. Current Regulation/Enable Temperature compensating voltage independent current regulators which are controlled by the enable pin (Pin 25) where “low” powers up and “high” powers down the entire circuit. Mixer The mixer is a double–balanced four quadrant multiplier and is designed to work up to 500 MHz. It can be used in differential or in single ended mode by connecting the other input to the positive supply rail. The linear gain of the mixer is approximately 22 dB at 100 mVrms LO drive level. The mixer gain and noise figure have been emphasized at the expense of intermodulation performance. RSSI measurements are added in the mixer to extend the range to higher signal levels. The single–ended parallel equivalent input impedance of the mixer is Rp ~ 1.0 kΩ and Cp ~ 2.0 pF. The buffered output of the mixer is internally loaded resulting in an output impedance of 330 Ω . Local Oscillator The on–chip transistor operates with crystal and LC resonant elements up to 220 MHz. Series resonant, overtone crystals are used to achieve excellent local oscillator stability. Third overtone crystals are used through about 65 to 70 MHz. Operation from 70 MHz up to 180 MHz is feasible using the on–chip transistor with a 5th or 7th overtone crystal. To enhance operation using an overtone crystal, the internal transistor bias is increased by adding an external resistor from Pin 29 to VEE ; however, with an external resistor the oscillator stays on during power down. Typically, –10 dBm of local oscillator drive is needed to adequately drive the mixer. With an external oscillator source, the IC can be operated up to 500 MHz. RSSI The received signal strength indicator (RSSI) output is a current proportional to the log of the received signal amplitude. The RSSI current output is derived by summing the currents from the mixer, IF and limiting amplifier stages. An increase in RSSI dynamic range, particularly at higher input signal levels is achieved. The RSSI circuit is designed to provide typically 85 dB of dynamic range with temperature compensation. Linearity of the RSSI is optimized by using external ceramic bandpass filters which have an insertion loss of 4.0 dB and 330 Ω source and load impedance. For higher data rates used in DECT and related applications, LC bandpass filtering is necessary to acquire the desired bandpass response; however, the RSSI linearity will require the same insertion loss. RSSI Buffer The RSSI output current creates a voltage across an external resistor. A unity voltage–gain amplifier is used to buffer this voltage. The output of this buffer has an active pull–up but no pull–down, so it can also be used as a peak detector. The negative slew rate is determined by external capacitance and resistance to the negative supply. IF Amplifier The first IF amplifier section is composed of three differential stages with the second and third stages contributing to the RSSI. This section has internal DC feedback and external input decoupling for improved symmetry and stability. The total gain of the IF amplifier block is approximately 40 dB at 10.7 MHz. The fixed internal input impedance is 330 Ω . When using ceramic filters requiring source and loss impedances of 330 Ω , no external matching is necessary. Overall RSSI linearity is dependent on having total midband attenuation of 10 dB (4.0 dB insertion loss plus 6.0 dB impedance matching loss) for the filter. The output of the IF amplifier is buffered and the impedance is 330 Ω . Limiter The limiter section is similar to the IF amplifier section except that five differential stages are used. The fixed internal input impedance is 330 Ω . The total gain of the limiting amplifier section is approximately 70 dB. This IF limiting amplifier section internally drives the quadrature detector section and it is also brought out on Pin 12. Quadrature Detector The quadrature detector is a doubly balanced four quadrant multiplier with an internal 5.0 pF quadrature capacitor between Pins 12 and 13. An external capacitor may be added between these pins to increase the IF signal to the external parallel RLC resonant circuit that provides the 90 degree phase shift and drives the quadrature detector. A single pin (Pin 13) provides for the external LC parallel resonant network and the internal connection to the quadrature detector. Internal low pass filter capacitors have been selected to control the bandwidth of the detector. The recovered signal is brought out by the inverting amplifier buffer. An external feedback resistor from the output (Pin 17) to the input of the inverting amplifier (Pin 15) controls the output amplitude; it is combined with another external resistor from the input to the negative supply (Pin 16) to set the output dc level. For a resistor ratio of 1, the DC level at the detector output is 2.0 VBE (see Figure 12). A small capacitor C17 across the first resistor (from Pin 17 to 15) can be used to reduce the bandwidth. Data Slicer The data slicer is a comparator that is designed to square up the data signal. Across the data slicer inputs (Pins 18 and 20) are back to back diodes.

7MOTOROLA ANALOG IC DEVICE DATA The recovered data signal from the quadrature detector can be DC coupled to the data slicer DS IN1 (Pin 18). In the application circuit shown in Figure 1 it will be centered at 2.0 VBE and allowed to swing ± VBE . A capacitor is placed from DS IN2 (Pin 20) to VEE . The size of this capacitor and the nature of the data signal determine how faithfully the data slicer shapes up the recovered signal. The time constant is short for large peak to peak voltage swings or when there is a change in DC level at the detector output. For small signal or for continuous bits of the same polarity which drift close to the threshold voltage, the time constant is longer. A unique feature of the data slicer is that the inverting switching stages in the comparator are supplied through the emitter pin of the output transistor (Pin 22 – DS Gnd) to VEE rather than internally to VEE . This is provided in order to reduce switching feedback to the front end. A control pin is provided to shut the data slicer output off (DS “off” – Pin 19). With DS “off” pin at VCC the data slicer output is shut off by shutting down the base drive to the output transistor. When a channel is being monitored to make an RSSI measurement, but not to collect data, the data output may be shut off to save current. PIN FUNCTION DESCRIPTION ÁÁÁÁ ÁÁÁÁ Pin ÁÁÁÁ ÁÁÁÁ Symbol ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Internal Equivalent Circuit ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Description/External Circuit Requirements ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ Mix Out VCC1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Mix Out VCC1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Mixer Output The mixer output impedance is 330 Ω ; it matches to 10.7 MHz ceramic filters with 330 Ω input impedance. Supply Voltage (VCC1 ) This pin is the VCC pin for the Mixer, Local Oscillator, and IF Amplifer. The operating ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Out VEE1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Oscillator, and IF Amplifer. The operating supply voltage range is from 1.8 Vdc to 5.0 Vdc. In the PCB layout, the VCC trace must be kept as wide as possible to minimize inductive reactances along the trace; it is best to have it completely fill around the surface mount components and traces on the circuit side of the PCB. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ IF In IF ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 330 64 k 64 kIF Dec2 VCC1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ IF Input The input impedance at Pin 3 is 330 Ω . It matches the 330 Ω load impedance of a 10.7 MHz ceramic filter. Thus, no external matching is required. IF DEC1 & DEC2 ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ Dec1 IF Dec2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ IF Dec1 IF In 3VEE1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ IF decoupling pins. Decoupling capacitors should be placed directly at the pins to enhance stability. Two capacitors are decoupled to the RF ground VCC1 ; one is placed between DEC1 & DEC2. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ IF Out ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ IF Out VEE1 VCC1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ IF Output The output impedance is 330 Ω ; it matches the 330 input resistance of a 10.7 MHz ceramic filter.

8 MOTOROLA ANALOG IC DEVICE DATA

PIN FUNCTION DESCRIPTION (continued) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Description/External Circuit Requirements ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Internal Equivalent Circuit ÁÁÁÁ ÁÁÁÁ Symbol ÁÁÁÁ ÁÁÁÁ Pin ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ VCC2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 330 64 k 64 kLi VCC2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Supply Voltage (VCC2 ) This pin is VCC supply for the Limiter, Quadrature Detector, data slicer and RSSI buffer circuits. In the application PC board this pin is tied to a common VCC trace with VCC1 . ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Lim In Lim Dec1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á 330 64 kLim Dec2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Limiter Input The limiter input impedance is 330 Ω . Limiter Decoupling ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ Dec1 Lim Dec2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Lim Dec1 Lim In 8VEE2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Limiter Decoupling Decoupling capacitors are placed directly at these pins and to VCC (RF ground). Use the same procedure as in the IF decoupling. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ 11,14, 27 & 28 ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ N/C ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ No Connects There is no internal connection to these pins; however it is recommended that these pins be connected externally to VCC (RF ground). ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ Lim Out ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 13Quad12 Lim Out VCC2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Limiter Output The output impedance is low. The limiter drives a quadrature detector circuit with in– phase and quadrature phase signals. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Quad ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á VEE2 5.0 p ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Quadrature Detector Circuit The quadrature detector is a doubly balanced four–quadrant multiplier with an internal 5.0 pF capacitor between Pins 12 and 13. An external capacitor may be added to increase the IF signal to Pin 13. The quadrature detector pin is provided to connect the external RLC parallel resonant network which provides the 90 degree phase shift and drives the quadrature detector. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ Det Gain Det Out ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Det Out Det VCC2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Detector Buffer Amplifier This is an inverting amplifier. An external feed- back resistor from Pin 17 to 15, (the inverting input) controls the output amplitude; another resistor from Pin 15 to the negative supply (Pin 16) sets the DC output level. A 1:1 resistor ratio sets the output DC level at two VBE with respect to VEE . A small capacitor from Pin 17 to 15 can be used to set the bandwidth. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ VEE2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ O ut VEE2 Det Gain ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Supply Ground (VEE2 ) In the PCB layout, the ground pins (also applies to Pin 26) should be connected directly to chassis ground. Decoupling capacitors to VCC should be placed directly at the ground pins.

9MOTOROLA ANALOG IC DEVICE DATA PIN FUNCTION DESCRIPTION (continued) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Description/External Circuit Requirements ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Internal Equivalent Circuit ÁÁÁÁ ÁÁÁÁ Symbol ÁÁÁÁ ÁÁÁÁ Pin ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ DS “off” ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ DS Out VCC2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Data Slicer Off The data output may be shut off to save cur- rent by placing DS “off” (Pin 19) at VCC . ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ DS Out ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ DS Gnd CC2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Data Slicer Output In the application example a 10 kΩ pull–up resistor is connected to the collector of the output transistor at Pin 21. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ DS Gnd ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á DS “off” VEE2 64 k ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Data Slicer Ground All the inverting switching stages in the comparator are supplied through the emitter pin of the output transistor (Pin 22) to ground rather than internally to VEE in order to reduce switching feedback to the front end. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ DS In1 DS In2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ DS In2 VEE2 DS In1 VCC2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Data Slicer Inputs The data slicer has differential inputs with back to back diodes across them. The recovered signal is DC coupled to DS IN1 (Pin 18) at nominally V18 with respect to VEE ; thus, it will maintain V18 ± VBE at Pin 18. DS IN2 (Pin 20) is AC coupled to VEE . The choice of coupling capacitor is dependent on the nature of the data signal. For small signal or continuous bits of the same polarity, the response time is relatively large. On the other hand, for large peak to peak voltage swings or when the DC level at the detector output changes, the response time is short. See the discussion in the application section for external circuit design details. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ RSSI Buf RSSI ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ RSSI Buf VEE2 RSSI VCC2 VCC1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ RSSI Buffer A unity gain amplifier is used to buffer the voltage at Pin 24 to 23.The output of the unity gain buffer (Pin 23) has an active pull up but no pull down. An external resistor is placed from Pin 23 to VEE to provide the pull down. RSSI The RSSI output current creates a voltage drop across an external resistor from Pin 24 to VEE . The maximum RSSI current is 26 µA; thus, the maximum RSSI voltage using a 100 kΩ resistor is approximately 2.6 Vdc. Fig- ure 22 shows the RSSI Output Voltage versus Input Signal Level in the application circuit. The negative slew rate is determined by an external capacitor and resistor to VEE (negative supply). The RSSI rise and fall times for various RF input signal levels and R24 values without the capacitor, C24 are displayed in Figure 24. This is the maximum response time of the RSSI.

10 MOTOROLA ANALOG IC DEVICE DATA

PIN FUNCTION DESCRIPTION (continued) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Description/External Circuit Requirements ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Internal Equivalent Circuit ÁÁÁÁ ÁÁÁÁ Symbol ÁÁÁÁ ÁÁÁÁ Pin ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ Enable ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ VCC1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Enable The IC regulators are enabled by placing this pin at VEE . ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ VEE1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ VEE1 Enable ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ VCC2 VEE2 VEE1 VCC1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ VCC and VEE ESD Protection ESD protection diodes exist between the VCC and VEE pins. It is important to note that significant differences in potential (> 0.5 VBE ) between the two VCC pins or between the VEE pins can cause these structures to start to conduct, thus compromising isolation between the supply busses. VCC1 & VCC2 should be maintained at the same DC potential, as should VEE1 & VEE2 . ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ Osc Base Osc Emitter ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Osc Base VCC1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Oscillator Base This pin is connected to the base lead of the common collector transistor. Since there is no internal bias resistor to the base, VCC is applied through an external choke or coil. Oscillator Emitter This pin is connected to the emitter lead; the ii d i l l ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ VEE1 Osc Emitter ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ p emitter is connected internally to a current source of about 200 µA. Additional emitter current may be obtained by connecting an external resistor to VEE ; IE = V29/R29. Details of circuits using overtone crystal and LC varactor controlled oscillators are discussed in the application section. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ Á ÁÁÁ ÁÁÁÁ Mix In1 Mix In2 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ RF In2 VEE1 RF In1 VCC1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Mixer Inputs The parallel equivalent differential input impedance of the mixer is approximately 2.0 kΩ in parallel with 1.0 pF. This equates to a single ended input impedance of 1.0 kΩ in parallel with 2.0 pF. The application circuit utilizes a SAW filter having a differential output that requires a 2.0 kΩ II 2.0 pF load. Therefore, little matching is required between the SAW filter and the mixer inputs. This and alternative circuits are discussed in more detail in the application section.

11MOTOROLA ANALOG IC DEVICE DATA APPLICATIONS INFORMATION Evaluation PC Board The evaluation PCB is very versatile and is intended to be used across the entire useful frequency range of this device. The center section of the board provides an area for attaching all SMT components to the circuit side and radial leaded components to the component ground side (see Figures 29 and 30). Additionally, the peripheral area surrounding the RF core provides pads to add supporting and interface circuitry as a particular application dictates. This evaluation board will be discussed and referenced in this section. Component Selection The evaluation PC board is designed to accommodate specific components, while also being versatile enough to use components from various manufacturers and coil types. Figures 13 and 14 show the placement for the components specified in the application circuit (Figure 12). The application circuit schematic specifies particular components that were used to achieve the results shown in the typical curves and tables but alternate components should give similar results.

12 MOTOROLA ANALOG IC DEVICE DATA

Figure 12. Application Circuit NOTES: 1. Saw Filter – Siemens part number Y6970M(5 pin SIP plastic package).

  1. An LCR filter reduces the broadband noise in the IF; ceramic filters may be used for data rates under 500 kHz. 4.0 dB insertion loss filters

optimize the linearity of RSSI.

  1. The quadrature tank components are chosen to optimize linearity of the recovered signal while maintaining adequate recovered
  2. The local oscillator circuit utilizes a 122.7 MHz, 5th overtone, series resonant crystal specified with a frequency tolerance of 25 PPM, ESR

of 120 Ω max. The oscillator configuration is an emitter coupled butler.

  1. The 95 NH (Nominal) inductor is a 7.0 mm variable shielded inductor: Coilcraft part # 150–04J08S or equivalent.
  2. 0.68 µH axial lead chokes (molded inductor ): Coilcraft part # 90–11.
  3. To enable the IC, Pin 25 is taken to VEE . The external pull down resistor at Pin 29 could be linked to the enable function; otherwise if it is

taken to VEE as shown, it will keep the oscillator biased at about 500 µA depending on the VCC level.

  1. The other resistors and capacitors are surface mount components.

112 MHz

Figure 13. Circuit Side Component Placement

14 MOTOROLA ANALOG IC DEVICE DATA

Figure 14. Ground Side Component Placement

122.7 MHz

provide additional selectivity and adjacent channel rejection. bandwidths greater than 280 kHz. the SAW filter and the mixer. contribution to system noise. Figure 15. Mixer Input Impedance 14 dB and the SAW filter adds typically 10 dB insertion loss.

16 MOTOROLA ANALOG IC DEVICE DATA

Figure 16. System Block Diagram for Noise Analysis Figure 17. 112 MHz LNA

3.5 Vdc

(Figure 12) shows a 5th overtone oscillator at 122.7 MHz. This circuit uses a Butler overtone oscillator configuration. on the desired Butler mode of oscillation. behavior an inductor, Lo, is placed in parallel with the crystal.

RSSI output. The equivalent circuit is shown in Figure 18. Figure 18. IF LCR Filter

150 VCC

parallel capacitance of the parallel resonant tank circuit.

18 MOTOROLA ANALOG IC DEVICE DATA

Figure 19. Detector Output Voltage versus Figure 20. Demodulator “S–Curve” Test Setup capacitor for the longest strings of bits at the same polarity. where R17 is 82 kΩ , the feedback resistor from Pin 17 to 15. The closest standard value is 4.7 nF. Figure 21. Data Slicer Equivalent Input Circuit

20 MOTOROLA ANALOG IC DEVICE DATA

Figure 25. S+N+D, N+D, N Figure 26. S+N+D, N+D, N versus Figure 27. Input IP3, 1.0 dB Compression Pt. Test Setup

112.1 MHz

4 Way Zero Degree

Figure 28. –1.0 dB Compression Pt. and Input

Figure 29. Circuit Side View

22 MOTOROLA ANALOG IC DEVICE DATA

Figure 30. Ground Side View

23MOTOROLA ANALOG IC DEVICE DATA FTB SUFFIX PLASTIC PACKAGE CASE 873–01 (Thin QFP) 0.274 0.274 0.055 0.010 0.051 0.010 0.005 0.013 0.005 0.006 0.348 0.006 0.348 MIN MIN MAX MAX MILLIMETERS INCHES DIM 7.10 7.10 1.60 0.373 1.50 0.20 0.197 0.57 0.135 10° 0.25 9.15 0.25 9.15 6.95 6.95 1.40 0.273 1.30 0.273 0.119 0.33 0.119 0.15 8.85 0.15 8.85

0.031 BSC

0.220 REF

0.016 BSC

0.80 BSC

5.6 REF

0.40 BSC

A B C D E F G H J K L M N P Q R S T U V X 0.280 0.280 0.063 0.015 0.059 0.008 0.008 0.022 0.005 10° 0.010 0.360 0.010 0.360 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE –H– IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS –A–, –B– AND –D– TO BE DETERMINED AT DATUM PLANE –H–. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE –C–. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE –H–. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. –H– DATUM PLANE X K DETAIL C U T R Q P DETAIL A B B J BASE METAL D N SECTION B–B VIEW ROTATED 90 ° CLOCKWISE F –H– DATUM PLANE H 24 17 VB –B– L –A– L –D– A S DETAIL A –C– SEATING PLANE C E DETAIL CM MG 1.0 REF 0.039 REF C0.20 (0.008) A–B D S SM0.01 (0.004) H0.20 (0.008) A–B D S SM A–B0.05 (0.002) S SM 0.20 (0.008) C A–B D 0.05 (0.002) A–B M S S 0.20 (0.008) H A–B DM S S OUTLINE DIMENSIONS

24 MOTOROLA ANALOG IC DEVICE DATA

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