MC13156 MOTOROLA | Alldatasheet

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/C0077/C0067/C0049/C0051/C0049/C0053/C0054 SEMICONDUCTOR TECHNICAL DATA WIDEBAND FM IF SYSTEM FOR DIGITAL AND ANALOG APPLICATIONS

ORDERING INFORMATION

TA = –40 to +85°C SO–24L QFP PIN CONNECTIONS Order this document by MC13156/D DW SUFFIX PLASTIC PACKAGE CASE 751E (SO–24L) FB SUFFIX PLASTIC QFP PACKAGE CASE 873 Function RF Input 1 RF Input 2 Mixer Output VCC1 IF Amp Input IF Amp Decoupling 1 IF Amp Decoupling 2 VCC Connect (N/C Internal) IF Amp Output VCC2 Limiter IF Input Limiter Decoupling 1 Limiter Decoupling 2 VCC Connect (N/C Internal) Quad Coil Demodulator Output Data Slicer Input VCC Connect (N/C Internal) Data Slicer Ground Data Slicer Output Data Slicer Hold VEE2 RSSI Output/Carrier Detect In Carrier Detect Output VEE1 and Substrate LO Emitter LO Base VCC Connect (N/C Internal) 12, 13, 14 28, 29, 30 SO–24L QFP 1MOTOROLA WIRELESS SEMICONDUCTOR SOLUTIONS – RF AND IF DEVICE DATA /C0087/C0105/C0100/C0101/C0098/C0097/C0110/C0100 /C0070/C0077 /C0073/C0070 /C0083/C0121/C0115/C0116/C0101/C0109 The MC13156 is a wideband FM IF subsystem targeted at high performance data and analog applications. Excellent high frequency performance is achieved at low cost using Motorola’s MOSAIC 1.5 bipolar process. The MC13156 has an onboard grounded collector VCO transistor that may be used with a fundamental or overtone crystal in single channel operation or with a PLL in multichannel operation. The mixer is useful to

500 MHz and may be used in a balanced–differential, or single–ended

configuration. The IF amplifier is split to accommodate two low cost cascaded filters. RSSI output is derived by summing the output of both IF sections. A precision data shaper has a hold function to preset the shaper for fast recovery of new data. other radio systems utilizing GMSK, FSK or FM modulation.

  • 2.0 to 6.0 Vdc Operation
  • Typical Sensitivity at 200 MHz of 2.0 µV for 12 dB SINAD
  • RSSI Dynamic Range Typically 80 dB
  • High Performance Data Shaper for Enhanced CT–2 Operation
  • Internal 330 Ω and 1.4 kΩ Terminations for 10.7 MHz and 455 kHz Filters
  • Split IF for Improved Filtering and Extended RSSI Range
  • 3rd Order Intercept (Input) of –25 dBm (Input Matched) Simplified Block Diagram 18192022 13 14 15 16 17 21 23 24 12 109 8 7 6 5 4 3 2 1 LIM DEC 2 LIM DEC 1 LIM In VCC2IF Out IF DEC 2 IF DEC 1 IF In VCC1Mix Out RF In 2 RF In 1 Quad CoilDemod DS In DS Gnd Data Out DS HoldVEE2RSSI CAR DetVEE1 LO Emit LO In Bias 5.0 pF Data Slicer LIM Amp IF Amp Bias Mixer NOTE : Pin Numbers shown for SOIC package only. Refer to Pin Assignments Table. This device contains 197 active transistors.  Motorola, Inc. 1998 Rev 2.1 DEVICE ON LIFETIME BUY LAST ORDER 15JAN02 LAST SHIP 27DEC02

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SOLUTIONS – RF AND IF DEVICE DATA MAXIMUM RATINGS Rating Pin Symbol Value Unit Power Supply Voltage 16, 19, 22 VEE(max) –6.5 Vdc Junction Temperature – TJ(max) 150 °C Storage Temperature Range – Tstg –65 to +150 °C NOTES: 1. Devices should not be operated at or outside these values. The “Recommended Operating Conditions” table provides for actual device operation. 2. ESD data available upon request. RECOMMENDED OPERATING CONDITIONS Rating Pin Symbol Value Unit Power Supply Voltage @ TA = 25°C 4, 9 VCC 0 (Ground) Vdc Input Frequency 1, 2 fin 500 MHz Ambient Temperature Range – TA –40 to +85 °C Input Signal Level 1, 2 Vin 200 mVrms DC ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC1 = VCC2 = 0, no input signal.) Characteristic Pin Symbol Min Typ Max Unit Total Drain Current (See Figure 2) 19, 22 ITotal mA VEE = –2.0 Vdc – 4.8 – VEE = –3.0 Vdc 3.0 5.0 8.0 VEE = –5.0 Vdc – 5.2 – VEE = –6.0 Vdc – 5.4 – Drain Current, I22 (See Figure 3) 22 I22 mA VEE = –2.0 Vdc – 3.0 – VEE = –3.0 Vdc – 3.1 – VEE = –5.0 Vdc – 3.3 – VEE = –6.0 Vdc – 3.4 – Drain Current, I19 (See Figure 3) 19 I19 mA VEE = –2.0 Vdc – 1.8 – VEE = –3.0 Vdc – 1.9 – VEE = –5.0 Vdc – 1.9 – VEE = –6.0 Vdc – 2.0 – DATA SLICER (Input Voltage Referenced to VEE = –3.0 Vdc, no input signal; See Figure 15.) Input Threshold Voltage (High Vin) 15 V15 1.0 1.1 1.2 Vdc Output Current (Low Vin) 17 I17 – 1.7 – mA Data Slicer Enabled (No Hold) V15 > 1.1 Vdc V18 = 0 Vdc AC ELECTRICAL CHARACTERISTICS (TA = 25°C, VEE = –3.0 Vdc, fRF = 130 MHz, fLO = 140.7 MHz, Figure 1 test circuit, unless otherwise specified.) Characteristic Pin Symbol Min Typ Max Unit 12 dB SINAD Sensitivity (See Figures 17, 25) 1, 14 – – –100 – dBm fin = 144.45 MHz; fmod = 1.0 kHz; fdev = ±75 kHz MIXER Conversion Gain 1, 3 – – 22 – dB Pin = –37 dBm (Figure 4) Mixer Input Impedance 1, 2 R p – 1.0 – kΩ Single–Ended (Table 1) C p – 4.0 – pF Mixer Output Impedance 3 – – 330 – Ω IF AMPLIFIER SECTION IF RSSI Slope (Figure 6) 20 – 0.2 0.4 0.6 µA/dB IF Gain (Figure 5) 5, 8 – – 39 – dB Input Impedance 5 – – 1.4 – kΩ Output Impedance 8 – – 290 – Ω DEVICE ON LIFETIME BUY LAST ORDER 15JAN02 LAST SHIP 27DEC02

Figure 1. Test Circuit NOTES: 1. TR 1 Coilcraft 1:4 impedance transformer.

  1. 1.5 µH variable shielded inductor:

Toko Part # 292SNS–T1373 or Equivalent.

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Figure 2. Total Drain Current versus Supply Figure 4. Mixer Gain versus Input Signal Level Figure 5. IF Amplifier Gain versus Input Figure 6. IF Amplifier RSSI Output Current versus Figure 7. Limiter Amplifier RSSI Output Current

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SOLUTIONS – RF AND IF DEVICE DATA CIRCUIT DESCRIPTION General The MC13156 is a low power single conversion wideband FM receiver incorporating a split IF. This device is designated for use as the backend in digital FM systems such as CT–2 and wideband data links with data rates up to 500 kbaud. It contains a mixer, oscillator, signal strength meter drive, IF amplifier, limiting IF, quadrature detector and a data slicer with a hold function (refer to Figure 8, Simplified Internal Circuit Schematic). Current Regulation Temperature compensating voltage independent current regulators are used throughout. Mixer The mixer is a double–balanced four quadrant multiplier and is designed to work up to 500 MHz. It can be used in differential or in single–ended mode by connecting the other input to the positive supply rail. Figure 4 shows the mixer gain and saturated output response as a function of input signal drive. The circuit used to measure this is shown in Figure 1. The linear gain of the mixer is approximately 22 dB. Figure 9 shows the mixer gain versus the IF output frequency with the local oscillator of 150 MHz at 100 mVrms LO drive level. The RF frequency is swept. The sensitivity of the IF output of the mixer is shown in Figure 10 for an RF input drive of 10 mVrms at 140 MHz and IF at 10 MHz. The single–ended parallel equivalent input impedance of the mixer is Rp ~ 1.0 kΩ and Cp ~ 4.0 pF (see Table 1 for details). The buffered output of the mixer is internally loaded resulting in an output impedance of 330 Ω . Local Oscillator The on–chip transistor operates with crystal and LC resonant elements up to 220 MHz. Series resonant, overtone crystals are used to achieve excellent local oscillator stability. 3rd overtone crystals are used through about 65 to 70 MHz. Operation from 70 MHz up to 180 MHz is feasible using the on–chip transistor with a 5th or 7th overtone crystal. To enhance operation using an overtone crystal, the internal transistor’s bias is increased by adding an external resistor from Pin 23 to VEE . –10 dBm of local oscillator drive is needed to adequately drive the mixer (Figure 10). The oscillator configurations specified above, and two others using an external transistor, are described in the application section: 1) A 133 MHz oscillator multiplier using a 3rd overtone 1) crystal, and 2) A 307.8 to 309.3 MHz manually tuned, varactor controlled 2) local oscillator. RSSI The Received Signal Strength Indicator (RSSI) output is a current proportional to the log of the received signal amplitude. The RSSI current output is derived by summing the currents from the IF and limiting amplifier stages. An external resistor at Pin 20 sets the voltage range or swing of the RSSI output voltage. Linearity of the RSSI is optimized by using external ceramic or crystal bandpass filters which have an insertion loss of 8.0 dB. The RSSI circuit is designed to provide 70+ dB of dynamic range with temperature compensation (see Figures 6 and 7 which show RSSI responses of the IF and Limiter amplifiers). Variation in the RSSI output current with supply voltage is small (see Figure 11). Carrier Detect When the meter current flowing through the meter load resistance reaches 1.2 Vdc above ground, the comparator flips, causing the carrier detect output to go high. Hysteresis can be accomplished by adding a very large resistor for positive feedback between the output and the input of the comparator. IF Amplifier The first IF amplifier section is composed of three differential stages with the second and third stages contributing to the RSSI. This section has internal dc feedback and external input decoupling for improved symmetry and stability. The total gain of the IF amplifier block is approximately 39 dB at 10.7 MHz. Figure 5 shows the gain and saturated output response of the IF amplifier over temperature, while Figure 12 shows the IF amplifier gain as a function of the IF frequency. The fixed internal input impedance is 1.4 kΩ . It is designed for applications where a 455 kHz ceramic filter is used and no external output matching is necessary since the filter requires a 1.4 kΩ source and load impedance. For 10.7 MHz ceramic filter applications, an external 430 Ω resistor must be added in parallel to provide the equivalent load impedance of 330 Ω that is required by the filter; however, no external matching is necessary at the input since the mixer output matches the 330 Ω source impedance of the filter. For 455 kHz applications, an external 1.1 kΩ resistor must be added in series with the mixer output to obtain the required matching impedance of 1.4 kΩ of the filter input resistance. Overall RSSI linearity is dependent on having total midband attenuation of 12 dB (6.0 dB insertion loss plus 6.0 dB impedance matching loss) for the filter. The output of the IF amplifier is buffered and the impedance is 290 Ω . Limiter The limiter section is similar to the IF amplifier section except that four stages are used with the last three contributing to the RSSI. The fixed internal input impedance is 1.4 kΩ . The total gain of the limiting amplifier section is approximately 55 dB. This IF limiting amplifier section internally drives the quadrature detector section. DEVICE ON LIFETIME BUY LAST ORDER 15JAN02 LAST SHIP 27DEC02

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SOLUTIONS – RF AND IF DEVICE DATA Quadrature Detector The quadrature detector is a doubly balanced four quadrant multiplier with an internal 5.0 pF quadrature capacitor to couple the IF signal to the external parallel RLC resonant circuit that provides the 90 degree phase shift and drives the quadrature detector. A single pin (Pin 13) provides for the external LC parallel resonant network and the internal connection to the quadrature detector. The bandwidth of the detector allows for recovery of relatively high data rate modulation. The recovered signal is converted from differential to single ended through a push–pull NPN/PNP output stage. Variation in recovered audio output voltage with supply voltage is very small (see Figure 13). The output drive capability is approximately ±9.0 µA for a frequency deviation of ±75 kHz and 1.0 kHz modulating frequency (see Application Circuit). Data Slicer The data slicer input (Pin 15) is self centering around 1.1 V with clamping occurring at 1.1 ± 0.5 Vbe Vdc. It is designed to square up the data signal. Figure 14 shows a detailed schematic of the data slicer. The Voltage Regulator sets up 1.1 Vdc on the base of Q12, the Differential Input Amplifier. There is a potential of

1.0 Vbe on the base–collector of transistor diode Q11 and

2.0 Vbe on the base–collector of Q10. This sets up a 1.5 Vbe (~ 1.1 Vdc) on the node between the 36 kΩ resistors which is connected to the base of Q12. The differential output of the data slicer Q12 and Q13 is converted to a single–ended output by the Driver Circuit. Additional circuitry, not shown in Figure 14, tends to keep the data slicer input centered at 1.1 Vdc as input signal levels vary. The Input Diode Clamp Circuit provides the clamping at Q7 and Q8 are on, thus, providing a 2.0 Vbe potential at the base of Q1. Also, the voltage regulator circuit provides a potential of 2.0 Vbe on the base of Q3 and 1.0 Vbe on the emitter of Q3 and Q2. When the data slicer input (Pin 15) is pulled up, Q1 turns off; Q2 turns on, thereby clamping the input at 2.0 Vbe. On the other hand, when Pin 15 is pulled down, Q1 turns on; Q2 turns off, thereby clamping the input at 1.0 Vbe. The recovered data signal from the quadrature detector is ac coupled to the data slicer via an input coupling capacitor. The size of this capacitor and the nature of the data signal determine how faithfully the data slicer shapes up the recovered signal. The time constant is short for large peak to peak voltage swings or when there is a change in dc level at the detector output. For small signal or for continuous bits of the same polarity which drift close to the threshold voltage, the time constant is longer. When centered there is no input current allowed, which is to say, that the input looks high in impedance. Another unique feature of the data slicer is that it responds to various logic levels applied to the Data Slicer Hold Control pin (Pin 18). Figure 15 illustrates how the input and output currents under “no hold” condition relate to the input voltage. Figure 16 shows how the input current and input voltage relate for both the “no hold” and “hold” condition. The hold control (Pin18) does three separate tasks: 1) With Pin 18 at 1.0 Vbe or greater, the output is shut off (sets high). Q19 turns on which shunts the base drive from Q20, thereby turning the output off. 2) With Pin 18 at 2.0 Vbe or greater, internal clamping diodes are open circuited and the comparator input is shut off and effectively open circuited. This is accomplished by turning off the current source to emitters of the input differential amplifier, thus, the input differential amplifier is shut off. 3) When the input is shut off, it allows the input capacitor to hold its charge during transmit to improve recovery at the beginning of the next receive period. When it is turned on, it allows for very fast charging of the input capacitor for quick recovery of new tuning or data average. The above features are very desirable in a TDD digital FM system. DEVICE ON LIFETIME BUY LAST ORDER 15JAN02 LAST SHIP 27DEC02

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Figure 17. MC13156DW Application Circuit NOTES: 1. 0.1 µH Variable Shielded Inductor: Coilcraft part # M1283–A or equivalent.

  1. 10.7 MHz Ceramic Filter: Toko part # SK107M5–A0–10X or Murata Erie part # SFE10.7MHY–A.
  2. 1.5 µH Variable Shielded Inductor: Toko part # 292SNS–T1373.
  3. 3rd Overtone, Series Resonant, 25 PPM Crystal at 44.585 MHz.
  4. 0.814 µH Variable Shielded Inductor: Coilcraft part # 143–18J12S.
  5. 0.146 µH Variable Inductor: Coilcraft part # 146–04J08.

133.755 MHz

4 VCC

12 MOTOROLA WIRELESS SEMICONDUCTOR

use components from various manufacturers and coil types. should give similar results. for the designer to breadboard as desired. S provide satisfactory performance. tolerance over the operating temperature is recommended. harmonic of the overtone crystal frequency.

93.3 MHz and Figure 21 shows a 7th overtone oscillator at

impacted by lower gain margins. Table 1. Mixer Input Impedance Data

on the desired Butler mode of oscillation. behavior an inductor (Lo) is placed in parallel with the crystal.

309.3 MHz) LC oscillator using an MPS901 (RF low power

sinusoidal waveform and fdev ±40 kHz. placement and component parasitics. RSSI output linear from –100 dBm to –30 dBm. Figure 17 with no RSSI output filter capacitor. Figure 20. MC13156DW Application Circuit NOTES: 1. 0.1 µH Variable Shielded Inductor: Coilcraft part # M1283–A or equivalent.

  1. Capacitors are Silver Mica.
  2. 5th Overtone, Series Resonant, 25 PPM Crystal at 93.300 MHz.
  3. 0.135 µH Variable Shielded Inductor: Coilcraft part # 146–05J08S or equivalent.

104 MHz

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Figure 21. MC13156DW Application Circuit NOTES: 1. 0.08 µH Variable Shielded Inductor: Toko part # 292SNS–T1365Z or equivalent.

  1. Capacitors are Silver Mica.
  2. 7th Overtone, Series Resonant, 25 PPM Crystal at 148.300 MHz.
  3. 76 nH Variable Shielded Inductor: Coilcraft part # 150–03J08S or equivalent.

Figure 22. MC13156DW Varactor Controlled LC Oscillator NOTES: 1. 1:4 Impedance Transformer: Mini–Circuits.

  1. 50 k Potentiometer, 10 turns.
  2. Spring Coil; Coilcraft A05T.
  3. Dual Varactor in SOT–23 Package.
  4. All other components are surface mount components.
  5. Ferrite beads through loop of 24 AWG wire.

320 MHz

159 MHz

45 MHz Narrowband Receiver

uses a 455 kHz quadrature tank from Toko. approximately 80 dB of linear range (see Figure 24). Figure 23. MC13156DW Application Circuit at 45 MHz NOTES: 1. 0.33 µH Variable Shielded Inductor: Coilcraft part # 7M3–331 or equivalent.

  1. 455 kHz Ceramic Filter: Murata Erie part # SFG455A3.
  2. 455 kHz Quadrature Tank: Toko part # 7MC8128Z.
  3. 3rd Overtone, Series Resonant, 25 PPM Crystal at 44.540 MHz.
  4. 0.416 µH Variable Shielded Inductor: Coilcraft part # 143–10J12S.

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Figure 24. RSSI Output Voltage Figure 25. S + N/N versus RF Input Signal Level Figure 26. RSSI Output Voltage Figure 27. RSSI Output Rise and Fall Times Figure 28. Signal Levels versus Figure 29. 1.0 dB Compression Pt. and Input

17MOTOROLA WIRELESS SEMICONDUCTOR SOLUTIONS – RF AND IF DEVICE DATA BER TESTING AND PERFORMANCE

Description

The test setup shown in Figure 31 is configured so that the function generator supplies a 100 kHz clock source to the bit error rate tester. This device generates and receives a repeating data pattern and drives a 5 pole baseband data filter. The filter effectively reduces harmonic content of the baseband data which is used to modulate the RF generator which is running at 144.45 MHz. Following processing of the signal by the receiver (MC13156), the recovered baseband sinewave (data) is AC coupled to the data slicer. The data slicer is essentially an auto–threshold comparator which tracks the zero crossing of the incoming sinewave and provides logic level data at its ouput. Data errors associated with the recovered data are collected by the bit error rate receiver and displayed. Bit error rate versus RF signal input level and IF filter bandwidth are shown in Figure 30. The bit error rate data was taken under the following test conditions:

  • Data rate = 100 kbps
  • Filter cutoff frequency set to 39% of the data rate or 39 kHz.
  • Filter type is a 5 pole equal–ripple with 0.5° phase error.
  • VCC = 4.0 Vdc
  • Frequency deviation = ±32 kHz. –90

Figure 30. Bit Error Rate versus RF used across the entire useful frequency range of this device. and interface circuitry as a particular application dictates. Figure 31. Bit Error Rate Test Setup

5 Pole

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Figure 32. Circuit Side View Figure 33. Ground Side View

19MOTOROLA WIRELESS SEMICONDUCTOR SOLUTIONS – RF AND IF DEVICE DATA FB SUFFIX PLASTIC QFP PACKAGE CASE 873–01 ISSUE A OUTLINE DIMENSIONS NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE –H– IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS –A–, –B– AND –D– TO BE DETERMINED AT DATUM PLANE –H–. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE –C–. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE –H–. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. U BL DETAIL A L –A– V SA–BM0.20 (0.008) D SC SA–BM0.20 (0.008) D SH A–B0.05 (0.002) SA–BM0.20 (0.008) D SC A–B0.05 (0.002) SA–BM0.20 (0.008) D SH –D– A S –B– –C– SEATING PLANE –H– DATUM PLANE MG DETAIL CM H C E 0.01 (0.004) –H– DATUM PLANE T DETAIL C R K Q X DETAIL A B B P SA–BM0.20 (0.008) D SC J F N D SECTION B–B BASE METAL VIEW ROTATED 90 CLOCKWISE/C0095 DIM MIN MAX MIN MAX INCHES MILLIMETERS A 6.95 0.274 0.280 B 6.95 7.10 0.274 0.280 C 1.40 1.60 0.055 0.063 D 0.273 0.373 0.010 0.015 E 1.30 1.50 0.051 0.059 G 0.80 BSC 0.031 BSC J 0.119 0.197 0.005 0.008 K 0.33 0.57 0.013 0.022 L 5.6 REF 0.220 REF M 6 8 6 8 N 0.119 0.135 0.005 0.005 P 0.40 BSC 0.016 BSC Q 5 10 5 10 R 0.15 0.25 0.006 0.010 S 8.85 9.15 0.348 0.360 T 0.15 0.25 0.006 0.010 U 5 11 5 11 V 8.85 9.15 0.348 0.360 X 1.00 REF 0.039 REF /C0095/C0095 /C0095/C0095 /C0095/C0095 /C0095/C0095 /C0095/C0095/C0095/C0095 7.10 DEVICE ON LIFETIME BUY LAST ORDER 15JAN02 LAST SHIP 27DEC02

20 MOTOROLA WIRELESS SEMICONDUCTOR

SOLUTIONS – RF AND IF DEVICE DATA DW SUFFIX PLASTIC PACKAGE CASE 751E–04 (SO–24L) ISSUE E OUTLINE DIMENSIONS NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A– –B– P12X D24X 13 24 M0.010 (0.25) B M SAM0.010 (0.25) B ST –T– G22X SEATING PLANE K C R X 45/C0095 M F J DIM MIN MAX MIN MAX INCHES MILLIMETERS A 15.25 15.54 0.601 0.612 B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.41 0.90 0.016 0.035 G 1.27 BSC 0.050 BSC J 0.23 0.32 0.009 0.013 K 0.13 0.29 0.005 0.011 M 0 8 0 8 P 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029 /C0095 /C0095 /C0095 /C0095 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;JAPAN : Motorola Japan Ltd.; SPS, Technical Information Center, 3–20–1, Technical Information Center: 1–800–521–6274 ASIA/PACIFIC : Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, 2, Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. 852–26668334 HOME PAGE : http://www.motorola.com/semiconductors/ MC13156/D◊ DEVICE ON LIFETIME BUY LAST ORDER 15JAN02 LAST SHIP 27DEC02