MC13110A

MC13110A MOTOROLA | Alldatasheet

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Technical content

/C0077/C0067/C0049/C0051/C0049/C0049/C0048/C0065/C0047/C0066 /C0077/C0067/C0049/C0051/C0049/C0049/C0049/C0065/C0047/C0066 UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT FB SUFFIX PLASTIC PACKAGE CASE 848B (QFP–52) Order this document by MC13110A/D Device Tested Operating Temperature Range Package

ORDERING INFORMATION

TA = – 40° to +85°C QFP–52 FTA SUFFIX PLASTIC PACKAGE CASE 932 (LQFP–48) 48 1 MC13110AFTA LQFP–48 MC13110BFB QFP–52 MC13110BFTA LQFP–48 QFP–52 LQFP–48 QFP–52 LQFP–48 1MOTOROLA ANALOG IC DEVICE DATA /C0065/C0100/C0118/C0097/C0110/C0099/C0101 /C0073/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0085/C0110/C0105/C0118/C0101/C0114/C0115/C0097/C0108 /C0067/C0111/C0114/C0100/C0108/C0101/C0115/C0115 /C0084/C0101/C0108/C0101/C0112/C0104/C0111/C0110/C0101 /C0083/C0117/C0098/C0115/C0121/C0115/C0116/C0101/C0109 /C0073/C0067 The MC13110A/B and MC13111A/B integrates several of the functions required for a cordless telephone into a single integrated circuit. This significantly reduces component count, board space requirements, external adjustments, and lowers overall costs. It is designed for use in both the handset and the base.

• MC13110A and MC13111A: Fully Programmable in all Power Modes
• MC13110B and MC13111B: MPU Clk Out and Second Local Oscillator are “Always On”. There is No Inactive Mode
• Dual Conversion FM Receiver – Complete Dual Conversion Receiver – Antenna Input to Audio Out

80 MHz Maximum Carrier Frequency

– RSSI Output – Carrier Detect Output with Programmable Threshold – Comparator for Data Recovery – Operates with Either a Quad Coil or Ceramic Discriminator

• Compander – Expander Includes Mute, Digital Volume Control, Speaker Driver, Programmable Low Pass Filter, and Gain Block – Compressor Includes Mute, Programmable Low Pass Filter, Limiter, and Gain Block
• MC13110A/B only: Frequency Inversion Scrambler – Function Controlled via MPU Interface – Programmable Carrier Modulation Frequency
• Dual Universal Programmable PLL – Supports New 25 Channel U.S. Standard with No External Switches – Universal Design for Domestic and Foreign Cordless Telephone Standards – Digitally Controlled Via a Serial Interface Port – Receive Side Includes 1st LO VCO, Phase Detector, and 14–Bit Programmable Counter and 2nd LO with 12–Bit Counter – Transmit Section Contains Phase Detector and 14–Bit Counter – MPU Clock Outputs Eliminates Need for MPU Crystal
• Low Battery Detect – Provides Two Levels of Monitoring with Separate Outputs – Separate, Adjustable Trip Points
• 2.7 to 5.5 V Operation (15 µA Current Consumption in Inactive Mode)
• AN1575: Refer to this Application Note for a List of the “Worldwide Cordless Telephone Frequencies R x Phase Detector Tx Phase Detector Low Battery Detect Simplified Block Diagram This device contains 8262 active transistors. Expander 1st Mixer Data Out R x In 2nd Mixer Tx PD Out Tx Out Limiting IF Amplifier Detector R x Out Tx In Low Battery Indicator R x PD In R x PD Out 1st LO 2nd LO Carrier Detect Out SPI RSSI RSSI µP Serial Interface Compressor Scrambler Scrambler = MC13110A/B Only NOTE: MPU Clock Out2nd LO This document contains information on a new product. Specifications and information herein are subject to change without notice.  Motorola, Inc. 1997 Rev 0

2 MOTOROLA ANALOG IC DEVICE DATA

T C Cap C In Amp Out T DA In V R Det Out RSSI xOut xIn CC Audio xAudio In LO LO V Gnd Audio SA Out SA In E Out E E In Scr Out Ref Ref VB cap capCtrl 1Out 1In Q Coil Lim Out V Lim C2 Lim C1 Lim In SGnd RF Mix Gnd RF CC RF 2 In Mix2 Out Mix1 Out Mix1 In Mix1 In1 2Out Vag PD ref Gnd PLL T Data EN Clk Clk Out CD Out x PD TxVCO PLL V R x LO 2 InLO 2 1st Mix 2nd Mix 2nd LO 1st LO 1st LO VCO IF Amp/ Limiter Detector RSSI LPF AALPF 2nd LO SC Filter Clock Mic Amp Tx Gain Adjust LPF ALC C Cap Compressor Limiter TxMute Ref2 Ref1 Low Battery Detect Data Amp Carrier Detect R x Gain Adjust R xMute Speaker Amp Speaker Mute Expander Vol Control 1st LO VB ÷25 12 b Prog Ref Ctr 2nd LO 14 b Prog R x Ctr Vref Reg 2.5 V 14 b Prog Tx Ctr µP Serial Interface Prog Clk Ctr Tx Phase Detect R x Phase Detect 2nd LO 10.240 PIN CONNECTIONS QFP–52 Vag PD ref Gnd PLL T Data EN Clk Clk Out x PD TxVCO PLL V R x OutLO 2 DA Out BD Out T C Cap C In Amp Out T DA In V R Det Out Q Coil xOut xIn CC Audio xAudio In Lim Out V Lim C2 Lim C1 Lim In RSSI Mix Gnd RF CC RF 2 In Mix2 Out Mix1 Out Mix1 In Mix1 In1 37LO LO V Gnd Audio SA Out SA In E Out E E In Scr Out LO 2 VB cap capCtrl 1Out 1In 1st Mix 2nd Mix 2nd LO LPF AALPF Carrier Detect Data Amp VCC Audio µP Serial Interface Prog Clk Ctr Tx Phase Detect R x Phase Detect Reg 2.5 V 14 b Prog Tx Ctr Mic Amp Speaker Amp Speaker Mute Expander Vol Control ÷25 12 b Prog Ref Ctr VB1st LO Programmable Low Battery Detect In CD Out LQFP–48 6 b Prog SC Clk Ctr 1st LO Detector RSSI IF Amp/ Limiter 2nd LO 1st LO VCO 14 b Prog R x Ctr Vref 2nd LO 10.240 LPF LPF 4.129 kHz Bypass Bypass 4.129 kHz ÷40 Scrambler Modulating Clock = MC13110A/B Only Scrambler NOTE: R x Gain Adjust R xMute ÷2 SC Filter Clock Tx Gain Adjust LPF ALC C Cap Compressor Limiter TxMute 6 b Prog SC Clk Ctr LPF LPF 4.129 kHz Bypass Bypass 4.129 kHz ÷40 Scrambler Modulating Clock Scrambler 2nd LO

3MOTOROLA ANALOG IC DEVICE DATA MAXIMUM RATINGS Characteristic Symbol Value Unit ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Power Supply Voltage ÁÁÁÁ ÁÁÁÁ VCC ÁÁÁÁÁ ÁÁÁÁÁ –0.5 to +6.0 ÁÁÁ ÁÁÁ Vdc ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Junction Temperature ÁÁÁÁ ÁÁÁÁ TJ ÁÁÁÁÁ ÁÁÁÁÁ –65 to +150 ÁÁÁ ÁÁÁ Maximum Power Dissipation, TA = 25°C PD 70 mW NOTES: 1. Devices should not be operated at these limits. The “Recommended Operating Conditions” provide for actual device operation. 2. ESD data available upon request. RECOMMENDED OPERATING CONDITIONS Characteristic Symbol Min Typ Max Unit Supply Voltage VCC 2.7 3.6 5.5 Vdc Operating Ambient Temperature TA –40 – 85 °C Input Voltage Low (Data, Clk, EN) VIL – – 0.3 V Input Voltage High (Data, Clk, EN) VIH PLL Vref – 0.3 – – V Bandgap Reference Voltage VB – 1.5 – V NOTE : 3. All limits are not necessarily functional concurrently. DC ELECTRICAL CHARACTERISTICS (VCC = 3.6 V, TA = 25°C, unless otherwise specified, IP3 = 0; Test Circuit Figure 1.) Characteristic Symbol Figure Min Typ Max Unit Static Current 1 Active Mode ACT ICC 5.5 8.5 10.5 mA Receive Mode R x ICC 3.1 4.1 5.3 mA Standby Mode STD ICC – 465 560 µA Inactive Mode [Note 4] INACT ICC – 15 30 µA Current Increase When IP3 = 1 (Active and Receive Modes) IIP3 1 – 1.4 1.8 mA NOTE: 4. MC13110B/MC13111B versions have no inactive mode.

4 MOTOROLA ANALOG IC DEVICE DATA

ELECTRICAL CHARACTERISTICS (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic Figure Input Pin Measure Pin Symbol Min Typ Max Unit FM RECEIVER (fRF = 46.77 MHz [USA Ch 21], fdev = ± 3.0 kHz, fmod = 1.0 kHz, Vcap ctrl = 1.2 V) Input Sensitivity (for 12 dB SINAD at Det Out Using C–Message Weighting Filter) 50 Ω Termination, Generator Referred 68, 69 Mix1 In1/In2 Det Out VSIN 2.2 –100 µVrms dBm Single–Ended, Matched Input, Generator Referred 0.4 –115 Differential, Matched Input, Generator Referred – 0.4 –115 First and Second Mixer Voltage Gain Total (Vin = 1.0 mVrms, with CF1 and CF2 Load)

1 Mix1

Mix2 Out MX gainT 24 29 – dB Isolation of First Mixer Output and Second Mixer Input (Vin = 1.0 mVrms, with CFI Removed) – Mix1 In1 or In2 Mix2 In Mix–Iso – 60 – dB Total Harmonic Distortion (Vin = 3.16 mVrms) 1 Mix1 In1 or In2 Det Out THD – 1.4 2.0 % Recovered Audio (Vin = 3.16 mVrms) 1 Mix1 In1 or In2 Det Out AFO 80 112 150 mVrms AM Rejection Ratio (Vin = 3.16 mVrms, 30% AM, @ 1.0 kHz) Det Out AMR 30 48 – dB Signal to Noise Ratio (Vin = 3.16 mVrms, No Modulation) – Mix1 In1 or In2 Det Out SNR – 48 – dB FIRST MIXER (No Modulation, fin = USA Ch21, 46.77 MHz, 50 Ω Termination at Inputs) Input Impedance Single–Ended 16 – Mix1 In1 or In2 R PS1 C PS1 1.6 3.7 kΩ pF Differential 16 Mix1 In1/In2 R PD1 C PD1 1.6 1.8 Output Impedance 14 – Mix1 Out R P1 Out C P1 Out 300 3.7 Ω pF Voltage Conversion Gain (Vin = 1.0 mVrms, with CF1 Filter as Load) 17, 18 Mix1 In1 or In2 Mix1 Out MX gain1 – 12 – dB 1.0 dB Voltage Compression Level (Input Referred) IP3 Bit Set to 0 19, 21 Mix1 In1 or In2 Mix1 Out VO Mix1 1 dB – –21 mVrms dBm IP3 Bit Set to 1 20, 21 – –12 Third Order Intercept (Input Referred) [Note 5] IP3 Bit Set to 0 19, 21 Mix1 In1 or In2 Mix1 Out TOImix1 –11 mVrms dBm IP3 Bit Set to 1 20, 21 – 178 –2.0 –3.0 dB IF Bandwidth 22 Mix1 In1 or In2 Mix1 Out Mix1 BW – 13 – MHz NOTE: 5. Third order intercept calculated for input levels 10 dB below 1.0 dB compression point.

5MOTOROLA ANALOG IC DEVICE DATA ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic UnitMaxTypMinSymbol Measure Pin Input PinFigure SECOND MIXER (No Modulation, fin = 10.7 MHz, 50 Ω Termination at Inputs) Input Impedance 24 Mix2 In Mix2 In R P2 In C P2 In 2.8 3.6 kΩ pF Output Impedance 24 – Mix2 Out R P2 Out C P2 Out 1.5 6.1 kΩ pF Voltage Conversion Gain (Vin = 1.0 mVrms, with CF2 Filter as Load) 26, 27 Mix2 In Mix2 Out MX gain2 – 20 – dB 1.0 dB Voltage Compression Level (Input Referred) IP3 Bit Set 0 28, 30 Mix2 In Mix2 Out VO Mix2 1 dB –17 mVrms dBm IP3 Bit Set 1 29, 30 – –14 Third Order Intercept (Input Referred) [Note 6] IP3 Bit Set 0 28, 30 Mix2 In Mix2 Out TOImix2 136 –4.3 mVrms dBm IP3 Bit Set 1 29, 30 – 158 –3.0 –3.0 dB IF Bandwidth 31 Mix2 In Mix2 Out Mix2 BW – 2.5 – MHz LIMITER/DEMODULATOR (fin = 455 kHz, fdev = ±3.0 kHz, fmod = 1.0 kHz) Input Impedance 49 Lim In Lim In R PLim C PLim 1.5 kΩ pF Detector Output Impedance – – Det Out R O – 1.1 – kΩ IF –/C02573.0 dB Limiting Sensitivity 1 Lim In Det Out IF Sens – 71 100 µVrms Demodulator Bandwidth – Lim In Det Out BW – 20 – kHz RSSI/CARRIER DETECT (No Modulation) RSSI Output Dynamic Range 56 Mix1 In RSSI RSSI – 80 – dB DC Voltage Range 56 Mix1 In RSSI DC RSSI – 0.2 to 1.5 – Vdc Carrier Detect Threshold CD Threshold Adjust = (10100) (Threshold Relative to Mix1 In Level)

57 Mix1 In CD Out VT – 15 – µVrms

Hysteresis, CD = (10100) (Threshold Relative to Mix1 In Level) 57 Mix1 In CD Out Hys – 2.0 – dB Output High Voltage CD = (00000), RSSI = 0.2 V

1 RSSI CD Out VOH VCC –

0.1 3.6 – V Output Low Voltage CD = (11111), RSSI = 0.9 V 1 RSSI CD Out VOL – 0.02 0.4 V Carrier Detect Threshold Adjustment Range (Programmable through MPU Interface) 126 – – VT Range – –20 to – dB Carrier Detect Threshold – Number of Programmable Levels NOTE: 6. Third order intercept calculated for input levels 10 dB below 1.0 dB compression point.

6 MOTOROLA ANALOG IC DEVICE DATA

ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic UnitMaxTypMinSymbol Measure Pin Input PinFigure R x AUDIO PATH (fin = 1.0 kHz, Active Mode, scrambler bypassed) Absolute Gain (Vin = –20 dBV) 1, 72 R x Audio In SA Out G –4.0 0 4.0 dB Gain Tracking (Referenced to E Out for Vin = –20 dBV) 1, 76 E In E Out G t dB Vin = –30 dBV –21 –20 –19 Vin = –40 dBV –42 –40 –38 Total Harmonic Distortion (Vin = –20 dBV) 1, 76 R x Audio In SA Out THD – 0.7 1.0 % Maximum Input Voltage (VCC = 2.7 V) 76 R x Audio In – – – –11.5 – dBV Maximum Output Voltage (Increase input voltage until output voltage THD = 5.0%, then measure output voltage) 1 E In E Out VOmax –2.0 0 – dBV Input Impedance – R x Audio In EI – Zin – 600 – kΩpp x E In in – 7.5 – Attack Time Ecap = 0.5 µF, Rfilt = 40 k (See Appendix B) – E In E Out ta – 3.0 – ms Release Time Ecap = 0.5 µF, Rfilt = 40 k (See Appendix B) – E In E Out tr – 13.5 – ms Compressor to Expander Crosstalk Vin = –10 dBV, V(E In) = AC Gnd

1 C In E Out C T – –90 –70 dB

R x Muting (Δ Gain) Vin = –20 dBV, Rx Gain Adj = (01111)

1 R x Audio In E Out M e – –84 –60 dB

R x Path, V Rx Audio In = –20 dBV 1 R x Audio In Scr Out R x fch 3.779 3.879 3.979 kHz Low Pass Filter Passband Ripple (Vin = –20 dBV) 1, 73 R x Audio In Scr Out Ripple – 0.4 0.6 dB R x Gain Adjust Range (Programmable through MPU Interface)

125 R x Audio In Scr Out R x

– –9.0 to – dB R x Gain Adjust Steps – Number of Programmable Levels

125 R x Audio In Scr Out R x n – 20 – dB

Audio Path Noise, C–Message Weighting (Input AC–Grounded)

70 R x Audio In Scr Out

EN – –85 <–95 <–95 dBV Volume Control Adjust Range 123 E In E Out Vcn Range – –14 to – dB Volume Control – Number of Programmable Levels

123 E In E Out Vcn – 16 – –

SPEAKER AMP/SP MUTE (Active Mode) Maximum Output Swing R L = No Load, Vin = 3.4 Vpp R L = 130 Ω , Vin = 2.8 Vpp R L = 620 Ω , Vin = 4.0 Vpp 1, 79 SA In SA Out VOmax 2.8 2.0 3.2 2.6 3.4 Vpp Speaker Amp Muting Vin = –20 dBV, RL = 130 Ω

1 SA In SA Out M sp – –92 –60 dB

7MOTOROLA ANALOG IC DEVICE DATA ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic UnitMaxTypMinSymbol Measure Pin Input PinFigure DATA AMP COMPARATOR Hysteresis 1 DA In DA Out Hys 30 42 50 mV Threshold Voltage – DA In DA Out VT – VCC – 0.7 – V Input Impedance 1 – DA In ZI 200 250 280 kΩ Output Impedance – – DA Out ZO – 100 – kΩ Output High Voltage Vin = VCC – 1.0 V, IOH = 0 mA

1 DA In DA Out VOH VCC –

0.1 3.6 – V Output Low Voltage Vin = VCC – 0.4 V, IOL = 0 mA 1 DA In DA Out VOL – 0.1 0.4 V Maximum Frequency – DA In DA Out Fmax – 10 – kHz MIC AMP (fin = 1.0 kHz, External resistors set to gain of 1, Active Mode) Open Loop Gain – Tx In Amp Out AVOL – 100,000 – V/V Gain Bandwidth – Tx In Amp Out GBW – 100 – kHz Maximum Output Swing (RL = 10 kΩ) – Tx In Amp Out VOmax – 3.2 – Vpp Tx AUDIO PATH (fin = 1.0 kHz, Tx Gain Adj = (01111); ALC, Limiter, and Mutes Disabled; Active Mode, scrambler bypassed) Absolute Gain (Vin = –10 dBV) 1, 83 Tx In Tx Out G –4.0 0 4.0 dB Gain Tracking (Referenced to Tx Out for Vin = –10 dBV) Vin = –30 dBV Vin = –40 dBV 1, 87 Tx In Tx Out G t –11 –17 –10 –15 –9.0 –13 dB Total Harmonic Distortion (Vin = –10 dBV) 1, 87 Tx In Tx Out THD – 0.8 1.8 % Maximum Output Voltage (Increase input voltage until output voltage THD = 5.0%, then measure output voltage. Tx Gain Adjust = 8 dB) 1 Tx In Tx Out VOmax –2.0 0 – dBV Input Impedance – – C In Zin – 10 – kΩ Attack Time (Ccap = 0.5 µF, Rfilt = 40 k (See Appendix B)) – C In Tx Out ta – 3.0 – ms Release Time (Ccap = 0.5 µF, Rfilt = 40 k (See Appendix B)) – C In Tx Out tr – 13.5 – ms Expander to Compressor Crosstalk (Vin = –20 dBV, Speaker Amp No Load, V(C In) = AC Gnd)

1 E In Tx Out C T – –60 –40 dB

Tx Muting (Vin – 10 dBV) 1 Tx In Tx Out M c – –88 –60 dB ALC Output Level (ALC enabled) Vin = –10 dBV Vin = –2.5 dBV 1, 87, Tx In Tx Out ALC out –15 –13 –13 –11 –8.0 –6.0 dBV ALC Slope (ALC enabled) 1 Tx In Tx Out Slope 0.1 0.25 0.4 dB/dB Vin = –10 dBv x p Vin = –2.5 dBv ALC Input Dynamic Range – C In Tx Out DR – –16 to –2.5 – dBV Limiter Output Level (Vin = –2.5 dBV, Limiter enabled) 1 Tx In Tx Out Vlim –10 –8.0 – dBV Tx High Frequency Corner [Note 7] (VTx In = –10 dBV, Mic Amp = Unity Gain) 1 Tx In Tx Out Tx fc 3.6 3.7 3.8 kHz NOTE: 7. The filter specification is based on a 10.24 MHz 2nd LO, and a switched–capacitor (SC) filter counter divider ratio of 31. If other 2nd LO frequencies and/or SC filter counter divider ratios are used, the filter corner frequency will be proportional to the resulting SC filter clock frequency.

8 MOTOROLA ANALOG IC DEVICE DATA

ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic UnitMaxTypMinSymbol Measure Pin Input PinFigure Tx AUDIO PATH (fin = 1.0 kHz, Tx Gain Adj = (01111); ALC, Limiter, and Mutes Disabled; Active Mode, scrambler bypassed) Low Pass Filter Passband Ripple (Vin = –10 dBV) 1, 84 Tx In Tx Out Ripple – 0.7 1.2 dB Maximum Compressor Gain (Vin = –70 dBV) – C In Tx Out AV max – 23 – dB Tx Gain Adjust Range (Programmable through MPU Interface) 125 C In Tx Out Tx Range – –9.0 to – dB Tx Gain Adjust Steps – Number of Programmable Levels

125 C In Tx Out Tx n – 20 – –

R x AND Tx SCRAMBLER (2nd LO = 10.24 MHz, Tx Gain Adj = (01111), Rx Gain Adj = (01111), Volume Control = (0 dB Default Levels), SCF Clock Divider = 31. Total is divide by 62 for SCF clock frequency of 165.16 kHz) R x High Frequency Corner (Note 8) R x Path, f = 479 Hz, V Rx Audio In = –20 dBV – R x Audio In Scr Out R x fch 3.55 3.65 3.75 kHz Tx High Frequency Corner (Note 8) Tx Path, f = 300 Hz, V Tx In = –10 dBV, Mic Amp = Unity Gain – Tx In Tx Out Tx fch 3.829 3.879 3.929 kHz Absolute Gain R x: Vin = –20 dBV Tx: Vin = –10 dBV, Limiter disabled R x Audio In Tx In E Out Tx Out AV –4.0 –4.0 0.4 –1.0 4.0 4.0 dB Pass Band Ripple R x + Tx Path – 1.0 µF from Tx Out to R x Audio In, fin = low corner frequency to high corner frequency – C In E Out Ripple – 1.9 2.5 dB Scrambler Modulation Frequency R x: 100 mV (–20 dBV) Tx: 316 mV (–10 dBV) R x Audio In C In E Out Tx Out fmod 4.119 4.129 4.139 kHz Group Delay R x + Tx Path – 1.0 µF from Tx Out to R x Audio In, fin = 1.0 kHz – C In E Out GD – 1.0 – ms x , in fin = low corner frequency to high corner frequency – C In E Out GD – 4.0 – Carrier Breakthrough R x + Tx Path – 1.0 µF from Tx Out to R x Audio In – C In E Out CBT – –60 – dB Baseband Breakthrough R x + Tx Path – 1.0 µF from Tx Out to R x Audio In, fin = 1.0 kHz, fmeas = 3.192 kHz – C In E Out BBT – –50 – dB LOW BATTERY DETECT Average Threshold Voltage Before Electronic Adjustment (Vref_Adj = (0111)) 1, 131 Ref1 Ref2 BD 1 Out BD 2 Out VTi 1.38 1.48 1.58 V Average Threshold Voltage After Electronic Adjustment (Vref_Adj = (adjusted value))

1 Ref1

VT f 1.475 1.5 1.525 V Hysteresis – Ref1 Ref2 BD 1 Out BD 2 Out Hys – 4.0 – mV Input Current (Vin = 1.0 and 2.0 V) 1 – Ref1 Ref2 Iin –50 – 50 nA Output High Voltage (Vin = 2.0 V) 1 Ref1 Ref2 BD 1 Out BD 2 Out VOH VCC – 0.1 3.6 – V NOTE: 8. The filter specification is based on a 10.24 MHz 2nd LO, and a switch–capacitor (SC) filter counter divider ratio of 31. If other 2nd LO frequencies and/or SC filter counter divider ratios are used, the filter corner frequency will be proportional to the resulting SC filter clock frequency.

9MOTOROLA ANALOG IC DEVICE DATA ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic UnitMaxTypMinSymbol Measure Pin Input PinFigure LOW BATTERY DETECT Output Low Voltage (Vin = 1.0 V) 1 Ref1 Ref2 BD 1 Out BD 2 Out VOL – 0.2 0.4 V BATTERY DETECT INTERNAL THRESHOLD After Electronic Adjustment of VB Voltage 1, 128 VCC Audio BD 2 Out V BD Select = (111) CC IBS7 3.381 3.455 3.529 BD Select = (110) IBS6 3.298 3.370 3.442 BD Select = (101) IBS5 3.217 3.287 3.357 BD Select = (100) IBS4 3.134 3.202 3.270 BD Select = (011) IBS3 2.970 3.034 3.098 BD Select = (010) IBS2 2.886 2.948 3.010 BD Select = (001) IBS1 2.802 2.862 2.922 PLL PHASE DETECTOR Output Source Current (VPD = Gnd + 0.5 V to PLL Vref – 0.5 V) – – R x PD Tx PD IOH – 1.0 – mA Output Sink Current (VPD = Gnd + 0.5 V to PLL Vref – 0.5 V) – – R x PD Tx PD IOL – 1.0 – mA PLL LOOP CHARACTERISTICS Maximum 2nd LO Frequency (No Crystal) – LO 2 In – f2ext – 12 – MHz Maximum 2nd LO Frequency (With Crystal) – – LO 2 In LO 2 Out f2ext – 12 – MHz Maximum T x VCO (Input Frequency), Vin = 200 mVpp – – Tx VCO ftxmax – 80 – MHz PLL VOLTAGE REGULATOR Regulated Output Level (IL = 0 mA, after Vref Adjustment) 1 – PLL Vref VO 2.4 2.5 2.6 V Line Regulation (IL = 0 mA, VCC = 3.0 to 5.5 V) 1 VCC Audio PLL Vref VReg Line – 11.8 40 mV Load Regulation (IL = 1.0 mA) 1 VCC Audio PLL Vref VReg Load –20 –1.4 – mV MICROPROCESSOR SERIAL INTERFACE Input Current Low (Vin = 0.3 V, Standby Mode) 1 – Data, Clk, EN IIL –5.0 0.4 – µA Input Current High (Vin = 3.3 V, Standby Mode) 1 – Data, Clk, EN IIH – 1.6 5.0 µA Hysteresis Voltage – – Data, Clk, EN Vhys – 1.0 – V Maximum Clock Frequency – Data, EN, Clk – – – 2.0 – MHz Input Capacitance – Data, Clk, EN – C in – 8.0 – pF EN to Clk Setup Time 106 – EN, Clk tsuEC – 200 – ns Data to Clk Setup Time 105 – Data, Clk tsuDC – 100 – ns Hold Time 105 – Data, Clk th – 90 – ns Recovery Time 106 – EN, Clk trec – 90 – ns Input Pulse Width – – EN, Clk tw – 100 – ns MPU Interface Power–Up Delay (90% of PLL Vref to Data,Clk, EN) 108 – – tpuMPU – 100 – µs

10 MOTOROLA ANALOG IC DEVICE DATA

Figure 1. Production Test Circuit (52 Pin QFP)

10.7 MHz

NOTE: This schematic is only a partial representation of the actual production test circuit.

1 Out

11MOTOROLA ANALOG IC DEVICE DATA ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ Pin ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ E i l I l Ci i (52 Pi QFP) ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ Di i ÁÁÁÁ ÁÁÁÁ LQFP–48 ÁÁÁÁ ÁÁÁÁ QFP–52 ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ

Description

ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ LO 2 In LO 2 Out LO 2 Out LO 2 In PLL Vref PLL Vref100 100 PLL Vref ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ These pins form the PLL reference oscillator when connected to an external parallel–resonant crystal (10.24 MHz typical). The reference oscillator is also the second Local Oscillator (LO2) for the RF receiver. “LO2 In” may also serve as an input for an externally generated reference signal which is typically ac–coupled. When the IC is set to the inactive mode, LO2 In is internally pulled low to disable the oscillator. The input capacitance to ground at each pin (LO2 In/ LO 2 Out) is 3.0 pF. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Vag Vag PLL Vref VCC Audio 30 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Vag is the internal reference voltage for the switched capacitor filter section. This pin must be decoupled with a 0.1 µF capacitor. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ R x PD (Output) PLL Vref PLL Vref ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ This pin is a tri–state voltage output of the Rx and Tx Phase Detector. It is either “high”, “low”, or “high impedance,” depending on the phase difference of the phase detector input signals. During lock, very narrow pulses with a frequency equal to the ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Tx PD (Output) R x PD, Tx PD 4, 615 ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á narrow pulses with a frequency equal to the reference frequency are present. This pin drives the external Rx and Tx PLL loop filters. Rx and Tx PD outputs can sink or source 1.0 mA. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á PLL Vref ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á PLL Vref 132 k VCC Audio ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á PLL Vref is a PLL voltage regulator output pin. An internal voltage regulator provides a stable power supply voltage for the Rx and Tx PLL’s and can also be used as a regulated supply voltage for other IC’s. It can source up to 1.0 mA externally. Proper supply filtering is a must on this pin. PLL Vref is pulled up to VCC audio for the standby and inactive modes (Note 1). ÁÁÁÁ Á ÁÁ Á ÁÁÁÁ Á ÁÁ Á ÁÁÁÁÁ Á ÁÁÁ Á Gnd PLL ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Ground pin for digital PLL section of IC. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Tx VCO (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ TX VCO PLL Vref 1.0 k PLL Vref ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Tx VCO is the transmit divide counter input which is driven by an ac–coupled external transmit loop VCO. The minimum signal level is 200 mVpp @ 60.0 MHz. This pin also functions as the test mode input for the counter tests.

12 MOTOROLA ANALOG IC DEVICE DATA

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION (continued) ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ Pin ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁ ÁÁÁÁ QFP–52 ÁÁÁÁ ÁÁÁÁ LQFP–48 ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Data EN Clk (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Data, EN, Clk 9, 10, 11 VCC Audio 240 PLL Vref 1.0 µA ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Microprocessor serial interface input pins are for programming various counters and control functions. The switching thresholds are referenced to PLL Vref and Gnd PLL. The inputs operate up to VCC . These pins have 1.0 µA internal pull–down currents. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Clk Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Clk Out VCC Audio VCC Audio 1.0 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ The microprocessor clock output is derived from the 2nd LO crystal oscillator and a programmable divider with divide ratios of 2 to 312.5. It can be used to drive a microprocessor and thereby reduce the number of crystals required in the system design. The driver has an internal resistor in series with the output which can be combined with an external capacitor to form a low pass filter to reduce radiated noise on the PCB. This output also functions as the output for the counter test modes. 1) For the MC13110A/B and MC13111A/B the Clk Out can be disabled via the MPU interface. 2) For the MC13110B and MC13111B this output is always active (on) (Note 2). ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ CD Out (I/O) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ CD Comparator CD Out VCC Audio 240 PLL Vref Hardware Interrupt ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Dual function pin; 1) Carrier detect output (open collector with external 100 kΩ pull–up resistor. 2) Hardware interrupt input which can be used to “wake–up” from the Inactive Mode. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ BD 1 Out ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ 14 16 VCC Audio ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Low battery detect output #1 is an open collector with external pull–up resistor. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ BD 2 Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ BD 1 Out BD 2 Out 14, 16 ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Low battery detect output #2 is an open collector with external pull–up resistor. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ DA Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ DA Out VCC Audio VCC Audio 100 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Data amplifier output (open collector with internal 100 kΩ pull–up resistor). ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Tx Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Tx Out VCC Audio VB ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Tx Out is the Tx path audio output. Internally this pin has a low–pass filter circuitry with –3 dB bandwidth of 4.0 kHz. Tx gain and mute are programmable through the MPU interface. This pin is sensitive to load capacitance.

13MOTOROLA ANALOG IC DEVICE DATA ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION (continued) ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ Pin ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁ ÁÁÁÁ QFP–52 ÁÁÁÁ ÁÁÁÁ LQFP–48 ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ C Cap ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ C Cap VCC Audio VCC Audio 40 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ C Cap is the compressor rectifier filter capacitor pin. It is recommended that an external filter capacitor to VCC audio be used. A practical capacitor range is 0.1 to 1.0 µF. 0.47 µF is the recommended value. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ C In (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ C In VCC Audio 12.5 k VB ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ C In is the compressor input. This pin is internally biased and has an input impedance of 12.5 k. C In must be ac–coupled. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Amp Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ VCC Audio VCC Audio ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Microphone amplifier output. The gain is set with external resistors. The feedback resistor should be less than 200 kΩ . ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Tx In (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Amp Out VB Tx In ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Tx In is the Tx path input to the microphone amplifier (Mic Amp). An external resistor is connected to this pin to set the Mic Amp gain and input impedance. Tx In must be ac–coupled, too. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ DA In (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ DA In VCC Audio 250 k 250 k VCC Audio ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ The data amplifier input (DA In) resistance is 250 kΩ and must be ac–coupled. Hysteresis is internally provided. ÁÁÁÁ Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á ÁÁÁÁÁ VCC Audio ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ VCC audio is the supply for the audio section. It is necessary to adequately filter this pin. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á R x Audio In (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á R x Audio In VCC Audio 600 k VB ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á The Rx audio input resistance is 600 kΩ and must be ac–coupled. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Det Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Det Out VCC Audio VCC RF 240 30 µA ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Det Out is the audio output from the FM detector. This pin is dc–coupled from the FM detector and has an output impedance of 1100 Ω .

14 MOTOROLA ANALOG IC DEVICE DATA

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION (continued) ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ Pin ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁ ÁÁÁÁ QFP–52 ÁÁÁÁ ÁÁÁÁ LQFP–48 ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ RSSI ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ VCC Audio 186 k VCC RF VCC RF RSSI ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ RSSI is the receive signal strength indicator. This pin must be filtered through a capacitor to ground. The capacitance value range should be 0.01 to 0.1 µF. This is also the input to the Carrier Detect comparator. An external R to ground shifts the RSSI voltage. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Q Coil ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Q Coil VCC RF VCC RF ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ A quad coil or ceramic discriminator connects this pin as part of the FM demodulator circuit. DC–couple this pin to VCC RF through the quad coil or the external resistor. ÁÁÁÁ Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á ÁÁÁÁÁ VCC RF ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ VCC supply for RF receiver section (1st LO, mixer, limiter, demodulator). Proper supply filtering is needed on this pin too. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Lim Out ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Lim C1 VCC RF VCC RF VCC RF VCC RF 53.5 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ A quad coil or ceramic discriminator are connected to these pins as part of the FM demodulator circuit. A coupling capacitor connects this pin to the quad coil or ceramic discriminator as part of the FM demodulator circuit. This pin can drive coupling capacitors up to 47 pF with no deterioration in performance. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Lim C2 Lim C1 ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Lim Out Lim In Lim C2 52 k 1.5 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ IF amplifier/limiter capacitor pins. These decoupling capacitors should be 0.1 µF. They determine the IF limiter gain and low frequency bandwidth. ÁÁÁÁ Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á ÁÁÁÁÁ Lim In (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Lim C 2 52 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Signal input for IF amplifier/limiter. Signals should be ac–coupled to this pin. The input impedance is 1.5 kΩ at 455 kHz. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ SGnd RF ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ This pin is not connected internally but should be grounded to reduce potential coupling between pins. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Mix2 In (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Mix2 In VCC RF VCC RF 3.0 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Mix2 In is the second mixer input. Signals are to be ac–coupled to this pin, which is biased internally to VCC RF. The input impedance is 2.8 kΩ at 455 kHz. The input impedance can be reduced by connecting an external resistor to VCC RF.

15MOTOROLA ANALOG IC DEVICE DATA ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION (continued) ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ Pin ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁ ÁÁÁÁ QFP–52 ÁÁÁÁ ÁÁÁÁ LQFP–48 ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Mix2 Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Mix2 Out VCC RF VCC RF 1.2 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Mix2 Out is the second mixer output. The second mixer has a 3 dB bandwidth of 2.5 MHz and an output impedance of 1.5 kΩ . The output current drive is 50 µA. ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ Gnd RF ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ Ground pin for RF section of the IC. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Mix1 Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Mix1 Out VCC RF VCC RF 200 ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ The first mixer has a 3 dB IF bandwidth of 13 MHz and an output impedance of 300 Ω . The output current drive is 300 µA and can be programmed for 1.0 mA. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Mix1 In2 (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ VCC RF VCC RF 950 950 Vref 20 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Signals should be ac–coupled to this pin, which is biased internally to VCC – 1.6 V. The single–ended and differential input impedance are about 1.6 and 1.8 kΩ at 46 MHz, respectively. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Mix1 In1 (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Mix1 In2, Mix1 In1 38, 39 950 950 ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ LO 1 In LO 1 Out ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ LO 1 Out LO 1 In ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Tank Elements, an internal varactor and capacitor matrix for 1st LO multivibrator oscillator are connected to these pins. The oscillator is useable up to 80 MHz. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Vcap Ctrl ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Vcap Ctrl VCC RF 55 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Vcap Ctrl is the 1st LO varactor control pin. The voltage at this pin is referenced to Gnd Audio and varies the capacitance between LO1 In and LO 2 Out. An increase in voltage will decrease capacitance. ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ Gnd Audio ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ Ground for audio section of the IC. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ SA Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ VCC Audio SA I VCC Audio ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ The speaker amplifier gain is set with an external feedback resistor. It should be less than 200 kΩ . The speaker amplifier can be muted through the MPU interface. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ SA In (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ SA Out VB SA In ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ An external resistor is connected to the speaker amplifier input (SA In). This will set the gain and input impedance and must be ac–coupled.

16 MOTOROLA ANALOG IC DEVICE DATA

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION (continued) ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ Pin ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁ Equivalent Internal Circuit (52 Pin QFP) ÁÁÁÁÁ ÁÁÁÁÁ Symbol/ Type ÁÁÁÁ ÁÁÁÁ QFP–52 ÁÁÁÁ ÁÁÁÁ LQFP–48 ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ E Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ E Out VCC Audio VB ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ The output level of the expander output is determined by the volume control. Volume control is programmable through the MPU interface. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ E Cap ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ E Cap VCC Audio VCC Audio 40 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ E Cap is the expander rectifier filter capacitor pin. Connect an external filter capacitor between VCC audio and E Cap. The recommended capacitance range is 0.1 to 1.0 µF. 0.47 µF is the suggested value. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ E In (Input) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ E In VCC Audio VB 30 k ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ The expander input pin is internally biased and has input impedance of 30 kΩ . ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Scr Out (Output) ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Scr Out VCC Audio VB ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Scr Out is the Rx audio output. An internal low pass filter has a –3 dB bandwidth of 4.0 kHz. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Ref2 ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ 50, 51 VCC Audio ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Reference voltage input for Low Battery Detect #2. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ Ref1 ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ Ref2, Ref1 ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ Reference voltage input for Low Battery Detect #1. ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁ Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á Á ÁÁ Á ÁÁÁÁ ÁÁÁÁÁ Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á Á ÁÁÁ Á ÁÁÁÁÁ VB ÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁ VB VCC Audio VCC Audio 240 ÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁ VB is the internal half supply analog ground reference. This pin must be filtered with a capacitor to ground. A typical capacitor range of 0.5 to 10 µF is desired to reduce crosstalk and noise. It is important to keep this capacitor value equal to the PLL Vref capacitor due to logic timing (Note 9). ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ NOTE: 9. A capacitor range of 0.5 to 10 µF is recommended. The capacitor value should be the same used on the VB pin (Pin 52). An additional high quality parallel capacitor of 0.01 µF is essential to filter out spikes originating from the PLL logic circuitry.

assume that the data following is a guaranteed parametric. used with either a quadrature coil or ceramic resonator. internal circuit schematic and description of this device. voltage are shown in Figures 9 and 10. generated 1.5 V reference voltage (VB). telephone, the VB internal reference voltage is measured. 12 indicates that the VB voltage is fairly flat over temperature. Figure 2. Internal Low Battery Detect Levels

18 MOTOROLA ANALOG IC DEVICE DATA

Figure 3. Current versus Supply Figure 4. Current versus Supply Figure 5. Current versus Supply Figure 6. Current versus Supply Voltage Figure 7. Current versus Figure 8. Current versus

20 MOTOROLA ANALOG IC DEVICE DATA

10.7 MHz ceramic filter with a source and load impedance of

impedance much greater than 330 Ω . the supply current demand by 1.3 mA. Figure 13. First Mixer Input and Output Impedance Figure 14. First Mixer Output Impedance guaranty a reasonable response. Figure 22. The –3.0 dB bandwidth point is approximately 13 Figure 15. First Mixer Feedthrough Parameters Figure 16. First Mixer Input Impedance over Input Frequency

49 MHz

46 MHz

41 MHz

26 MHz

Note: 11. Single–Ended data is from measured results. Differential data is from simulated results.

22 MOTOROLA ANALOG IC DEVICE DATA

Figure 23. Second Mixer Input and Output Figure 24. Second Mixer Input and Output standard 455 kHz ceramic filters. parameters are summarized in Figure 25. Figure 25. Second Mixer Feedthrough Parameters

24 MOTOROLA ANALOG IC DEVICE DATA

Figure 32. First Local Oscillator Schematic where: Rp = parallel equivalent impedance (Figure 35). inductor (Lext) to choose for best performance in terms of Q. Section for further discussion on LO programmability.

Figure 33. First LO Varicap Capacitance Figure 34. First LO Minimum Required Overall Figure 35. Representative Parallel Impedance Figure 36. Varicap Value at VCV = 1.0 V Figure 37. Control Voltage versus Figure 38. Control Voltage versus

30 MHz

40 MHz

50 MHz

26 MOTOROLA ANALOG IC DEVICE DATA

Figure 39. Second Local Oscillator Schematic Figure 40. Second Local Oscillator output can be added to reduce the drive level, if necessary. Figure 41. Second LO Gain/Phase @ –10 dBm Figure 42. Start–Up Time versus Capacitor

10.24 MHz Crystal

Figure 43. Start–Up Time versus Capacitor Figure 44. Second LO Current Consumption Figure 45. Maximum Open Loop Gain Figure 46. Maximum Allowable Figure 47. Optimum Value for C1 and C2

28 MOTOROLA ANALOG IC DEVICE DATA

the frequency response starts rolling off at 1.0 MHz. Figure 48. IF Limiter Schematic Figure 49. Limiter Input Impedance Figure 50. Quadrature Detector parallel capacitance of the parallel resonant tank circuit. quadrature tank is chosen slightly lower at 15. R ext is increased the detector output slope will decrease. opposite is true for smaller Rext.

30 MOTOROLA ANALOG IC DEVICE DATA

versus RF input. The slope of the curve is 16.5 mV/dB. be found when the signal is decreased. affected. Figure 59 shows this relationship. 0.047 µf capacitor is recommended. Figure 56. Typical RSSI Voltage Figure 57. Carrier Detect Threshold versus Figure 58. RSSI Ripple versus RF Input Level for Figure 59. RSSI Charge Time

1 IN, RF INPUT (dBm)

32 MOTOROLA ANALOG IC DEVICE DATA

Figure 64. Typical Receiver Performance Figure 65. Typical Performance Parameters Figure 66. Typical Performance Parameters Figure 67. Typical Receiver Performance for Figure 68. 12 dB SINAD Sensitivity Over Figure 69. 12 dB SINAD Sensitivity Over

The group delay (Figure 75) has a peak around 6.5 kHz. the signal is attenuated by at least 50 dB. increasing the input level for 2.0% distortion at the outputs. In Figure 70, noise data for the Rx audio path is shown. data at E Out and SA Out is much more improved. signal needs to be ac–coupled, too. Figure 70. Rx Path Noise Data

34 MOTOROLA ANALOG IC DEVICE DATA

Figure 71. Rx Audio Wideband Frequency Response Figure 72. Rx Audio Inband Frequency Response Figure 73. Rx Audio Ripple Response Figure 74. R x Audio Inband Phase Response Figure 75. Rx Audio Inband Group Delay Figure 76. R x Audio Expander Response

36 MOTOROLA ANALOG IC DEVICE DATA

This portion of the audio path goes from “C In” to “Tx Out”. definite above 3800 Hz. This is the filter cutoff frequency. is due to supply voltage limitations. curve continues to increase above –15 dBV up to –4.0 dBV. dBV (100 mVrms) audio levels. Figure 81. Tx Path Noise Data frequency response. The “Tx In” input is ac–coupled.

Figure 82. Tx Audio Wideband Frequency Response Figure 83. T x Audio Inband Frequency Response Figure 84. Tx Audio Ripple Response Figure 85. T x Audio Inband Phase Response Figure 86. Tx Audio Inband Group Delay Figure 87. Tx Audio Compressor Response

0.1 Distortion

38 MOTOROLA ANALOG IC DEVICE DATA

Figure 88. Tx Audio Compressor Response Figure 89. T x Audio Compressor Response Figure 90. Tx Audio Maximum Output Voltage Figure 92. Tx Output Audio Response Figure 93. T x Audio Output Response

40 MOTOROLA ANALOG IC DEVICE DATA

controlled externally by loop filtering. Figure 96. PLL Model The loop filter can take the form of a simple low pass filter. Figure 97. Loop Filter phase margin in this design (Qp in Figure 98). Figure 98. Bode Plot of Gain and

generate higher overshoots on the control line to the VCO. is not really valid. The two input frequencies are not locked. may be found to be somewhat higher. longer it takes for the loop to lock. Figure 99. Varicap Capacitance may be added for additional reference frequency filtering.

42 MOTOROLA ANALOG IC DEVICE DATA

architecture incorporating an additional pole. Figure 100. Loop Filter filter previously described.

44 MOTOROLA ANALOG IC DEVICE DATA

shift register on positive clock transitions. Figure 105. Data and Clock Timing Requirement latched into the appropriate latch register using the “EN” pin. Figure 106. Enable Timing Requirement latch data or an address into a register. Figure 107. Microprocessor Interface saving modes; Inactive, Standby, Rx, and Active Modes. the latch registers in any of the operating modes. Figure 108. Microprocessor Serial

bit must always be the last bit loaded into the shift register. Bits proceeding the register must be “0’s” as shown. number 21 (Channel 6 for previous FCC 10 Channel Band). Figure 109. Microprocessor Interface Data Latch Registers

0 ALC

46 MOTOROLA ANALOG IC DEVICE DATA

Figure 110. Latch Register Power–Up Defaults NOTE: 12. Bits 6 and 7 in the SCF latch register are ”Don’t Cares” for the MC13111A/B since this part does not have a scrambler. there is also an increase in power supply current of 1.3 mA. = <0>. The register bits are shown in Figure 111. R x and Tx loops are generated. All countries except the U.K. require that the Tx and Rx reference frequencies be identical. get a total divider of 4096. Figure 111. Rx and Tx Counter Register Latch Bits Figure 112. Reference Counter Register

Figure 113. Reference Counter Register Programming Mode Figure 114. Reference Frequency and Divider Values

10.24 MHz ÁÁÁÁÁ

10.24 MHz

11.15 MHz

12.00 MHz

Figure 115. Mode Control Register Register is explained in Figures 115 through 119. Figure 116. Mute and Disable Control Bit Descriptions

48 MOTOROLA ANALOG IC DEVICE DATA

each of these operating modes. Figure 117. Power Saving Mode Selection

1. MPU Clock Out is ”Always On”

Figure 118. Circuit Blocks Powered but is not regulated. It will fluctuate with VCC .

1. There is no Inactive mode for MC13110B/MC13111B.

MPU clock frequency and save power in the MPU.

give the MPU adequate time to power down. Interrupt mode. Thereby turning on the MPU Clock Output. mode from Interrupt to Standby, Active, or Rx modes. Figure 119. Power Saving Application – Option 1

50 MOTOROLA ANALOG IC DEVICE DATA

Figure 120. Power Saving Application – Option 2 (MC13110A/MC13111A Only) Delay after MPU selects Inactive Mode to when CD turns off. additional external components. Figure 121. Clock Output Values

5.120 MHz

4.096 MHz

3.413 MHz

2.560 MHz

2.048 MHz

5.575 MHz

4.460 MHz

3.717 MHz

2.788 MHz

2.230 MHz

6.000 MHz

4.800 MHz

4.000 MHz

3.000 MHz

2.400 MHz

52 MOTOROLA ANALOG IC DEVICE DATA

Voltage Gain, Rx Voltage Gain, and Carrier Detect threshold. Figure 124. Gain Control Latch Bits Figure 125. Tx and Rx Gain Control

ground. The internal resistor is 187 kΩ . Figure 126. Carrier Detect Threshold Control

54 MOTOROLA ANALOG IC DEVICE DATA

and the scrambler bypass mode (MC13110A/B only). programmable and non–programmable threshold modes.

1. The power–on default value for this register is <0,0,0> and

Figure 127. Clock Divider/Voltage Adjust Latch Bits Figure 128. Low Battery Detect Threshold Selection NOTE: 17. Nominal Threshold Value is before electronic adjustment. Figure 129. MC13110A/B Bypass Mode Bit Description

Figure 130. Low Battery Detect Equivalent Schematics

56 MOTOROLA ANALOG IC DEVICE DATA

MC13111A/B is powered up (see Figure 131). Figure 131. Bandgap Voltage Reference Adjustment (SCF Clock) = F(2nd LO) / (SCF Divider Value * 2). on the 2nd LO frequency which is chosen in Figure 114. Figure 132. SCF Clock Divider Circuit power–up default SCF Clock divider value is 31. Figure 133. Corner Frequency Programming for 10.240 MHz 2nd LO NOTE: 18. All filter corner frequencies have a tolerance of ±3%.

1. Rx and Tx Upper Corner Frequencies are the same corner frequencies for the MC13110A/B in scrambler bypass

58 MOTOROLA ANALOG IC DEVICE DATA

Figure 137. First Local Oscillator Internal Capacitor Selection

59MOTOROLA ANALOG IC DEVICE DATA OTHER APPLICATIONS INFORMATION PCB Board Lay–Out Considerations The ideal printed circuit board (PCB) lay out would be double–sided with a full ground plane on one side. The ground plane would be divided into separate sections to prevent any audio signal from feeding into the first local oscillator via the ground plane. Leaded components, can likewise, be inserted on the ground plane side to improve shielding and isolation from the circuit side of the PCB. The opposite side of the PCB is typically the circuit side. It has the interconnect traces and surface mount components. In cases where cost allows, it may be beneficial to use multi–layer boards to further improve isolation of components and sensitive sections (i.e. RF and audio). For the CT–0 band, it is also permissible to use single–sided PC layouts, but with continuous full ground fill in and around the components. The proper placement of certain components specified in the application circuit may be very critical. In a lay–out design, these components should be placed before the other less critical components are inserted. It is also imperative that all RF paths be kept as short as possible. Finally, the MC13110A/B and MC13111A/B ground pins should be tied to ground at the pins and VCC pins should have adequate decoupling to ground as close to the IC as possible. In mixed mode systems where digital and RF/Analog circuitry are present, the VCC and VEE buses need to be ac–decoupled and isolated from each other. The design must also take great caution to avoid interference with low level analog circuits. The receiver can be particularly susceptible to interference as they respond to signals of only a few microvolts. Again, be sure to keep the dc supply lines for the digital and analog portions separate. Avoid ground paths carrying common digital and analog currents, as well. Component Selection The evaluation circuit schematics specify particular components that were used to achieve the results shown in the typical curves and tables, but alternate components should give similar results. The MC13110A/B and MC13111A /B IC are capable of matching the sensitivity, IMD, adjacent channel rejection, and other performance criteria of a multi–chip analog cordless telephone system. For the most part, the same external components are used as in the multi–chip solution. VB and PLL Vref VB is an internally generated bandgap voltage. It functions as an ac reference point for the operational amplifiers in the audio section as well as for the battery detect circuitry. This pin needs to be sufficiently filtered to reduce noise and prevent crosstalk between Rx audio to Tx audio signal paths. A practical capacitor range to choose that will minimize crosstalk and noise relative to start up time is 0.5 µf to 10 µf. The start time for a 0.5 µf capacitor is approximately 5.0 ms, while a 10µf capacitor is about 10 ms. The “PLL Vref” pin is the internal supply voltage for the Rx and Tx PLL’s. It is regulated to a nominal 2.5 V. The “VCC Audio” pin is the supply voltage for the internal voltage regulator. Two capacitors with 10 µF and 0.01 µF values must be connected to the “PLL Vref” pin to filter and stabilize this regulated voltage. The “PLL Vref” pin may be used to power other IC’s as long as the total external load current does not exceed 1.0 mA. The tolerance of the regulated voltage is initially ±8.0%, but is improved to ±4.0% after the internal Bandgap voltage reference is adjusted electronically through the MPU serial interface. The voltage regulator is turned off in the Standby and Inactive modes to reduce current drain. In these modes, the “PLL Vref” pin is internally connected to the “VCC Audio” pin (i.e., the power supply voltage is maintained but is now unregulated). It is important to note that the momentary drop in voltage below 2.5 V during this transition may affect initial PLL lock times and also may trigger the reset. To prevent this, the PLL Vref capacitor described above should be kept the same or larger than the VB capacitor, say 10 µf as shown in the evaluation and application diagrams. DC Coupling Choosing the right coupling capacitors for the compander is also critical. The coupling capacitors will have an affect on the audio distortion, especially at lower audio frequencies. A useful capacitor range for the compander timing capacitors is 0.1 µf to 1.0 µf. It is advised to keep the compander capacitors the same value in both the handset and baseset applications. All other dc coupling capacitors in the audio section will form high pass filters. The designer should choose the overall cut off frequency (–3.0 dB) to be around 200 Hz. Designing for lower cut off frequencies may add unnecessary cost and capacitor size to the design, while selecting too high of a cut off frequency may affect audio quality. It is not necessary or advised to design each audio coupling capacitors for the same cut off frequency. Design for the overall system cut off frequency. (Note: Do not expect the application, evaluation, nor production test schematics to necessarily be the correct capacitor selections.) The goals of these boards may be different than the systems approach a designer must consider. For the supply pins (VCC Audio and VCC RF) choose a 10 µf in parallel with a high quality 0.01 µf capacitor. Separation of the these two supply planes is essential, too. This is to prevent interference between the RF and audio sections. It is always a good design practice to add additional coupling on each supply plane to ground as well. The IF limiter capacitors are recommended to be 0.1 µf. Smaller values lower the gain of the limiter stage. The –3.0 dB limiting sensitivity and SINAD may be adversely affected.

60 MOTOROLA ANALOG IC DEVICE DATA

12 Mix Out Lim In2BNC BNC

Figure 138. Evaluation Board Schematic

Figure 139. Evaluation Board Bill of Materials for U.S. and French Application

10.7 MHz FILTER

62 MOTOROLA ANALOG IC DEVICE DATA

0.47 C13R10

0.10 C73

0.047 R32

Figure 140. Basic Cordless Telephone Transceiver Application Circuit

10 Gnd

Figure 140. Basic Cordless Telephone Transceiver Application Circuit (continued)

64 MOTOROLA ANALOG IC DEVICE DATA

APPENDIX C – MEASUREMENT OF COMPANDER ATTACK/DECAY TIME This measurement definition is based on EIA/CCITT recommendations. Compressor Attack Time For a 12 dB step up at the input, attack time is defined as the time for the output to settle to 1.5X of the final steady state value. Compressor Decay Time For a 12 dB step down at the input, decay time is defined as the time for the input to settle to 0.75X of the final steady state value. Decay Time 0.75X Final Value 1.5X Final Value Attack Time 0 mV 0 mV Input Output 12 dB Expander Attack For a 6.0 dB step up at the input, attack time is defined as the time for the output to settle to 0.57X of the final steady state value. Expander Decay For a 6.0 dB step down at the input, decay time is defined as the time for the output to settle to 1.5X of the final steady state value. Decay Time 1.5X Final Value 0.57X Final Value Attack Time 0 mV Input Output 6.0 dB 0 mV

65MOTOROLA ANALOG IC DEVICE DATA FB SUFFIX PLASTIC PACKAGE CASE 848B–04 (QFP–52) ISSUE C OUTLINE DIMENSIONS NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE –H– IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS –A–, –B– AND –D– TO BE DETERMINED AT DATUM PLANE –H–. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE –C–. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE –H–. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. DETAIL A L 40 26 52 14 L –A– B V SA–BM0.20 (0.008) D SH A–B0.05 (0.002) SA–BM0.20 (0.008) D SC –D– B V –B– SA–BM0.20 (0.008) D SH A–B0.05 (0.002) SA–BM0.20 (0.008) D SC –H– 0.10 (0.004) –C– SEATING PLANE DATUM PLANE MG H E C M /C0095 /C0095 DETAIL C U /C0095 Q /C0095 X W KT R DETAIL C DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.90 10.10 0.390 0.398 B 9.90 10.10 0.390 0.398 C 2.10 2.45 0.083 0.096 D 0.22 0.38 0.009 0.015 E 2.00 2.10 0.079 0.083 F 0.22 0.33 0.009 0.013 G 0.65 BSC 0.026 BSC J 0.13 0.23 0.005 0.009 K 0.65 0.95 0.026 0.037 L 7.80 REF 0.307 REF M 5 10 5 10 N 0.13 0.17 0.005 0.007 Q 0 7 0 7 R 0.13 0.30 0.005 0.012 S 12.95 13.45 0.510 0.530 V 12.95 13.45 0.510 0.530 W 0.35 0.45 0.014 0.018 X 1.6 REF 0.063 REF /C0095/C0095/C0095/C0095 /C0095/C0095/C0095/C0095 /C0095/C0095 B B DETAIL A JN D F BASE METAL SECTION B–B SA–BM0.02 (0.008) D SC

66 MOTOROLA ANALOG IC DEVICE DATA

CASE 932–02 (LQFP–48) ISSUE D ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÉÉÉÉ ÉÉÉÉ A –T– Z0.200 (0.008) AB T–U –U– Z0.200 (0.008) AC T–U B 13 24 3748 –Z– S V P AE AE DETAIL Y DETAIL Y BASE METAL N J F D ST–UM0.080 (0.003) Z SAC SECTION AE–AE –AB– –AC– AD G 0.080 (0.003) AC M /C0095 TOP & BOTTOM Q /C0095 W K X EC H 0.250 (0.010) GAUGE PLANE R DETAIL AD DIM A MIN MAX MIN MAX INCHES 7.000 BSC 0.276 BSC MILLIMETERS A1 3.500 BSC 0.138 BSC B 7.000 BSC 0.276 BSC B1 3.500 BSC 0.138 BSC C 1.400 1.600 0.055 0.063 D 0.170 0.270 0.007 0.011 E 1.350 1.450 0.053 0.057 F 0.170 0.230 0.007 0.009 G 0.500 BASIC 0.020 BASIC H 0.050 0.150 0.002 0.006 J 0.090 0.200 0.004 0.008 K 0.500 0.700 0.020 0.028 M 12 REF 12 REF N 0.090 0.160 0.004 0.006 P 0.250 BASIC 0.010 BASIC Q 1 5 1 5 R 0.150 0.250 0.006 0.010 S 9.000 BSC 0.354 BSC S1 4.500 BSC 0.177 BSC V 9.000 BSC 0.354 BSC V1 4.500 BSC 0.177 BSC W 0.200 REF 0.008 REF X 1.000 REF 0.039 REF NOTES:

1 DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER.

3 DATUM PLANE –AB– IS LOCATED AT BOTTOM OF

LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE.

4 DATUMS –T–, –U–, AND –Z– TO BE DETERMINED

AT DATUM PLANE –AB–.

5 DIMENSIONS S AND V TO BE DETERMINED AT

SEATING PLANE –AC–.

6 DIMENSIONS A AND B DO NOT INCLUDE MOLD

PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE –AB–.

7 DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.350 (0.014).

8 MINIMUM SOLDER PLATE THICKNESS SHALL BE

0.0076 (0.0003). 9 EXACT SHAPE OF EACH CORNER IS OPTIONAL. /C0095/C0095 /C0095/C0095/C0095/C0095 OUTLINE DIMENSIONS

67MOTOROLA ANALOG IC DEVICE DATA Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

68 MOTOROLA ANALOG IC DEVICE DATA

Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;JAPAN : Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1, P.O. Box 5405, Denver, Colorado 80217. 1–303–675–2140 or 1–800–441–2447 Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488 Customer Focus Center: 1–800–521–6274 Motorola Fax Back System – US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 – http://sps.motorola.com/mfax/ HOME PAGE : http://motorola.com/sps/ MC13110A/D