MBC13720NT1 FREESCALE | Alldatasheet
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© Freescale Semiconductor, Inc., 2005–2011. All rights reserved. Freescale Semiconductor Data Sheet: Technical Data Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Document Number: MBC13720 Rev. 4, 09/2011 MBC13720
Package Information
(SOT-363)
Ordering Information
1 Refer to Table 1. 20N SOT -363
1 Introduction
The MBC13720 is a high IP3, low noise amplifier designed for 400 MHz to 2.4 GHz multi-standard wireless applications. The input and output match is external to allow maximum design flexibility. The LNA has two selectable current settings as well as a standby mode. The LNA operates from a 2.5 to 3.0 V supply. The MBC13720 is fabricated using an advanced RF BiCMOS process with the SiGe:C option and is housed in an ultra small SOT-363 surface mount package.
1.1 Features
- Selectable current, 5.0 mA or 11 mA Standby mode to turn off device completely High Input IP3: 10 dBm @ 1.9 GHz 13 dBm @ 2.4 GHz Low Noise Figure: 1.38 dB @ 1.9 GHz 1.55 dB @ 2.4 GHz MBC13720 SiGe:C Low Noise Amplifier with Bypass Switch
Contents
MBC13720 Technical Data, Rev. 4
2 Freescale Semiconductor
Gain @ 9.0 mA, 2.75 V: 14.5 dB @ 1.9 GHz 12 dB @ 2.4 GHz Suitable for use from 400 MHz to 2.4 GHz Bias stabilized for device and temperature variations Ultra small SOT-363 surface mount package Available only in tape and reel packaging Available only in a lead free versi on (device number MBC13720NT1) (Refer to Table 1.)Figure 1. Pin Connections
2 Ordering Information
Table 1 provides additional details on MBC13720 orderable parts. Table 1. Orderable Parts Details
3 Electrical Specifications
- Maximum Ratings are those values beyond which damage to the device
Recommended Operating Conditions and Electrical Characteristics tables.
- ESD (electrostatic discharge) immunity meets Human Body Model
(HBM) ≤ 550V all pins. Charge Device Model (CDM) ≤ 50V all pins. Table 2. Maximum Ratings Table 3. Recommended Operating Conditions Table 4. Electrical Characteristics Measured in Frequency Specific Tuned Circuits
4 Freescale Semiconductor
900 MHz
1.9 GHz
2.4 GHz
Table 4. Electrical Characteristics Measured in Frequency Specific Tuned Circuits (continued)
Table 5. Truth Table CC voltage. Logic state of “low” equals ground potential.
6 Freescale Semiconductor
4 Parameters
Table 6. High IP3 Mode 25°C Scattering Parameters
Table 7. High IP3 Mode 85°C Scattering Parameters
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Table 8. High IP3 Mode -40°C Scattering Parameters
Table 9. Low IP3 Mode 25°C Scattering Parameters
10 Freescale Semiconductor
Table 10. Low IP3 Mode 85°C Scattering Parameters
Table 11. Low IP3 Mode -40°C Scattering Parameters
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Table 12. Bypass Mode 25°C Scattering Parameters
Table 13. Standby Mode 25°C Scattering Parameters
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Table 14. Low IP3 Noise Parameters Table 15. High IP3 Noise Parameters
Figure 2. Noise Figure vs Temperature (Low IP3 Mode) Table 15. High IP3 Noise Parameters (continued)
16 Freescale Semiconductor
Figure 3. Noise Figure vs Temperature (High IP3 Mode) Figure 4. Icc vs Vcc Over Temperature (Low IP3 Mode) Figure 5. Icc vs Vcc Over Temperature (High IP3 Mode)
Application Information
MBC13720 Technical Data, Rev. 4 Freescale Semiconductor 17
5 Application Information
The MBC13720 SiGe:C LNA is designed for applications in the 400 MHz to 2.4 GHz range. It has four different modes: Low IP3, High IP3, Bypass, and Standby. The IC is programmable through the Enable 1 and Enable 2 pins. In Low IP3 mode, current consumption is optimized. Current consumption is higher in High IP3 mode to boost the intercept point performance. The gain difference between Low IP3 and High IP3 modes is typically 1.0 dB; and typically the Low IP3 mode has a slightly better noise figure performance. The internal bypass switch is designed for broadband applications. One of the advantages of the MBC13720 is the simplification of the matching network in both bypass and amplifier modes. The bypass switch is designed so that changes of input and output return losses between bypass mode and amplifier mode are minimized. As a result, the mismatch at the LNA input and output is minimized and the matching network design is simplified. In the design of the external matching network, conjugate matching does not necessarily provide the best noise figure performance. Balancing between noise figure, gain, and intercept point is the major design consideration. Figure 6 shows the typical application circuit at 1.9 and 2.4 GHz. The noise figure, input intercept point, gain, and return losses are optimized. L1 and C2 act as a low frequency trap to improve the input intercept point. In Figure 7, the typical application circuit for 900 MHz is shown. The input low frequency trap again is used to maximize the input intercept point. It has moderate IP3 performance and high gain. Figure 8 shows the 900 MHz application circuit with feedback network for higher IP3. Capacitive feedback is used to increase the third order input intercept point while decreasing gain and provides unconditional stability. The corresponding PCBs are shown in Figure 9 through Figure 11. Table 16 lists the bill of materials for the 1900 MHz, 900 MHz, and High IP3 900 MHz application circuits. Typical characteristics of the application boards are shown in Table 17. Figure 6. Typical 1.9 and 2.4 GHz LNA Application Schematic
MBC13720 Technical Data, Rev. 4
18 Freescale Semiconductor
Figure 7. Typical 900 MHz LNA Application Schematic Figure 8. High IP3 900 MHz LNA Application Schematic Table 16. Bill of Materials for the Application Circuits1
1900 MHz Figure 6 Application Circuit
MBC13720 Technical Data, Rev. 4 Freescale Semiconductor 19 Q1 MBC13720 SOT363 Freescale Freescale SiGe LNA
900 MHz Figure 7 Application Circuit
C1 47 pF 0402 Murata DC Block, Input match C2 0.1 uF 0603 Murata Low freq bypass C3 3.0 pF 0402 Murata DC block, Output match C4 47 pF 0402 Murata 900 MHz short C5 0.1 uF 0603 Murata Low freq bypass L1 2.2 nH 0402 Toko Input match L2 27 nH 0402 Toko Input match L3 8.2 nH 0402 Toko Output match, bias decouple R1 330 ohm 0402 KOA Bias R2 5 ohm 0402 KOA Stability Q1 MBC13720 SOT363 Freescale Freescale SiGe LNA High IP3 900 MHz Figure 8 Application Circuit C1 150 pF 402 Murata DC Block, Input match C2 0.1 uF 0603 Murata Low freq bypass C3 0.5 pF 402 Murata IP3 improvement C4 0.5 pF 402 Murata IP3 improvement C5 1.0 pF 402 Murata RF bypass C6 3.3 pF 402 Murata Output match C7 0.1 uF 0603 Murata Low freq bypass C8 47 pF 0402 Murata RF Bypass L1 22 nH 402 Toko Input match L2 6.8 nH 402 Toko DC feed, output match R1 330 ohm 402 KOA Bias R2 10 ohm 402 KOA Stability Q1 MBC13720 SOT363 Freescale Freescale SiGe LNA 1 All components are RoHS compliant. Table 16. Bill of Materials for the Application Circuits1 (continued)
MBC13720 Technical Data, Rev. 4
20 Freescale Semiconductor
Figure 9. 1.9/2.4 GHz Assembly Diagram Figure 10. 900 MHz Assembly Diagram
MBC13720 Technical Data, Rev. 4 Freescale Semiconductor 21 Figure 11. 900 MHz Capacitive Feedback Assembly Diagram Table 17. Typical Electrical Characteristics of the Application Circuits
900 MHz TYPICAL (See Figure 7)
900 MHz HIGH IP3 (See Figure 8)
MBC13720 Technical Data, Rev. 4
22 Freescale Semiconductor
1.9 GHz (See Figure 6)
Gain G 14 13 -2.5 -16 dB Noise Figure NF 1.5 1.4 2.5 — dB Input Intermodulation Intercept Point IIP3 10 4.0 29 — dBm Output Intermodulation Intercept Point OIP3 24.4 17 26.5 — dBm Output 1dB Compression Point P 1dB 11.5 11 5.0 — dBm Input Return Loss |S 11|2 10 8.0 20 — dB Output Return Loss |S 22|2 8.0 7.0 30 — dB Reverse Isolation |S 12|2 19 19 2.5 16 dB
2.4 GHz (See Figure 6)
Gain G 12 11 -2.8 -15 dB Noise Figure NF 1.7 1.55 2.8 — dB Input Intermodulation Intercept Point IIP3 13 6.0 25 — dBm Output Intermodulation Intercept Point OIP3 25 17.5 22 — dBm Output 1dB Compression Point P 1dB 14 14 5.0 — dBm Input Return Loss |S 11|2 12 10 12 — dB Output Return Loss |S 22|2 8.0 7.0 14 — dB Reverse Isolation |S 12|2 17 17 2.8 15 dB Table 17. Typical Electrical Characteristics of the Application Circuits (continued)
6 Packaging
Figure 12. Outline Dimensions for SOT-363 (Case Outline 419B-01, Issue G)
7 Product Documentation
This data sheet is labeled as a particular type: Product Preview, Advance Information, or Technical Data. Definitions of these types are available at: http://www.freescale.com on the documentation page. Table 18 summarizes revisions to this document since the previous release (Rev. 3.5). Table 18. Revision History Section 3, “Electrical Specifications Added Note about Maximum ratings and ESD specifications.
- DIMENSIONING AND TOLERANCING PER ANSI
- CONTROLLING DIMENSION: INCH.
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