MB89130_01 FUJITSU | Alldatasheet

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DS07-12510-10EFUJITSU SEMICONDUCTOR DATA SHEET 8-bit Proprietary Microcontroller CMOS F2MC-8L MB89130/130A Series MB89131/P131/133A/P133A/135A/ MB89P135A/PV130A nnnn DESCRIPTION The MB89130/130A series has been developed as a general-purpose version of the F2MC*-8L family consisting of proprietary 8-bit, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers contain a great variety of peripheral functions such as timers, a serial interface, an A/D converter, and external interrupts. The MB89130A series also include a remote control transmitting output and wake-up interrupt function. * : F 2MC stands for FUJITSU Flexible Microcontroller. nnnn FEATURES

  • F 2MC-8L family CPU core
  • Low-voltage operation (when an A/D converter is not used)
  • Low current consumption (applicable to the dual-clock system)
  • Minimum execution time : 0.95 ms at 4.2 MHz
  • 21-bit timebase timer
  • I/O ports : max. 36 ports
  • External interrupt 1 : 3 channels
  • External interrupt 2 (wake-up function) : 8 channels (only for the MB89130A series)
  • 8-bit serial I/O : 1 channel (Continued) nnnn PACKAGE 48-pin plastic QFP 48-pin plastic SH-DIP 48-pin ceramic MQFP (FPT-48P-M13) (DIP-48P-M01) (MQP-48C-P01)

(Continued)

  • 8/16-bit timer/counter : 1 channel
  • 8-bit A/D converter : 4 channels
  • Remote control transmitting frequency generator (for the MB89130A series only)
  • Low-power consumption modes (stop, sleep, and watch mode)
  • QFP-48 package, SH-DIP-48 package
  • C M O S t e c h n o l o g y
  • : Varies with conditions such as the operating frequency. (See “n ELECTRICAL CHARACTERISTICS”.) (Continued) Part number MB89131 MB89133A MB89135A MB89P133A MB89P131Item Classification Mass-produced products (mask ROM products) One-time PROM products ROM size

4 K · 8 bits

(internal mask ROM)

8 K · 8 bits

(internal mask ROM)

16 K · 8 bits

(internal mask ROM) (internal PROM, to be programmed with general- purpose EPROM programmer) (internal PROM, to be programmed with general- purpose EPROM programmer) RAM size 128 · 8 bits 256 · 8 bits 128 · 8 bits CPU functions The number of instructions : Instruction bit length : Instruction length : Data bit length : Minimum execution time : Minimum interrupt processing time : 136 8 bits 1 to 3 bytes 1, 8, 16 bits 0.95 ms at 4.2 MHz 8.57 ms at 4.2 MHz Ports Output ports (N-ch open-drain ports) : Output ports (CMOS) : I/O ports (CMOS) : Total : 4 (All also serve as peripherals.) 24 (8 ports also serve as peripherals. For MB89130A, 16 ports also serve as.) 8/16-bit timer/ counter 8-bit timer/counter · 2 channels or a 16-bit event counter 8-bit serial I/O 8 bits LSB/MSB first selectable 8-bit A/D converter 8-bit resolution · 4 channels A/D conversion mode (minimum conversion time : 42 ms at 4.2 MHz) Sense mode (minimum conversion time : 11.4 ms at 4.2 MHz) Capable of continuous activation by an internal timer Reference voltage input External interrupt 1 3 independent channels (edge selection, interrupt vector, source flag) Rising/falling both edges selectable Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in the stop mode.) External interrupt 2 (wake-up function) ¾ 8 channels (only for level detection) ¾ Remote control transmitting gener- ator ¾ 1 channel (Pulse width and cycle selectable by program) ¾ Standby mode Sleep, stop, and clock mode Process CMOS Operating voltage*2.2 to 4.0 V (with the dual-clock option) 2.2 to 6.0 V (with the single-clock option) 2.7 V to 6.0 V

(Continued) Part number MB89P135 MB89PV130A Item Classification One-time PROM products Piggyback/evaluation product ROM size (internal PROM, to be programmed with general-purpose EPROM programmer)

32 K · 8 bits

(external ROM) RAM size 512 · 8 bits 1 K · 8 bits CPU functions The number of instructions Instruction bit length Instruction length Data bit length Minimum execution time Minimum interrupt processing time : 136 : 8 bits : 1 to 3 bytes : 1, 8, 16 bits : 0.95 ms at 4.2 MHz : 8.57 ms at 4.2 MHz Ports Output ports (N-ch open-drain ports) Output ports (CMOS) I/O ports (CMOS) Total : 4 (All also serve as peripherals.) : 8 : 24 (8 ports also serve as peripherals. For MB89130A, 16 ports also serve as peripherals.) : 36 8/16-bit timer/ counter 8-bit timer/counter · 2 channels or a 16-bit event counter 8-bit serial I/O 8 bits LSB/MSB first selectable 8-bit A/D converter 8-bit resolution · 4 channels A/D conversion mode (minimum conversion time : 42 ms at 4.2 MHz) Sense mode (minimum conversion time : 11.4 ms at 4.2 MHz) Capable of continuous activation by an internal timer Reference voltage input External interrupt 1 3 independent channels (selectable edge, interrupt vector, source flag) Rising/falling both edges selectable Used also for wake-up from the stop/sleep mode. (Edge detection is also permitted in the stop mode.) External interrupt 2 (wake-up function) 8 channels (only for level detection) Remote control transmitting frequency generator 1 channel (Pulse width and cycle selectable by program) Standby mode Sleep, stop, and clock mode Process CMOS Operating voltage 2.7 V to 6.0 V 2.7 V to 6.0 V EPROM for use ¾ MBM27C256A-20TVM

nnnn PACKAGE AND CORRESPONDING PRODUCTS : Available, : Not available nnnn DIFFERENCES AMONG PRODUCTS 1. Memory Size Before evaluating using the OTPROM (one-time PROM) products, verify its differences from the product that will actually be used. T ake particular care on the following points :

  • The number of register banks available is different among the MB89131, MB89133A/135A and MB89P135A/ PV130A.
  • The stack area, etc., is set at the upper limit of the RAM. 2. Current Consumption
  • When operated at low speed, the product with an OTPROM will consume more current than the product with a mask ROM. However, the same is current consumption in sleep/stop modes. (For more information, see “n ELECTRICAL CHARACTERISTICS”.)
  • In the case of the MB89PV130A, added is the current consumed by the EPROM which is connected to the top socket. 3. Mask Options Functions that can be selected as options and how to designate these options vary with product. Before using options, check “n MASK OPITONS”. T ake particular care on the following point :
  • P40 to P43 must be set to no pull-up resistor when an A/D converter is used.
  • For MB89P135A, pull-up resistor option cannot be set for P40 to P43.
  • Each option is fixed on the MB89PV130A. FPT-48P-M13 DIP-48P-M01 MQP-48C-P01 FPT-48P-M13 DIP-48P-M01 MQP-48C-P01
  • · ·

(Continued) AV CC RST MOD0 MOD1 V CC X0A X1A P27 P26 P25 P36/INT2 P37/BZ/(RCO) P00/(INT20) P01/(INT21) P02/(INT22) P03/(INT23) P04/(INT24) P05/(INT25) P06/(INT26) P07/(INT27) P10 P11 P40/AN0 P41/AN1 P42/AN2 P43/AN3 AVR AV SS P30/SCK P31/SO P32/SI P33/EC/SCO P34/TO/INT0 P35/INT1 P24 P23 P22 P21 P20 P17 V SS P16 P15 P14 P13 P12 (TOP VIEW) (FPT-48P-M13) Note : Parenthesized function is available only for the MB89130A series.

(Continued) P17 P20 P21 P22 P23 P24 P25 P26 P27 X1A X0A V CC MOD1 MOD0 RST AV CC P40/AN0 P41/AN1 P42/AN2 P43/AN3 AVR AV SS VSS P16 P15 P14 P13 P12 P11 P10 P07/(INT27) P06/(INT26) P05/(INT25) P04/(INT24) P03/(INT23) P02/(INT22) P01/(INT21) P00/(INT20) P37/BZ/(RCO) P36/INT2 P35/INT1 P34/TO/INT0 P33/EC/SCO P32/SI P31/SO P30/SCK (TOP VIEW) (DIP-48P-M01) Note : Parenthesized function is available only for the MB89130A series.

(Continued) AV CC RST MOD0 MOD1 V CC X0A X1A P27 P26 P25 P36/INT2 P37/BZ/(RCO) P00/INT20 P01/INT21 P02/INT22 P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P10 P11 P40/AN0 P41/AN1 P42/AN2 P43/AN3 AVR AV SS P30/SCK P31/SO P32/SI P33/EC/SCO P34/TO/INT0 P35/INT1 P24 P23 P22 P21 P20 P17 V SS P16 P15 P14 P13 P12 (TOP VIEW) (MQP-48C-P01)

  • Pin assignment on package top N.C. : Internally connected. Do not use. Pin no. Pin name Pin no. Pin name Pin no. Pin name Pin no. Pin name 49 V PP 57 N.C. 65 O4 73 OE 5 0 A 1 2 5 8A 26 6O 57 4 N . C .

51 A7 59 A1 67 O6 75 A11

52 A6 60 A0 68 O7 76 A9

53 A5 61 O1 69 O8 77 A8

54 A4 62 O2 70 CE

78 A13

55 A3 63 O3 71 A10 79 A14

56 N.C. 64 V SS 72 N.C. 80 V CC

*1 : DIP-48P-M01 *2 : FPT-48P-M13 (Continued) Pin no. Pin name Circuit type Function SH-DIP*1 QFP *2 35 5 X0 A Main clock crystal oscillator pins (max. 4.2 MHz) 36 6 X1 38 8 X0A B Subclock crystal oscillator pins (32.768 kHz) 39 9 X1A 33 3 MOD0 C Operation mode selecting pins Connect directly to VSS .34 4 MOD1 32 2 RST D Reset I/O pin This pin is of N-ch open-drain output type with pull-up re- sistor, and a hysteresis input type. The internal circuit is initialized by the input of “L”. “L” is output from this pin by an internal reset source as a option. 16 to 9 34 to 27 P00 (INT20 to P07 (INT27) I General-purpose I/O ports On the MB89130A series, these ports also serve as an ex- ternal interrupt input. External interrupt inputs are of hysteresis input type. 8 to 2, 48 26 to 20, 18 P10 to P17 E General-purpose I/O ports 47 to 40 17 to 10 P20 to P27 G General-purpose output ports 24 42 P30/SCK F General-purpose I/O port Also serves as the clock I/O for the 8-bit serial I/O. This port is of hysteresis input type. 23 41 P31/SO F General-purpose I/O port Also serves as a 8-bit serial I/O data output. This port is of hysteresis input type. 22 40 P32/SI F General-purpose I/O port Also serves as a 8-bit serial I/O data input. This port is of hysteresis input type. 21 39 P33/EC/SCO F General-purpose I/O port Also serves as the external clock input for the 8-bit timer/counter. This port is of hysteresis input type. The system clock output is provided as an option. 20 38 P34/TO/INT0 F General-purpose I/O port Also serve as the overflow output for the 8-bit timer/ counter and an external interrupt input. This port is of hys- teresis input type. 19, 37, P35/INT1, P36/INT2 F General-purpose I/O ports Also serves as an external interrupt input. These ports are of hysteresis input type.

(Continued) *1 : DIP-48P-M01 *2 : FPT-48P-M13 Pin no. Pin name Circuit type Function SH-DIP*1 QFP *2 17 35 P37/BZ/ (RCO) F General-purpose I/O port Also serves as a buzzer output. This port is of hysteresis input type. On the MB89130A series, this port also serves as a remote control output. 30 to 27 48 to 45 P40/AN0 to P43/AN3 H N-ch open-drain output ports Also serve as an analog input for the A/D converter. 37 7 V CC ¾ Power supply pin 11 9 V SS ¾ Power supply (GND) pin 31 1 AV CC ¾ A/D converter power supply pin Use this pin at the same voltage as VCC. 26 44 AVR ¾ A/D converter reference voltage input pin 25 43 AV SS ¾ A/D converter power supply pin Use this pin at the same voltage as VSS.

  • External EPROM pins (MB89PV130A only ) Pin no. Pin name I/O Function

49 V PP O “H” level output pin

SS O Power supply (GND) pin I Data input pins 70 CE O ROM chip enable pin Outputs “H” during standby.

71 A10 O Address output pin

73 OE O ROM output enable pin

Outputs “L” at all times. A11 A13 A14 O Address output pins 80 V CC O EPROM power supply pin N.C. ¾ Internally connected pins Be sure to leave them open.

(Continued) Type Circuit Remarks A

  • Crystal or ceramic oscillation type (main clock) Circuit for the MB89P133A/P131/P135A/PV130A External clock input selecting versions of MB89131/ 133A/135A Oscillation feedback resistor of approximately

1 MW /5 V

  • Crystal or ceramic oscillation type (main clock) Crystal or ceramic oscillation selecting versions of MB89131/133A/135A Oscillation feedback resistor of approximately

B

  • Crystal and ceramic oscillation type (subclock) Circuit for the MB89131/133A/135A Oscillation feedback resistor of approximately

4.5 MW /5 V

  • Crystal and ceramic oscillation type (subclock) Circuit for the MB89P131/P133A/P135A/PV130A Oscillation feedback resistor of approximately

C D

  • Output pull-up resistor (P-ch) of approximately 50 kW /5 V
  • Hysteresis input Standby control signal Standby control signal X1A X0A Standby control signal X0A Standby control signal X1A R P-ch N-ch

(Continued) Type Circuit Remarks E

  • CMOS output
  • CMOS input
  • Pull-up resistor optional F
  • CMOS output
  • Hysteresis input
  • Pull-up resistor optional G
  • CMOS output H
  • N-ch open-drain output
  • Analog input
  • Pull-up resistor optional I
  • CMOS output
  • CMOS input
  • The interrupt input is a hysteresis input (available only for the MB89130A series) .
  • Pull-up resistor optional P-ch N-ch R P-ch N-ch R P-ch N-ch N-ch Analog input R P-ch P-ch N-ch Interrupt input Only for MB89130A series P-ch
  1. Preventing Latchup Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins other than medium- and high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum Ratings” in “n Electrical Characteristics” is applied between V CC and VSS . When latchup occurs, power supply current increases rapidly and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital power supply (VCC ) when the analog system power supply is turned on and off. 2. Treatment of Unused Input Pins Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down resistor. 3. Treatment of Power Supply Pins on Microcontrollers with A/D Converter Connect to be AVCC = VCC and AVSS = AVR = VSS even if the A/D converter are not in use. 4. Treatment of N.C. Pins Be sure to leave (internally connected) N.C. pins open. 5. Power Supply Voltage Fluctuations Although operation is assured within the rated range of VCC power supply voltage, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore important. As stabilization guidelines, it is recommended to control power so that V CC ripple fluctu- ations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched. 6. Precautions when Using an External Clock When an external clock is used, oscillation stabilization time is required even for power-on reset (optional) and wake-up from stop mode. 7. Turning on the supply voltage (only for the MB89P135A) Power on sharply up to the option enabling voltage (2 V) within 13 clock cycles after starting of oscillation.

nnnn PROGRAMMING TO THE EPROM ON THE MB89P131 The MB89P131 is an OTPROM version of the MB89131. 1. Features

  • 4-Kbyte PROM on chip
  • Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer) 2. Memory Space Memory space in EPROM mode is diagrammed below. 3. Programming to the EPROM In EPROM mode, the MB89P131 functions equivalent to the MBM27C256A. This allows the PROM to be programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter.
  • Programming procedure (1) Set the EPROM programmer for the MBM27C256A. (2) Load program data into the EPROM programmer at 7000 H to 7FFFH (note that addresses F000H to FFFFH while operating as a single chip correspond to 7000H to 7FFFH in EPROM mode) . (3) Program with the EPROM programmer. 0000H 0080H 00C0 H F000H FFFF H I/O RAM Not available PROM 4 KB 7000H 7FFF H Not available EPROM 4 KB 0000H Single chip EPROM mode (Corresponding addresses on the EPROM programmer) Not available Address 0140H

nnnn PROGRAMMING TO THE EPROM ON THE MB89P133A The MB89P133A is an OTPROM version of the MP89133A. 1. Features

  • 8-Kbyte PROM on chip
  • Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer) 2. Memory Space Memory space in EPROM mode is diagrammed below. 3. Programming to the EPROM In EPROM mode, the MB89P133A functions equivalent to the MBM27C256A. This allows the PROM to be programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter.
  • Programming procedure (1) Set the EPROM programmer for the MBM27C256A. (2) Load program data into the EPROM programmer at 6000 H to 7FFFH (note that addresses E000H to FFFFH while operating as a single chip correspond to 6000H to 7FFFH in EPROM mode) . (3) Program with the EPROM programmer. 0000H 0080H E000H FFFF H I/O RAM Not available PROM 8 KB 6000H 7FFF H Not available EPROM 8 KB 0000H EPROM mode (Corresponding addresses on the EPROM programmer) Single chipAddress 0180H

nnnn PROGRAMMING TO THE EPROM ON THE MB89P135A The MB89P135A is an OTPROM version of the MB89133A/135A. 1. Features

  • 16-Kbyte PROM on chip
  • Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer) 2. Memory Space Memory space in EPROM mode is diagrammed below. 3. Programming to the EPROM In EPROM mode, the MB89P135A functions equivalent to the MBM27C256A. This allows the PROM to be programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter.
  • Programming procedure (1) Set the EPROM programmer for the MBM27C256A. (2) Load program data into the EPROM programmer at 4000 H to 7FFFH (note that addresses C000H to FFFFH while operating as a single chip correspond to 4000H to 7FFFH in EPROM mode) . (3) Load option data into the EPROM programmer at 3FF0H to 3FF6H . (4) Program with the EPROM programmer. 0000H 0080H BFF6 H BFF0 H C000 H FFFF H I/O RAM Not available Not available Not available Not available PROM 16 KB EPROM mode (Corresponding addresses on the EPROM programmer) Single chipAddress 0280H 8000H Vacancy (Read value FFH ) Vacancy (Read value FFH ) Option area EPROM 16 KB 0000H 3FF6H 7FFF H 3FF0H 4000H
  1. Setting OTPROM Options (MB89P135A Only) The programming procedure is the same as that for the PROM. Options can be set by programming values at the addresses shown on the memory map. The relationship between bits and options is shown on the following bit map :
  • OTPROM option bit map Note : Each bit is set to ‘1’ as the initialized value, therefore the pull-up option is selected. Ad- dress Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 3FF0 H Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Clock mode selection 1 : Single clock 0 : Dual clock Reset pin output 1 : Yes 0 : No Power-on reset 1 : Yes 0 : No Oscillation stabilization time 00 : 2 2/FCH 01 : 212/FCH 10 : 216/FCH 11 : 218/FCH 3FF1H P07 Pull-up 1 : Yes 0 : No P06 Pul-up 1 : Yes 0 : No P05 Pull-up 1 : Yes 0 : No P04 Pull-up 1 : Yes 0 : No P03 Pull-up 1 : Yes 0 : No P02 Pull-up 1 : Yes 0 : No P01 Pull-up 1 : Yes 0 : No P00 Pull-up 1 : Yes 0 : No 3FF2 H P17 Pull-up 1 : No 0 : Yes P16 Pull-up 1 : No 0 : Yes P15 Pull-up 1 : Yes 0 : No P14 Pull-up 1 : Yes 0 : No P13 Pull-up 1 : Yes 0 : No P12 Pull-up 1 : Yes 0 : No P11 Pull-up 1 : Yes 0 : No P10 Pull-up 1 : Yes 0 : No 3FF3 H P37 Pull-up 1 : Yes 0 : No P36 Pull-up 1 : Yes 0 : No P35 Pull-up 1 : Yes 0 : No P34 Pull-up 1 : Yes 0 : No P33 Pull-up 1 : Yes 0 : No P32 Pull-up 1 : Yes 0 : No P31 Pull-up 1 : Yes 0 : No P30 Pull-up 1 : Yes 0 : No 3FF4 H Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable 3FF5 H Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable 3FF6 H Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable

nnnn HANDLING THE MB89P131/P133A/P135A 1. Recommended Screening Conditions High-temperature aging is recommended as the pre-assembly screening procedure. 2. Programming Yield Due to its nature, bit programming test can’t be conducted as Fujitsu delivery test. For this reason, a programming yield of 100% cannot be assured at all times. 3. EPROM Programmer Socket Adapter Inquiry : Sun Hayato Co., Ltd. : TEL (81) -3-3986-0403 FAX (81) -3-5396-9106 Part no. Package Compatible socket adapter Sun Hayato Co., Ltd. MB89P131PF QFP-48 ROM-48QF2-28DP-8L MB89P133APFM MB89P133AP SH-DIP-48 ROM-48SD-28DP-8L2 Program, verify Aging +150 °C, 48 h Data verification Assembly

nnnn PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE 1. EPROM for Use MBM27C256A-20TVM 2. Programming Socket Adapter T o program to the PROM using an EPROM programmer, use the socket adapter (manufacturer : Sun Hayato Co., Ltd.) listed below : Inquiry : Sun Hayato Co., Ltd. : TEL (81) -3-3986-0403 FAX (81) -3-5396-9106 3. Memory Space Memory space in each mode, such as 32-Kbyte PROM is diagrammed below. 4. Programming to the EPROM Package Socket adapter part number LCC-32 (Square) ROM-32LC-28DP-S (1) Set the EPROM programmer for the MBM27C256A. (2) Load program data into the EPROM programmer at 0000H to 7FFFH . (3) Program with the EPROM programmer. PROM 32 KB FFFF H 0000 H 8000 H 0080 H 0480 H Single chip I/O RAM Not available 7FFF H 0000 H EPROM 32 KB Corresponding addresses on the EPROM programmerAddress

Main clock oscillator Timebase timer External interrupt 2* (wake-up function) CMOS I/O port CMOS output port Ports 0 and 1 F2MC-8L RAM MOD0, MOD1, V CC , VSS The other pins RST P00/ (INT20) ROM 8-bit serial I/O Buzzer output N-ch open-drain output port P30/SCK P34/TO/INT0 Internal bus CPU 8-bit timer/counter CMOS I/O port P10 to P17 Reset circuit (WDT) External interrupt 1 8-bit timer/counter P33/EC/SCO P32/SI P31/SO P35/INT1 P36/INT2 P37/BZ/(RCO) P40/AN0 to P43/AN3 Subclock oscillator (32.768 kHz) Remote control* transmitting frequency generator Clock controller X0A X1A 8-bit A/D converter4 AVR AV CC AV SS to P07/ (INT27) Port 2 Port 3Port 4 P20 to P27 * : Only for the MB89130A series. Note : Parenthesized pin function is only for the MB89130A series.

  1. Memory Space The microcontrollers of the MB89130/130A series offer a memory space of 64 Kbytes for storing all of I/O, data, and program areas. The I/O area is allocated from the lowest address. The data area is allocated immediately above the I/O area. The data area can be divided into register, stack, and direct areas according to the application. The program area is allocated from exactly the opposite end, that is, near the highest address. The tables of interrupt reset vectors and vector call instructions are allocated from the highest address within the program area. The memory space of the MB89130/130A series is structured as illustrated below. ROM 4 KB MB89P131 MB89131 RAM 128 B I/O Register 0000 H 007F H 00C0 H 0100 H 013F H 0140 H EFFF H FFFF H F000 H Vacancy Vacancy ROM 8 KB MB89P133A MB89133A RAM 256 B I/O Register 0000 H 007F H 0080 H 00FF H 0100 H 017F H 0180 H DFFF H FFFF H E000 H Vacancy ROM 16 KB MB89135A RAM 256 B I/O Register 0000 H 007F H 0080 H 00FF H 0100 H 017F H 0180 H BFFF H FFFF H C000 H BFFF H C000 H Vacancy ROM 16 KB MB89P135A RAM 512 B I/O Register 0000 H 007F H 0080 H 00FF H 0100 H 027F H 0280 H 01FF H 0200 H 01FF H 0200 H FFFF H Vacancy External ROM 32 KB MB89PV130A RAM 1 KB I/O Register 0000 H 007F H 0080 H 00FF H 0100 H 7FFF H FFFF H 8000 H Vacancy 047F H 0480 H
  • Memory Space
  1. Registers The F2MC-8L family has two types of registers; dedicated hardware registers in the CPU and general-purpose memory registers. The following registers are provided : The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for use as a condition code register (CCR) . (See the diagram below.) Program counter (PC) : A 16-bit register for indicating the instruction storage positions. Accumulator (A) : A 16-bit temporary register for storing arithmetic operations, etc. When the instruction is an 8-bit data processing instruction, the lower byte is used. Temporary accumulator (T) : A 16-bit register which is used for arithmetic operations with the accumulator When the instruction is an 8-bit data processing instruction, the lower byte is used. Index register (IX) : A 16-bit register for index modification Extra pointer (EP) : A 16-bit pointer for indicating a memory address Stack pointer (SP) : A 16-bit pointer for indicating a stack area Program status (PS) : A 16-bit register for storing a register pointer, a condition code PC A T IX EP SP PS 16 bits : Program counter : Accumulator : Temporary accumulator : Index register : Extra pointer : Stack pointer : Program status FFFD H Indeterminate Indeterminate Indeterminate Indeterminate Indeterminate I-flag = 0, IL1, 0 = 11 The other bit values are Indeterminate. Initial value Vacancy H I IL1, 0 N Z VC RPPS 1 0 9876 321015 14 13 12 11 RP CCR Vacancy Vacancy
  • Structure of the Program Status Register

The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data, and bits for control of CPU operations at the time of an interrupt. H-flag : Set to ‘1’ when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared to ‘0’ otherwise. This flag is for decimal adjustment instructions. I-flag : Interrupt is enabled when this flag is set to ‘1’. Interrupt is disabled when the flag is cleared to ‘0’. Cleared to ‘0’ at the reset. IL1, 0 : Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit. IL1 IL0 Interrupt level High-low High Low 10 2 11 3 N-flag : Set to ‘1’ if the MSB becomes ‘1’ as the result of an arithmetic operation. Cleared to ‘0’ otherwise. Z-flag : Set to ‘1’ when an arithmetic operation results in ‘0’. Cleared to ‘0’ otherwise. V-flag : Set to ‘1’ if the complement on ‘2’ overflows as a result of an arithmetic operation. Cleared to ‘0’ if the overflow does not occur. C-flag : Set to ‘1’ when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to ‘0’ otherwise. Set to the shift-out value in the case of a shift instruction. “0” fl A15 “0” fl A14 “0” fl A13 “0” fl A12 “0” fl A11 “0” fl A10 “0” fl “1” fl fl fl fl fl fl fl fl fl RP Generated addresses Lower OP codes

  • Rule for Conversion of Actual Addresses of the General-purpose Register Area

The following general-purpose registers are provided : General-purpose registers : An 8-bit resister for storing data The general-purpose registers are of 8 bits and located in the register banks of the memory. One bank contains eight registers. Up to a total of 8 banks can be used on the MB89131/P131 and a total of 16 banks can be used on the MB89133A/P133A/135A and a total of 32 banks can be used on the MB89P135A/PV130A. The bank currently in use is indicated by the register bank pointer (RP) . This address = 0100H + 8 · (RP) Memory area 8 banks (MB89131/P131) 16 banks (MB89133A/P133A/135A) 32 banks (MB89P135A/PV130A)

  • Register Bank Configuration

(Continued) Address Read/write Register name Register description 00H (R/W) PDR0 Port 0 data register 01H (W) DDR0 Port 0 data direction register 02H (R/W) PDR1 Port 1 data register 03H (W) DDR1 Port 1 data direction register 04H (R/W) PDR2 Port 2 data register 05H Vacancy 06H Vacancy 07H (R/W) SYCC System clock control register 08H (R/W) STBC Standby control register 09H (R/W) WDTC Watchdog timer control register 0AH (R/W) TBTC Timebase timer control register 0BH (R/W) WPCR Watch prescaler control register 0C H (R/W) PDR3 Port 3 data register 0D H (W) DDR3 Port 3 data direction register 0EH (R/W) PDR4 Port 4 data register 0FH (R/W) BZCR Buzzer register 10H Vacancy 11H Vacancy 12H (R/W) SCGC Peripheral control clock register 13H Vacancy 14H (R/W) RCR1 Remote control transmitting control register 1* 15H (R/W) RCR2 Remote control transmitting control register 2* 16H Vacancy 17H Vacancy 18H (R/W) T2CR Timer 2 control register 19H (R/W) T1CR Timer 1 control register 1AH (R/W) T2DR Timer 2 data register 1BH (R/W) T1DR Timer 1 data register 1C H (R/W) SMR Serial mode register 1D H (R/W) SDR Serial data register 1EH Vacancy 1FH Vacancy

(Continued) * : Only for the MB89130A series Note : Do not use vacancies. Address Read/write Register name Register description 20H (R/W) ADC1 A/D converter control register 1 21H (R/W) ADC2 A/D converter control register 2 22H (R/W) ADCD A/D converter data register 23H (R/W) EIC1 External interrupt 1 control register 1 24H (R/W) EIC2 External interrupt 1 control register 2 25H Vacancy 26H to 31H Vacancy 32H (R/W) EIE2 External interrupt 2 enable register* 33H (R/W) EIF2 External interrupt 2 flag register* 34H to 7BH Vacancy 7C H (W) ILR1 Interrupt level setting register 1 7D H (W) ILR2 Interrupt level setting register 2 7EH (W) ILR3 Interrupt level setting register 3 7FH Vacancy

nnnn ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings (AVSS = VSS = 0.0 V) * : Use AVCC and VCC set to the same voltage. T ake care so that AVCC does not exceed VCC , such as when power is turned on. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. Parameter Symbol Value Unit Remarks Min. Max. Power supply voltage VCC AV CC VSS - 0.3 V SS + 7.2 V * AVR V SS - 0.3 V SS + 7.2 V AVR must not exceed V CC + 0.3 V Program voltage V PP VSS - 0.6 VSS + 13.0 V Only for the MB89P131/P133A/ P135A Input voltage V I VSS - 0.3 VCC + 0.3 V Output voltage V O VSS - 0.3 VCC + 0.3 V “L” level maximum output current IOL ¾ 10 mA “L” level average output current IOLAV ¾ 4m A Average value (operating current · operating rate) “L” level total maximum output cur- rent SIOL ¾ 100 mA “L” level total average output cur- rent SIOLAV ¾ 20 mA Average value (operating current · operating rate) “H” level maximum output current IOH ¾ –10 mA “H” level average output current IOHAV ¾ –2 mA Average value (operating current · operating rate) “H” level total maximum output cur- rent SIOH ¾ –30 mA “H” level total average output cur- rent SIOHAV ¾ –10 mA Average value (operating current · operating rate) Power consumption P D ¾ 200 mW Operating temperature T A -40 +85 °C Storage temperature Tstg -55 +150 °C

  1. Recommended Operating Conditions (AVSS = VSS = 0.0 V) * : These values vary with the operating frequencies and the analog assurance range. See Figure 1 and 2, and “5. A/D Converter Electrical Characteristics.” Parameter Symbol Value Unit Remarks Min. Max. Power supply voltage VCC AV CC 2.2* 6.0* V Normal operation assurance range* MB89131/133A/135A 2.7* 6.0* V Normal operation assurance range* MB89P131/P133A/135A/PV130A 1.5 6.0 V Retains the RAM state in the stop mode AVR 2.0 AV CC V Operating temperature T A -40 +85 °C Operation assurance range 123 4 4.0 2.0 1.0 Main clock oprating frequency (at an instruction cycle of 4/FCH ) (MHz) Minimum execution time (Instruction cycle) (µs) Operating voltage (V) Figure 1 Operating Voltage vs. Main Clock Operating Frequency (MB89P131 /P133A /P135A /PV130A , and single-clock MB89131/133/133A /135/135A ) Note : The shaded area is assured only for the MB89131/133/133A/135/135A.
  1. DC Characteristics (AVCC = VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = -40 °C to +85 °C) (Continued) Parameter Sym- bol Pin Condition Value Unit Remarks Min. Typ. Max. “H” level input voltage VIH P00 to P07, P10 to P17

0.7 VCC ¾ VCC +

0.3 V VIHS RST , P30 to P37, INT20 to INT27

0.8 VCC ¾ VCC +

3.0 V INT20 to INT27 are available only for the MB89130A se- ries. “L” level input voltage V IL P00 to P07, P10 to P17 VSS - 0.3 ¾ 0.3 VCC V VILS RST , P30 to P37 INT20 to INT27 VSS - 0.3 ¾ 0.2 VCC V INT20 to INT27 are available only for the MB89130A se- ries. Open-drain output pin applied voltage V D P40 to P43 VCC - 0.3 ¾ VCC + 0.3 V “H” level output voltage VOH P00 to P07, P10 to P17, P20 to P27, P30 to P37 I OH = -2.0 mA 2.4 ¾¾ V “L” level output voltage VOL P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P43 I OL = 1.8 mA ¾¾ 0.4 V VOL2 RST IOL = 4.0 mA ¾¾ 0.6 V Input leakage current (Hi-z output leakage current) I LI1 P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P43, MOD0, MOD1

0.0 V < V

I < VCC ¾¾– 5 mA Without pull-up resistor Pull-up resistance R PULL P00 to P07, P10 to P17, P30 to P37, P40 to P43, RST VI = 0.0 V 25 50 100 k W

(Continued) (AVCC = VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = -40 °C to +85 °C) *1 : The power supply current is measured at the external clock. *2 : For information on tinst, see “ (4) Instruction Cycle” in “4. AC Characteristics.” Parameter Sym- bol Pin Condition Value Unit Remarks Min. Typ. Max. Power supply current*1 ICC1 VCC (External clock opera- tion) F CH = 4.00 MHz VCC = 5.0 V tinst*2 = 1.0 ms ¾ 47 m A MB89131/ 133A/135A ¾ 61 0 m A MB89P131/ P133A/P135A ICCS1 FCH = 4.00 MHz VCC = 5.0 V tinst*2 = 1.0 ms Main clock sleep mode ¾ 25 m A I CCL FCL = 32.768 kHz VCC = 3.0 V Subclock mode ¾ 50 100 mA MB89131/ 133A/135A ¾ 13 m A MB89P131/ P133A/P135A ICCLS FCL = 32.768 kHz VCC = 3.0 V Subclock sleep mode ¾ 25 50 mA I CCT FCL = 32.768 kHz VCC = 3.0 V

  • Watch mode
  • Main clock stop mode in dual- clock system ¾¾ 15 mA I CCH TA = +25 °C
  • Subclock stop mode
  • Main clock stop mode in single- clock system ¾¾ 1 mA I A AV CC FCH = 4 MHz, when A/D conversion is op- erating ¾ 13 m A I AH AV CC FCH = 4 MHz, TA = +25 °C, when A/D conversion is not operating ¾¾ 1 mA Input capacitance C IN Other than AV CC , AVSS , VCC , and VSS f = 1 MHz ¾ 10 ¾ pF
  1. AC Characteristics (1) Reset Timing (VCC = +5.0 V – 10% , AVSS = VSS = 0.0 V, TA = -40 °C to +85 °C) * : tHCYL is the oscillation cycle (1/FCH ) to input to the X0 pin. (2) Power-on Reset (AVSS = VSS = 0.0 V, TA = -40 °C to +85 °C) Note : Make sure that power supply rises within the oscillation stabilization time selected. For example, when the main clock is operating at 3 MHz (FCH ) and the oscillation stabilization time selecting option has been set to 212/FCH , the oscillation stabilization time is 1.4 ms. Therefore, the maximum value of power supply rising time is about 1.4 ms. Rapid changes in power supply voltage may cause a power-on reset. If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. Parameter Symbol Condition Value Unit Remarks Min. Max. RST “L” pulse width t ZLZH ¾ 48 tHCYL * ¾ ns Parameter Symbol Condition Value Unit Remarks Min. Max. Power supply rising time t R ¾ 50 ms Power-on reset function only Power supply cut-off time tOFF 1 ¾ ms Due to repeated operations tZLZH 0.2 VCC 0.2 VCC

0.8 VCC

0.2 V 0.2 V 2.0 V VCC 0.2 V tR tOFF

(3) Clock Timing (VSS = 0.0 V, TA = -40 °C to +85 °C) Parameter Symbol Pin Value Unit Remarks Min. Typ. Max. Input clock frequency FCH X0, X1 1 ¾ 4.2 MHz Main clock FCL X0A, X1A ¾ 32.768 ¾ kHz Subclock Clock cycle time tHCYL X0, X1 238 ¾ 1000 ns Main clock tLCYL X0A, X1A ¾ 30.5 ¾m s Subclock Input clock pulse width PWH1 PWL1 X0 30 ¾¾ ns External clock Input clock rising/falling timetCR1 tCF1 X0 ¾¾ 24 ns External clock

0.2 VCC

When an external clock is used FCH tHCYL PWL1 tCF1

  • X0 and X1 Timing and Conditions of Applied Voltage
  • Main Clock Conditions

(4) Instruction Cycle Parameter Symbol Value Unit Remarks Instruction cycle (minimum execution time) tinst 4/FCH , 8/FCH , 16/FCH , 64/FCH ms (4/FCH ) tinst = 1.0 ms when operating at FCH = 4 MHz 2/FCL ms tinst = 61.036 ms when operating at FCL = 32.768 kHz X0A X1A C 0 C 1 FCL X0A X1A Open Rd ceramic resonator is used When a single-clock option is used

  • X0A and X1A Timing and Conditions of Applied Voltage
  • Subclock Conditions

(5) Recommended Resonator Manufacturers X0 X1 C1 C2 R 2* 2* Inquiry : FUJITSU MEDIA DEVICES LIMITED FAR part number*1 (built-in capacitor type) Frequency (MHz) Dumping resistor Initial deviation of FAR frequency Temperature characteristics of FAR frequency Loading capacitors*2 FAR-C4CC-02000-L00 2.00 1000 W– 0.5%– 0.5% Built-in 510 W– 0.5%– 0.5% FAR-C4 A-03000- 20 3.00 1 k W– 0.5%– 0.5% FAR-C4 A-04000- 01 4.00 750 W– 0.5%– 0.5%

  • Sample Application of Piezoelectric Resonator (FAR Family) for Main Clock Oscillation Circuit

(Continued) X0 X1 C1 C2 R

  • Mask ROM products Resonator manufacturer* Resonator Frequency (MHz) C1 (pF) C2 (pF) R Kyocera Corporation KBR-4.0MKS 4.00 33 33 Not required Matsushita Electronic Components Co,. Ltd.EFOV4004B 4.00 33 (Built-in) 33 (Built-in) 1.5 k W Murata Mfg. Co., Ltd. CSBF1000J 1.00 100 100 6.8 k W CSA4.00MG 4.00 30 30 Not required CST4.00MGW Built-in Built-in Not required CSA4.00MGU 30 30 Not required CST4.00MGWU Built-in Built-in Not required CSA4.00MGU040 100 100 Not required CST4.00MGWU040 Built-in Built-in Not required CSTCS4.00MG Built-in Built-in Not required CSTCS4.00MGWOC5 Built-in Built-in Not required TDK Corporation CCR4.0MC3 4.00 Built-in Built-in Not required
  • Sample Application of Ceramic Resonator for Main Clock Oscillation Circuit

(Continued)

  • One -time PROM products Resonator manufacturer* Resonator Frequency (MHz) C1 (pF) C2 (pF) R Murata Mfg. Co., Ltd. CSA3.00MG040 3.00 100 100 Not required CST3.00MGW040 Built-in Built-in Not required CSA4.00MG 4.00 30 30 Not required CSA4.00MGU 30 30 Not required CST4.00MGWU Built-in Built-in Not required CSA4.00MGU040 100 100 Not required CST4.00MGWU040 Built-in Built-in Not required CSTCS4.00MG Built-in Built-in Not required Inquiry : Kyocera Corporation
  • AVX Corporation North American Sales Headquarters : TEL 1-803-448-9411
  • AVX Limited European Sales Headquarters : TEL 44-1252-770000
  • AVX/Kyocera H.K. Ltd. Asian Sales Headquarters : TEL 852-363-3303 Matsushita Electronic Components Co., Ltd.
  • North America Panasonic Industrial Co. : TEL 1-201-348-7000
  • Canada Matsushita Electric of Canada Ltd. : TEL 905-238-2436
  • Europe Panasonic Industrial Europe (Continental) : TEL 49-40-8549-2048 Panasonic Industrial Europe (Nlederlassung Munchen) : TEL 49-89-4800-7150
  • Asia Panasonic Industry of Asia, Company : TEL 65-299-8400 Murata Mfg. Co., Ltd.
  • Murata Electronics North America, Inc. : TEL 1-404-436-1300
  • Murata Europe Management GmbH : TEL 49-911-66870
  • Murata Electronics Singapore (Pte.) Ltd. : TEL 65-758-4233 TDK Corporation
  • TDK Corporation of America Chicago Regional Office : TEL 1-708-803-6100
  • TDK Electronics Europe GmbH Components Division : TEL 49-2102-9450
  • TDK Singapore (PTE) Ltd. : TEL 65-273-5022
  • TDK Hongkong Co., Ltd. : TEL 852-736-2238
  • Korea Branch, TDK Corporation : TEL 82-2-554-6633

(6) Serial I/O Timing (VCC = +5.0 V – 10% , AVSS = VSS = 0.0 V, TA = -40 °C to +85 °C) * : For information on tinst, see “ (4) Instruction Cycle.” Parameter Symbol Pin Condition Value Unit Remarks Min. Max. Serial clock cycle time t SCYC SCK Internal shift clock mode 2 tinst* ¾m s SCK fl fi SO time t SLOV SCK, SO -200 200 ns Valid SI fi SCK › t IVSH SI, SCK 200 ¾ ns SCK › fi valid SI hold time tSHIX SCK, SI 200 ¾ ns Serial clock “H” pulse width tSHSL SCK External shift clock mode 1 tinst* ¾m s Serial clock “L” pulse width tSLSH 1 tinst* ¾m s SCK fl fi SO time t SLOV SCK, SO 0 200 ns Valid SI fi SCK › tIVSH SI, SCK 200 ¾ ns SCK › fi valid SI hold time tSHIX SCK, SI 200 ¾ ns X0A X1A C1 C2 Rd

  • Mask ROM products Resonator manufacturer* Resonator Frequency (kHz) C1 (pF) C2 (pF) Rd (k WWWW ) SII DS-VT-200 32.768 24 24 680 Inquiry : SII
  • Seiko Instruments Inc. (Japan) : TEL 81-43-211-1219
  • Seiko Instruments U.S.A. Inc. : TEL 310-517-7770
  • Seiko Instruments GmbH : TEL 49-6102-297-122
  • Sample Application of Crystal Resonator for Subclock Oscillation Circuit

0.8 V 2.4 V tSCYC 2.4 V tSLOV 0.8 V 0.8 V tIVSH 2.4 V tSLOV 0.8 V tIVSH 0.2 VCC0.2 VCC SO SI SCK

  • Internal Shift Clock Mode
  • External Shift Clock Mode

(7) Peripheral Input Timing (VCC = +5.0 V – 10% , AVSS = VSS = 0.0 V, TA = -40 °C to +85 °C) * : For information on tinst, see “ (4) Instruction Cycle.” Parameter Symbol Pin Condition Value Unit Remarks Min. Max. Peripheral input “H” level pulse width 1 tILIH1 EC, INT0 to INT2 ¾ 2 tinst* ¾m s Peripheral input “L” level pulse width 1 tIHIL1 2 tinst* ¾m s

0.8 VCCEC,

INT0 to INT2 0.2 VCC tILIH1

  1. A/D Converter Electrical Characteristics (AVCC = VCC = +3.5 V to +6.0 V, FCH = 3 MHz, AVSS = VSS = 0.0 V, TA = -40 °C to +85 °C) * : For information on tinst, see “ (4) Instruction Cycle” in “4. AC Characteristics.” 6. A/D Converter Glossary
  • Resolution Analog changes that are identifiable by the A/D converter. When the number of bits is 8, analog voltage can be divided into 28 = 256.
  • Linearity error (unit : LSB) The deviation of the straight line connecting the zero transition point (“0000 0000” « “0000 0001”) with the full-scale transition point (“1111 1111” « “1111 1110”) from actual conversion characteristics
  • Differential linearity error (unit : LSB) The deviation of input voltage needed to change the output code by 1 LSB from the theoretical value Parameter Symbol Pin Condition Value Unit Re- marksMin. Typ. Max. Resolution AVR = AVCC = 5.0 V ¾¾ 8b i t Total error AVR = AVCC ¾¾ – 1.5 LSB Linearity error ¾¾ – 1.0 LSB Differential linearity error ¾¾ – 0.9 LSB Zero transition voltage VOT AV SS -

1.0 LSB

0.5 LSB

2.0 LSB mV

1LSB = AVR/256Full-scale transition voltage VFST AVR -

3.0 LSB

1.5 LSB AVR mV

¾¾ 0.5 LSB A/D mode conversion time ¾ 44 tinst* ¾m s Sense mode conversion time ¾ 12 tinst* ¾m s Analog port input current IAIN AN0 to AN3 ¾¾ 10 mA Analog input voltage ¾ 0 ¾ AVR V Reference voltage ¾ AVR 2.0 ¾ AV CC V Reference voltage supply current IR AVR = AVCC = 5.0 V, when A/D conversion is operating ¾ 100 300 mA I RH AVR = AVCC = 5.0 V, when A/D conversion is not operating ¾¾ 1 mA

  • T otal error (unit : LSB) The difference between theoretical and actual conversion values Linearity error (1 LSB · N + VOT ) Digital output VOT VNT V(N+1)T VFST Theoretical conversion value 1111 1111 1111 1110 0000 0010 0000 0001 0000 0000

1 LSB = AVR

VNT - (1 LSB · N + VOT )

1 LSB

  • 1V(N+1)T - VNT

Total error = Differential linearity error = Linearity error = VNT - (1 LSB · N + 1 LSB)

  1. Notes on Using A/D Converter
  • lnput impedance of the analog input pins The A/D converter used for the MB89130/130A series contains a sample hold circuit as illustrated below to fetch analog input voltage into the sample hold capacitor for eight instruction cycles after starting A/D conversion. For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output impedance of the external circuit low (below 10 kW ) . Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of approx. 0.1 mF for the analog input pin.
  • Error The smaller the | AVR - AV SS |, the greater the error would become relatively. Sample hold circuit Comparator Analog input pin C = 28 pF.. R = 9 kW.. Close for 8 instruction cycles after starting A/D conversion. Analog channel selector If the analog input impedance is higher than 10 kW, it is recommended to connect an external capacitor of approx. 0.1 mF.
  • Analog Input Equivalent Circuit

nnnn EXAMPLE CHARACTERISTICS (1) “L” Level Output Voltage (2) “H” Level Output Voltage (3) “H” Level Input Voltage/“L” Level Input Voltage (CMOS Input) (4) “H” Level Input Voltage/“L” Level Input Voltage (Hysteresis Input) VIHS : Threshold when input voltage in hysteresis characteristics is set to “H” level VILS : Threshold when input voltage in hysteresis characteristics is set to “L” level (5) Pull-up Resistance VOL (V) VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V IOL (mA) 0123456789 1 0 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 1.1 VCC = 2.5 V VCC = 3.0 V TA = +25 °C VOL vs. IOL VCC = 2.2 V VCC – VOH (V) VCC = 6.0 V VCC = 5.0 V VCC = 4.0 V IOH (mA) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 1.1 VCC = 2.5 VVCC = 2.2 V VCC = 3.0 V TA = +25 °C VCC – VOH vs. IOH 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 V IN (V) VCC (V) 1234567 TA = +25 °C VIN vs. VCC VIHS VILS 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 V IN (V) VCC (V) 1234567 TA = +25 °C VIN vs. VCC 1234567 1000 R PULL (kW ) VCC (V) 300 100 TA = +25 °C R PULL vs. VCC

(6) Power Supply Current (External Clock) (Continued) 1.5 6.5 VCC (V) 5.0 ICC (mA) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 ICC1 vs. VCC 2 2.5 3 3.5 4 4.5 5 5.5 6 Divide by 4(ICC1 ) Divide by 64 FCH = 4.0 MHz TA = +25 °C 1.5 6.5 VCC (V) ICCS1 (mA) 0.0 ICCS1 vs. VCC 2 2.5 3 3.5 4 4.5 5 5.5 6 Divide by 4(ICCS1 ) 0.5 1.5 2.5 ICCL (mA) VCC (V) 1.5 2 100 120 140 160 180 200 ICCL vs. VCC TA = +25 °C 1.5 6.5 VCC (V) ICCLS (mA) ICCT vs. VCC 2 2.5 3 3.5 4 4.5 5 5.5 6

30 TA = +25 °C

1.5 6.5 VCC (V) ICCT (mA) ICCLS vs. VCC 2 2.5 3 3.5 4 4.5 5 5.5 6 TA = +25 °C IR (mA) AVR (V) 1.5 2 100 120 140 160 180 200 IR vs. AVR TA = +25 °C Divide by 64 FCH = 4.0 MHz TA = +25 °C

(Continued) ICCH (mA) VCC (V) 1.5 2.0 6.5 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 ICCH vs. VCC TA = +25 °C IA (mA) AV CC (V) 1.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 IA vs. AVCC TA = +25 °C FCH = 4 MHz

*1 : Both external clock and oscillation resonator can be used on the OTPROM product. *2 : “Used” must be selected when P33 (39 pin) is used as SCO for the peripheral control clock output. *3 : The peripheral control clock output function can be used only by software. No. Part number MB89131 MB89133A MB89135A MB89P131 MB89P133A Specifying procedure Specify when ordering masking Specify when ordering masking Specify when ordering masking Pull-up resistors

  • P00 to P07, P10 to P17,
  • P30 to P37, P40 to P43 Selectable by pin (P40 to P43 must be fixed to no pull-up resistor option when an A/D converter is used.) Selectable by pin (P40 to P43 must be fixed to no pull-up resistor option when an A/D converter is used.) Selectable by pin (P40 to P43 must be fixed to no pull-up resistor option when an A/D converter is used.) Power-on reset
  • Power-on reset provided
  • No power-on reset Selectable Selectable Selectable Selection of oscillation stabilization time
  • The oscillation stabilization time ini- tial value is selectable from 4 types given below. 0 : Oscillation stabilization 2 2/FCH 1 : Oscillation stabilization 212/FCH 2 : Oscillation stabilization 216/FCH 3 : Oscillation stabilization 218/FCH Selectable Selectable Selectable Reset pin output
  • Reset output enabled
  • Reset output disabled Selectable Selectable Selectable Clock mode selection
  • Single-clock mode
  • Dual-clock mode Selectable Selectable Selectable Selection of oscillation circuit type
  • Crystal or ceramic oscillation type
  • External clock input type Selectable Selectable Not required *1 Peripheral control clock output func- tion*2
  • Not used
  • Used Selectable Not required *3 Not required*3

*1 : Both external clock and oscillation resonator can be used. *2 : “Used” must be selected when P33 (39 pin) is used as SCO for the peripheral control clock output. *3 : The peripheral control clock output function can be used only by software. No. Part number MB89P135A MB89PV130A Specifying procedure Set with EPROM programmer Setting not possible Pull-up resistors

  • P00 to P07, P10 to P17,
  • P30 to P37, P40 to P43 Selectable by pin (P40 to P43 must be fixed to no pull-up resistor option.) All pins fixed to no pull-up resis- tor option Power-on reset
  • Power-on reset provided
  • No power-on reset Selectable Power-on reset provided Selection of oscillation stabilization wait time
  • The oscillation stabilization time ini- tial value is selectable from 4 types given below. 0 : Oscillation stabilization 2 2/FCH 1 : Oscillation stabilization 212/FCH 2 : Oscillation stabilization 216/FCH 3 : Oscillation stabilization 218/FCH Selectable Oscillation stabilization 2 18/FCH Reset pin output
  • Reset output enabled
  • Reset output disabled Selectable Reset output enabled Selection of clock mode selection
  • Single-clock mode
  • Dual-clock mode Selectable Dual-clock mode Selection of oscillation circuit type
  • Crystal or ceramic oscillation type
  • External clock input type Not required*1 Not required*1 Peripheral control clock output func- tion*2
  • Not used
  • Used Not required*3 Not required*3

nnnn MB89P131/P133A STANDARD OPTIONS nnnn ORDERING INFORMATION No. Product option MB89P131-101 MB89P133A-201

1 Pull-up resistor Not provided for any port Not provided for any port

2 Power-on reset Provided Provided

3 Selection of oscillation stabiliza-

tion time 2 : Oscillation stabilization 216/FCH 2 : Oscillation stabilization 216/FCH

4 Reset pin output Enabled Enabled

5 Selection of clock mode Dual-clock mode Dual-clock mode

Part number Package Remarks MB89131PFM MB89133APFM MB89135APFM MB89P131PFM-101 MB89P133APFM-201 MB89P135APFM 48-pin Plastic QFP (FPT-48P-M13) MB89133AP MB89P133AP-201 48-pin Plastic SH-DIP (DIP-48P-M01) MB89PV130ACF-ES 48-pin Ceramic MQFP (MQP-48C-P01)

(Continued) 48-pin Plastic QFP (FPT-48P-M13) Dimensions in mm (inches) C 2001 FUJITSU LIMITED F48023S-c-2-3 (.013±.002) M0.20(.008) 0.10(.004) (.007±.002) 11 2 2437 2536 INDEX Details of "A" part 0.80±0.20 (.031±.008) 0.88±0.15 (.035±.006) 0.25(.010) .008–.008 +.004 –0.20 +0.10 0.20 (Stand off) 1.95 +0.40 –0.20 +.016 –.008 .077 (Mounting height) 0~8° "A" 0.10(.004)

(Continued) 48-pin Plastic SH-DIP (DIP-48P-M01) Dimensions in mm (inches) C 1994 FUJITSU LIMITED D48002S-3C-3 43.69 +0.20 –0.30 +.008 –.012 1.720 13.80±0.25 (.543±.010) INDEX-1 5.25(.207) 3.00(.118) 0.45±0.10 (.018±.004)+.020 –0.039 +0.50 1.00 1.778±0.18 (.070±.007) 1.778(.070) MAX 0.25±0.05 (.010±.002) 15.24(.600) TYP 15°MAX INDEX-2 40.894(1.610)REF MAX MIN 0.51(.020)MIN

(Continued) 48-pin Ceramic MQFP (MQP-48C-P01) Dimensions in mm (inches) C 1994 FUJITSU LIMITED M48001SC-4-2 14.82±0.35 (.583±.014) 15.00±0.25 (.591±.010) 17.20(.677)TYP PIN No.1 INDEX .430–0 +.005 –0.0 +0.13 10.92 1.02±0.13 (.040±.005) TYPTYP 0.30(.012)TYP 4.50(.177)TYP PAD No.1 INDEX 0.15±0.05 (.006±.002) 8.50(.335)MAX 0.60(.024)TYP1.10 +0.45 –0.25 +.018 –.010 .043 0.40±0.08 (.016±.003) 0.80±0.22 (.0315±.0087) 8.80(.346)REF 1.00(.040)TYP 1.50(.059)TYP PIN No.1 INDEX

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