MB88101A FUJITSU | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 18
Technical content
DS04-13105-2EFUJITSU SEMICONDUCTOR DATA SHEET Linear IC Converter CMOS A/D Converter (With 4-channel Input at 12-bit Resolution) MB88101A n DESCRIPTION The MB88101A is an analog-to-digital converter that converts its analog input to a 12-bit digital value and outputs it as serial data. The MB88101A employs a successive approximation method for A/D conversion. The MB88101A has four input channels selectable for analog input under control of the dedicated external pins. The MB88101A can be switched to a mode for continuous A/D conversion, in which it outputs serial data from the MSB or LSB selectable depending on the mode setting. n FEATURES
- 4-channel analog input
- One analog input channel selectable for conversion by external control
- CR-type successive approximation system with a sample-and-hole circuit
- 12-bit resolution
- Serial output of 12-bit digital data
- Capable of continuous conversion (continuous conversion mode)
- MSB or LSB selectable for serial output
- CMOS process
- Package options of 16-pin DIP, SSOP, and SOP available n PACKAGES 16-pin Plastic DIP (DIP-16P-M04) 16-pin Plastic SSOP (FPT-16P-M05) 16-pin Plastic SOP (FPT-16P-M06)
(TOP VIEW) INDEX (DIP-16P-M04) (FPT-16P-M06) (FPT-16P-M05)
Pin no. Symbol I/O Descriptions AN AN 1 AN 2 AN 3 I Analog input pins. One of these channels can be selected depending on the C0 and C1 settings. 14 DO O This pin outputs the result of A/D conversion. The result is 12-bit serial data output in synchronization with the rise of CLK.
13 CLK I Clock input pin for A/D conversion
I Chip select signal input pin. Setting the signal level to “L” after turning the power on starts A/D conversion; setting it to “H” stops A/D conversion. When this pin is “H”, the DO and SAMP pins are “Hi-z”. C 0 C 1 I Input pins for selecting the analog input channels from among pins AN0 to AN3. See Table 1 for the correspondence between the pin settings and the channels selected. To switch the channel in mode 2 or 3, set these pins before the SAMP pin goes “H”. MOD0 MOD1 I Conversion mode setting pins. For the correspondence between the pin settings and the modes selected, see Table 2 and “n FUNCTIONAL DESCRIPTION.” 15 SAMP O This pin becomes active in prior to data output. Serial data is output from the DO pin three clock cycles after the signal level at this pin goes “L” after “H” for one clock cycle. REF — Reference voltage input pin 4A GND — Analog circuit ground pin 9D GND — Digital circuit ground pin
16 V CC — Power supply pin
C 1 C 0 Channel MOD 0 MOD1 Mode LL A N 0 L L Mode 1 LH A N 1 L H Mode 2 HL A N 2 H L (Disabled) HH A N 3 H H Mode 3
- Channel selection • Mode selection Table 1 Pin Settings and Channel Selection Table 2 Pin Settings and Mode Selection
- Mode 1 This mode sets the DO pin to “L” and stops conversion upon completion of conversion of 12 bits. T o restart conversion, set CS to “H” once then to “L”. In this mode, converted data is output from the MSB.
- Timing diagram 2. Mode 2 This mode continues conversion until CS becomes “H” after it becomes “L”. Converted data is output from the LSB, with the first piece of converted data output 20 clock cycles after CS becomes “L”. Changing the channel select pin settings before starting sampling of one analog input allows another to be converted.
- Timing diagram CLK CS MOD0, 1 C 0, C1 DO Bit Trial SAMP B11 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Sampling Sampling 1234567891 0 1 1 1 2 1 3 1 4 1 5 1 6 1 2 Hi-z Hi-z Hi-z Hi-z CS MOD0, 1MOD0, 1 Mode 2 C 0, C1 AN 0 AN 2 AN 1 CLK DO Bit Trial SAMP Hi-z Hi-z Hi-z Hi-z 16CLK MSB (AN 0) Þ LSB MSB (AN 2) Þ LSB LSB (AN0) Þ MSB LSB (AN 2) Þ MSB MSB (AN 1) Þ LSB
- Mode 3 This mode continues conversion until CS becomes “H” after it becomes “L”. Converted data is output from the MSB. Changing the channel select pin settings before starting sampling of one analog input allows another to be converted.
- Timing diagram CS MOD0, 1 Mode 3 C 0, C1 AN 0 AN 2 AN 1 CLK DO Bit Trial SAMP Hi-z Hi-z Hi-z Hi-z MSB (AN 0) Þ LSB MSB (AN 2) Þ LSB MSB (AN 2) Þ LSBMSB (AN 0) Þ LSB MSB (AN 1) Þ LSB MSB (AN 1) Þ LSB
n ABSOLUTE MAXIMUM RATINGS * : VCC ‡ VREF WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. n RECOMMENDED OPERATING CONDITIONS WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All the device’s electrical characteristics are warranted when operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representative beforehand. Parameter Symbol Conditions Rating Unit Min. Max. Power supply voltage VCC Based on GND (Ta = +25°C) –0.3 +7.0 V VREF –0.3* +7.0* V Input voltage V IN –0.3 V CC + 0.3 V Output voltage V OUT –0.3 V CC + 0.3 V Power consumption P D — — 150 mW Operating temperature Ta — –20 +85 °C Storage temperature T stg — –55 +150 °C Parameter Symbol Value Unit Min. Typ. Max. Power supply voltage VCC 3.3 — 5.5 V GND — 0 — V Operation temperature Ta –20 — +85 °C
n ELECTRICAL CHARACTERISTIC 1. DC Characteristics (1) Digital section (VCC = 3.3 V to 5.5 V, DGND = 0 V, Ta = –20°C to +85°C) (2) Analog section (VREF , VCC = 3.3 V to 5.5 V (VCC ‡ VREF ), AGND = 0 V, Ta = –20°C to +85°C) Parameter Symbol Pin name Conditions Value Unit Min. Typ. Max. Power supply voltage V CC VCC — 3.3 5.0 5.5 V Power supply current I CC Operation at CLK =166kHz (with no load) —0 . 82 . 0 m A I ILK MOD0, 1 CLK CS C 0 C 1 VIN = 0 to VCC –10 — 10 mA VIL — VSS - 0.3 — 0.2 V CC V High-level input voltage VIH —0 . 8 V CC — VCC + 0.3 V High-impedance output leakage current IOLZ DO SAMP VIN = 0 to VCC –10 — 10 mA Low-level output voltage VOL IOL = 2.5 mA — — 0.4 V High-level output voltage VOH IOH = –400 mA VCC - 0.4 —— V Parameter Symbol Pin name Value Unit Min. Typ. Max. Resolution — AN 0 to AN3 —1 2— b i t s Linearity error — –4.0 — 2.0 LSB Differential linearity error — –1.0 — 3.0 LSB Conversion time — — — 16 — CLK Consumption current I REF VREF — 100 300 mA Analog reference voltage — 3.3 5.0 V CC V Analog input voltage — AN 0 to AN3 0— V REF V Input leakage current Low-level input voltage
(3) Definitions of A/D converter terms
- Resolution Analog transition identifiable by the A/D converter
- Linearity error Deviation of the straight line drawn between the zero transition point (0000 0000 0000 « 0000 0000 0001) and the full-scale transition point (1111 1111 1110 « 1111 1111 1111) of the device from actual conversion characteristics
- Differential linearity error Deviation from the ideal input voltage required to shift output code by one LSB Notes: • The tolerance of output impedance of an external circuit connected to this A/D converter has an effect on conversion time (CLK frequency). See “n TYPICAL CHARACTERISTICS”.
- If the output impedance of the external input is too high, the analog voltage sampling time may be short.
- When turning the device on, turn the power supply for the digital system first before turning VREF on. Digital output Actual converted value Ideal converted value Analog output 1111 1111 1111 1111 1111 1110 0000 0000 0001 0000 0000 0000 0000 0000 0010 VOT VNT V(N+1)T VFST (1 LSB · N + VOT ) Linearity error
1 LSB
Differential linearity error = –1 (LSB) (LSB) V FST – VOT 4094 VNT – (1 LSB · N + VOT ) V(N+1)T – VNT × R ON1 = About 1.5 kW × R ON2 = About 1.5 kW × C 0 = About 60 pF
- Analog input equivalent circuit Note: The above values are reference values.
- AC Characteristics (VREF , VCC = 3.3 V to +5.5 V (VCC ‡ VREF ), AGND = 0 V, Ta = –20°C to +85°C) *1: Depending on the output impedance of the external circuit connected to the analog input pin *2: See “• AC test circuit.” Parameter Symbol Conditions Value Unit Min. Max. Clock cycle time t CLK VCC = 5 V – 10% *1 1.0 30.0 ms — 6.0 30.0 ms Low-level clock pulse width t CKL — 2.8 14.8 ms High-level clock pulse width t CKH — 2.8 14.8 ms Clock rise time Clock fall time tCr tCf —— 0 . 2 ms CS setup time t CSS —t CKL + 0.4 — ms CS hold time t CSH —1 . 0 — ms CS release time t CSR —1 . 0 — C L K Channel setup time t CHS —0 — ms Channel hold time t CHH —1 . 0 — C L K Data output delay time t DO *2 — 0.5 ms MOD setup time t MOS —0 . 2 — ms MOD hold time t MOH —0 . 1 — ms Data active delay time t DVE —— 0 . 5 ms Data float delay time t DZE —— 0 . 5 ms SAMP active delay time t SVE —— 0 . 5 ms SAMP float delay time t SZE —— 0 . 5 ms SAMP high-level output delay time t SHD *2 — 0.5 ms SAMP low-level output delay time t SLD *2 — 0.5 ms Measurement point C L = 50 pF
- AC test circuit
(1) Input clock timing (2) A/D startup timing Evaluation levels are 80% and 20% of the VCC . CLK t CLK t CKH t Cf t CKL t Cr CLK CS MOD0, 1 C 0, C1 SAMP DO tCSS tCSH tMOS tSVE tSHD tSLD tDVE tMOH tCHS tCHH Hi-z Hi-z
(3) Data output delay time and A/D stop timing CLK CS SAMP DO tCSR tSZE tDZEtDO Hi-z Hi-z
1,000 900 800 700 600 500 400 300 200 100 300 250 200 150 100 Ta = +25°C VREF = VCC Power supply current ICC (mA) Power supply voltage vs. Power supply current Power supply voltage VCC (V) Ta = +25°C VCC = VREF Analog consumption current IREF (mA) Analog reference voltage vs. Analog consumption current Analog reference voltage VREF (V)
Ta = +25°C V CC = V REF = 3.3 V V CC = V REF = 5.0 V Clock cycle time tCLK (ms) Conversion time (ms) Analog input external impedance vs. Clock cycle time (tCLK ) Analog input impedance (kW ) Conversion time = Clock cycle time (tCLK ) · 16 0 1 2 3 4 5 6 7 8 9 11 12 13 14 15 10
Part number Package Remarks MB88101AP 16-pin Plastic DIP (DIP-16P-M04) MB88101APFV 16-pin Plastic SSOP (FPT-16P-M05) MB88101APF 16-pin Plastic SOP (FPT-16P-M06)
+.012 +.008 –.012 +.012 +0.30 –0 –0 +0.30 +0.20 –0.30 0.99 3.00(.118)MIN 4.36(.172)MAX (.244±.010) 6.20±0.25 TYP 7.62(.300) .060 .770 .039 INDEX-1 MAX 1.27(.050) 1.52 0.25±0.05 (.010±.002) 0.51(.020)MIN 15°MAX 19.55 TYP 2.54(.100) INDEX-2 (.018±.003) 0.46±0.08
1994 FUJITSU LIMITED D16033S-2C-3C Dimensions in mm (inches)
(DIP-16P-M04) +0.20 –0.10 +.008 –.004 +0.10 –0.05 +.004 –.002 +0.05 –0.02 +.002 –.001 INDEX "A" 0.10(.004) 1.25 .049 0.22 .009 0.15 .006(.0256±.0047) 0.65±0.12 4.55(.179)REF Details of "A" part 0 10° (STAND OFF) (.020±.008) 0.50±0.20
1994 FUJITSU LIMITED F16013S-2C-4C
(Mounting height) 16-pin Plastic SSOP (FPT-16P-M05) *: This dimension do not include resin protrusion. Dimensions in mm (inches)
+0.40 –0.20 +.016 –.008 +0.05 –0.02 +.002 –.001 +0.25 –0.20 +.010 –.008 0.68(.027)MAX 0.18(.007)MAX 0.15(.006) 0.20(.008) Details of "B" part "B" 8.89(.350)REF 1.27(.050) TYP INDEX 6.80 .268 0.15 .006 10.15 .400 (.018±.004) (STAND OFF) (.020±.008) 0.50±0.20 0.05(.002)MIN 2.25(.089)MAX 0.45±0.10 Details of "A" part 0.20(.008) 0.40(.016) 0.18(.007)MAX 0.68(.027)MAX "A" MØ0.13(.005) 0.10(.004)
1994 FUJITSU LIMITED F16015S-2C-4C
(Mounting height) 16-pin Plastic SOP (FPT-16P-M06) Dimensions in mm (inches)
For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT , 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan T el: (044) 754-3763 Fax: (044) 754-3329 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, USA T el: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) T el: (800) 866-8608 Fax: (408) 922-9179 http://www.fujitsumicro.com/ Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany T el: (06103) 690-0 Fax: (06103) 690-122 http://www.fujitsu-ede.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New T ech Park Singapore 556741 T el: (65) 281-0770 Fax: (65) 281-0220 http://www.fmap.com.sg/ F9802 ª FUJITSU LIMITED Printed in Japan All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan.