MB85R256H FUJITSU | Alldatasheet
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DS05-13106-1EFUJITSU SEMICONDUCTOR DATA SHEET Copyright©2006 FUJITSU LIMITED All rights reserved Memory FRAM CMOS
256 K (32 K × 8) Bit
■ DESCRIPTIONS The MB85R256H is an FRAM (Ferroelectric Random Access Memory) chip in a configuration of 32,768 words x 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, MB85R256H is able to retain data without back-up battery. The memory cells used for the MB85R256H has improved at least 10 10 times of read/write access per bit, significantly outperforming FLASH memory and E2PROM in durability. The MB85R256H uses a pseudo - SRAM interface compatible with conventional asynchronous SRAM. ■ FEATURES
- Bit configuration: 32,768 words x 8 bits Read/write durability: 10 10 times/bit (Min) Peripheral circuit CMOS construction Operating power supply voltage: 2.7 V to 3.6 V Operating temperature range: −40 °C to +85 °C 28-pin, SOP flat package 28-pin, TSOP(1) flat package
■ PIN ASSIGNMENTS A A12 I/O0 I/O1 I/O2 GND VCC WE A13 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 22 21 A14 A12 A3 A2 I/O0 I/O1 I/O2 GND VCC A13 A11 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 WE OE (TOP VIEW) (FPT-28P-M17) (FPT-28P-M03) 22 21 A14 A12 A3 A2 I/O0 I/O1 I/O2 GND VCC A13 A11 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 WE OE (FPT-28P-M19)
■ PIN DESCRIPTIONS Pin No. Pin name Function 10 to 1 A 0 to A14 Address Input 11 to 13, 15 to 19 I/O 0 to I/O7 Data input/output
20 CE Chip enable input
27 WE Write Enable input
22 OE Output enable input
28 V CC Power supply ( + 3.3 V Typ)
14 GND Ground
■ BLOCK DIAGRAM ■ FUNCTION LIST H: High level, L: Low level, x: Irrespective of “H” or “L” Operation mode CE WE OE I/O7 to I/O0 Power supply current Standby precharge H × × High-Z Standby (ISB) × LL Latch address L ⎯⎯ Write L L H Data input Operation (ICC) Read L H L Data output Output Disable × HH H i g h - Z A14 to A10 A7 to A0 A8, A9 CE WE OE I/O0-I/O7 A14 to A0 Row de- coder Address latch FRAM array: 32,768 x 8 Block decoder Column decoder Control logic I/O latch bus driver Pseudo-SRAM interface logic circuit I/O7 to I/O0
■ ABSOLUTE MAXIMUM RANGES WARNING: Semiconductor devices can be permanently dam aged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS WARNING: The recommended operating conditions are require d in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. Parameter Symbol Rating Unit Min Max Power supply voltage V CC − 0.5 + 4.0 V Input voltage V IN − 0.5 V CC + 0.5 V Output voltage V OUT − 0.5 V CC + 0.5 V Operating temperature T A − 40 + 85 °C Storage temperature Tstg − 40 + 125 °C Parameter Symbol Value Unit Min Typ Max Power supply voltage V CC 2.7 3.3 3.6 V High level input voltage V IH 0.8 × VCC ⎯ VCC + 0.5 V Low level input voltage V IL − 0.5 ⎯ + 0.6 V Operating temperature T A − 40 ⎯ + 85 °C
■ ELECTRICAL CHARACTERISTICS 1. DC Characteristics (within recommended operating conditions) 2. AC Characteristics (1) Read cycle (within recommended operating conditions) Parameter Symbol Conditions Value Unit Min Typ Max Input leakage current | I LI |V IN = 0 V to VCC ⎯⎯ 10 µA Output leakage current | ILO | VOUT = 0 V to VCC, CE = VIH or OE = VIH ⎯⎯ 10 µA Operating power supply current ICC CE = 0.2 V, Other Inputs = VCC − 0.2 V/0.2 V, tRC (Min), Ii/o = 0 mA ⎯ 51 0 m A Standby current I SB CE, WE, OE ≥ VCC ⎯ 51 0 0 µA High level output voltage VOH IOH = − 100 µA0 . 8 × VCC ⎯⎯ V Low level output voltage VOL IOL = 1.0 mA ⎯⎯ 0.4 V Parameter Symbol Value Unit Min Max Read cycle time t RC 150 ⎯ ns CE active time t CA 70 2,000 Read pulse width t RP 70 2,000 Precharge time t PC 80 ⎯ Address setup time t AS 0 ⎯ Address hold time t AH 25 ⎯ CE access time t CE ⎯ 70 OE access time t OE ⎯ 70 CE output floating time t HZ ⎯ 25 OE output floating time t OHZ ⎯ 25
(2) Write cycle (within recommended operating conditions) (3) Power ON/OFF sequence (within recommended operating conditions) 3. Pin Capacitance 4. AC Characteristics Test Condition Power supply voltage : 2.7 V to 3.6 V Input voltage amplitude : 0.3 V to 2.7 V Input rising time : 10 ns Input falling time : 10 ns Input evaluation level : 2.0 V/0.8 V Output evaluation level : 2.0 V/0.8 V Output load : 100 pF Parameter Symbol Value Unit Min Max Write cycle time t WC 150 ⎯ ns CE active time t CA 70 2,000 Write pulse width t WP 70 2,000 Precharge time t PC 80 ⎯ Address setup time t AS 0 ⎯ Address hold time t AH 25 ⎯ Data setup time t DS 50 ⎯ Data hold time t DH 0 ⎯ Write set up time t WS 0 ⎯ Write hold time t WH 0 ⎯ Parameter Symbol Value Unit Min Typ Max CE LEVEL hold time at power OFF tpd 80 ⎯⎯ ns CE LEVEL hold time at power ON tpu 80 ⎯⎯ ns Power interval tpi 1 ⎯⎯ s Parameter Symbol Conditions Value Unit Min Typ Max Input capacitance C IN VIN = VOUT = GND, f = 1 MHz, TA = + 25 °C ⎯⎯ 10 pF output capacitance C OUT ⎯⎯ 10 pF
■ TIMING DIAGRAM 1. Read cycle (CE Control) 2. Read cycle (OE Control) CE OE I/O7 to I/O0 A14 to A0 WE Valid Valid : Don't care. Valid High-Z High-ZValid tRC tCA tAS tAH tPC tCE tOE tOHZ tHZ tPC tPC tPC tAS tAH tRP tRC “H” level CE OE I/O7 to I/O0 A14 to A0 WE Valid Valid Valid High-Z High-ZValid tRC tCA tAS tAH tPC tCE tOE tOHZ tHZ tPC tPC tPC tAS tAH tRP tRC : Don't care. “H” level
- Write cycle (CE Control) 4. Write cycle (WE Control) CE OE A14 to A0 WE Data In Valid Valid : Don't care. Valid Valid tWC tCA tAS tAH tDS tDH tPCtPC tPCtWH tWS tWH tWStPC tAS tAH tDS tDH tWP tWC “H” level CE OE A14 to A0 WE Data In Valid Valid : Don't care. Valid Valid tWC tCA tAS tAH tDS tDH tPCtPC tPCtWH tWS tWH tWStPC tAS tAH tDS tDH tWP tWC “H” level
■ POWER ON/OFF SEQUENCE ■ NOTES ON USE After IR reflow, the hold of data that was written before IR reflow is not guaranteed. ■ ORDERING INFORMATION Part number Package Remarks MB85R256HPF 28-pin, plastic SOP (FPT-28P-M17) MB85R256HPFTN 28-pin, plastic TSOP(1) (FPT-28P-M03) MB85R256HPFCN 28-pin, plastic TSOP(1) (FPT-28P-M19) Cu Lead Frame tpd tpi tpu CE > VCC × 0.8*CE : Don't CareCE > VCC × 0.8* CE CE VCC 3.0 V VIH (Min) 1.0 V VIL (Max) 0.2 V GND VCC 3.0 V VIH (Min) 1.0 V VIL (Max) 0.2 V GND * : CE (Max) < VCC + 0.5 V
■ PACKAGE DIMENSIONS (Continued) 28-pin plastic SOP Le ad pitch 1.27 mm Package width × package length 8.6 × 17.75 mm Lead shape G ullwing Sealing method Pl astic mold Mounting height 2. 80 mm MAX Weight 0. 82 g Code (Reference) P-SOP28-8.6×17.75-1.27 28-pin plastic SOP (FPT -28P-M17) (FPT-28P-M17) C 2002 FUJITSU LIMITED F28048S-c-3-4 .699 –.008 +.010 –0.20 +0.25 17.75 1.27(.050) 8.60±0.20 (.339±.008) 11.80±0.30 (.465±.012) M0.13(.005) 1528 0.10(.004) 0.47±0.08 (.019±.003) INDEX "A" –0.04 +0.03 0.17 .007 +.001 –.002 0~8˚ 0.25(.010) Details of "A" part (Mounting height)2.65±0.15 (.104±.006) 0.20±0.15 (.008±.006) (Stand off) 0.80±0.20 (.031±.008) 0.88±0.15 (.035±.006) Dimensions in mm (inches). Note: The values in parentheses are reference values. Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder.
(Continued) 28-pin plastic TSOP (I) Le ad pitch 0.55 mm Lead shape Gullwing Sealing method Plastic mold Lead bend direction Normal bend 28-pin plastic TSOP (I) (FPT -28P-M03) (FPT-28P-M03) C 1997 FUJITSU LIMITED F28018S-5C-3 Details of "A" part 0.15(.006) MAX 0.35(.014) MAX INDEX "A" LEAD No. 11.80±0.20 (.465±.008) 13.40±0.20 (.528±.008) 12.40±0.20 (.488±.008) 0.10(.004) 0.50±0.10 (.020±.004) 0.15±0.05 (.006±.002) 0.55(.0217) TYP 0.20±0.10 (.008±.004) M0.09(.004) 7.15(.281)REF 8.00±0.20 (.315±.008) 0(0)MIN (STAND OFF) .043 –.002 +.004 –0.05 +0.10 1.10 (Mounting height) Dimensions in mm (inches). Note: The values in parentheses are reference values.
(Continued) 28-pin plastic TSOP (1) Le ad pitch 0.55 mm Package width × package length 11.80 × 8.00 mm Lead shape G ullwing Sealing method Pl astic mold Mounting height 1.20 mm M ax Weight Approx. 0.25 g Code (Reference) P-TSOP(1)28-11.8×8-0.55 28-pin plastic TSOP (1) (FPT-28P-M19) (FPT-28P-M19) C 2005 FUJITSU LIMITED F28062S-c-3-3 7 8 INDEX 13.40±0.20 (.528±.008) 11.80±0.20 (.465±.008) 0.20±0.10 (.008±.004) M0.09(.004) 0.55(.0217) 8.00±0.20 +.004 –0.05 +0.10 1.10 (Mounting height) 0.10(.004) 0.15±0.05 (.006±.002) TYP 7.15(.281) REF LEAD No. 1 12.40±0.20 (.488±.008) 0.50±0.10 (.020±.004) 0.00(.000) Min (Stand off) Dimensions in mm (inches). Note: The values in parentheses are reference values.
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any ot her right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party’s intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon syst em), or (2) for use requiring extremely high reliability (i.e., su bmersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design m easures into your facility and equipment such as redundancy, fi re protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. Edited Business Promotion Dept.