MB6026A FUJITSU | Alldatasheet
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FUJITSU MICROELECTRONICS SLE D EM 3749?b2 0017155 9 MFNI T-25-1-09 April 1990 ta FUJITSU SS SINGLE CHIP CODEC WITH FILTERS Tho Fujtsu CMOS MB6020A Series consists of both j-law and Alaw single-chip codecfiter IC's for either synchronous-only or sync/asyne operation. ‘ These monolithic single-channel voice frequency codecs incorporate both ai AN transmit and receive circuitry that is used for PCM (pulse caded modulation) Say systems. we} ‘+ Transmit High-pass and Low-pass Fiters PLASTIC PACKAGE ‘* Receive Low-pass Filter with SinX/X Correction . DIP-16P-M03 + Anti-aliasing Fiter * Conforms to CCITT and AT&T Specifications EZ ‘+ Synchronous and Asynchronous Operation: MB6021A, MB6022A Ge SG 3 5k «Synchronous Operation: MB6025A, MB6026A yd + Sorial Data Rates of 64kH2 to 3.152MHz + PLL Circuit as Internal Clock Generator PLASTIC PACKAGE + Internal Voltage Reference LCC-18P-Mo4 * Internal Auto-zero Circuit «TTL Compatible Digital Interface PIN ASSIGNMENT ‘© Input Gain Adjust Ampitior s ¢ Pin Selectable on-chip Analog Loopback ain]sO 7 teh -vs © p-Law: MB6021A, MB6025A Gar tj2 18) DOUT + A-Law: MB6022A, MB6026A ones top Abe * Package i sours “= 126 xsyno 16-pin Plastic DIP Package (Suttix: *) : MB6021A/22A/25A26A, q 18-pin Plastic LCC Package (Suffix: -PD) : MB6021A/22A ed 4 § He Rou. ons 9 RCLK ABSOLUTE MAXIMUM RATINGS (S00 NOTE) MBeO2IA.B50204 a meq] Value Symbol] Ma6d21A | mB6025A o [Pesine Sony vaso | we fOr Perey 7 [es [v}) eds, ween Posiive Supply Voluge | ws POP TeeCy 7 | os | +7 |v Gn2E]8 pop HELPOR [wseven [ae eww [7 [os] hath Je oboe AouT()s 12C NC igital Input Volage low 6 + . Ma6025A, MBBO26A, [Serage tomporanwro [two | T -85 [180 To} | orce pin Atsignmant: Please soe page 19. NOTE: Permanent dovce damage may occu if the above Absolute Maxie == ae mum Ratings are exceeded. Functional operation should be restricta dove cons rau pied he et by Taine tonddane ae detalod's ta cpermiona seciona.af ii date | fee, cha) ae monn arte sheet, Exposure to absoluta maximum rating conditions for extended —__| satan any wenga ghr an asrumad periods may affect device reliability, _vohages to Ws Nigh pence crew Cepirgn® 199009 FUUTSU LMITED 5-21
FUJITSU MICROELECTRONICS 326 D MM 3749762 OOL?LSE O MMFNI MB6021A T-75-11-09 MB6022A MB6025A MB6026A eee Fig. 1 - MB6021A, MB6022A BLOCK DIAGRAM GA2 cat DOUT "I [Por im XSYNC © © XCLK POA.© f > TEST © RSYNC © {Fo | oROLK Fig. 2 ~ MB6025A, MB6026A BLOCK DIAGRAM GA2 {AZ} cmt DOUT mn = in SYNC © ] Koopback > 3 oLk PDL > TEST © IT i on a souroe——<- ° oN ws Vs FA & 5-22
FUJITSU MICROELECTRONICS SLE D SM 3749762 0017157 2 MFNI MB6021A . MB6022A MB6025A MB6026A FUNCTIONAL DESCRIPTION T-78-11-09 The simplified block diagram of the MB6021A and MB6022A is (MB6025A, MB6026A) shown in Figura 1, and the block diagram forthe MB6025A and —_—_The phase locked loop (PLL) generates internal clocks for the MB6026A is shown in Figuro 2. The transmit section (upper _ transmit and receive sections fram the synchronization clock hatt) is composed of an input gain amplifir, an anti-aliasing (SYNC). fiter (ANTI-ALIAS), a band-pass filter (COS, LPF and HPF), and a compressing coder (CODER). An auto-zero circuit (AZ) is also included in this section. The receive section (lower hall) ANALOG LOOPBACK MODE. is composed of an expanding decoder (DECODER) and @ The analog loopback mode allows all decoding and coding low-pass filter (LPF). functions to be exercised without using the analog input (AIN) and analog output (AOUT). In this mode, a digital input signalis Analog signals are input to an operational amplifier to provide {8 avail rom the digital output . The gain asustment “The amoitior| is followed ty 2 2nd exer afalog ouput (AOUT) is forced tothe analog ground (AG) analog anti-aliasing filter (ANTI-ALIAS). This filter provides _‘'@V@I. The analog loopback mode Is selected by connecting the attenuation of 40dB (typical) at the 258kHz affective clock __PD/L input to the negative supply voltage (-VS). : : frequency of the following switched capacitor cosine fier (COS). From the cosine filter, the signals enter a Sth order € low-pass filter (LPF) clocked at 128kHz, followed by a3rdorder +=» POWER DOWN MODE high-pass filter (HPF) clocked at 8kHz. The resulting band- (MB6021A, MB6022A) ass charactoristics moet both the D3/D4 specification and the Two power down modes are provided. The transmit and CCITT G.712 recommendation. The output of the high-pass _raceive sections independently go into power down operation fitar is then sampled by the coder (CODEC) at &kHz. This in the absense of the respective synchronization clock coder transforms the analog signals into 8-bit words using (KSYNC and RSYNC). If the external power down input (PD/L) comprassing aw. The encoded PCM data is then ouput is connacted to a TTL low level, both the transmit and receive serially from the OUTPUT REGISTER at a frequency deter- _section are powered down regardless of the synchronization mined by the external clock, 64kKHz to 3, 152MHz. An auto-zero clocks. During power down operation, AOUT is forced to the circuit (AZ) is utilized for DC offset correction. laval of AG, and DOUT goss into a high-impedance state. (MB6025A, MB6026A) Two power down modes are provided. The device enters RECEIVE SECTION power down mode whan tha synchronization clock (SYNC) is. This itor smooths the decoded signals and corrects for SinX/K stopped. Also, when the external power down Input (PD/t) Is attenuation caused by the 8kHz sample and hold operation. forced to a TTL low lovel, power down mode is initiated The decoder (DECODER) reconstructs the analog signals egardiass of the state of the SYNC clock, During power down from the POM data using expanding law. The decoder is mode, AOUT is forced tothe level of AG, and DOUT goes intoa followad by a Sth order ow pass fiter (LPF), This itersmooths high impedance stato. tho decoded signals and corrects them for the SinXiX attenuation due to the 8kHz sampling and holding operation. TEST MODE INTERNAL CLOCK 1 TEST pinis connected to-VS, test mode allows indepandent (MB60214, MB6022A) evalution of the coder and decoder. In this mode, AIN Is Two independent phase lockad loops (PLL) generate intemal _internally connected to the input of the coder and its outputs clocks for the transmit and receive sections fromthe respective _ available on the DOUT pin. Also, the output of the decoder Is synchronization clocks (KSYNC and RSYNC). made available on pin AOUT. 5-23
: 4 FUJITSU MICROELECTRONICS SLE D, BM 3749?b2 0017158 4 MFMI MB6021A q-15-11-09 MB6022A MB6025A MB6026A SSSA MB6021A, MB6022A | MB6025A, MB6026A Larisalr Nome] no, | —_— Pn named sel AIN Analog Input This is an input pin for analog signals to be filtered and coded, GAI 2 Gain Adjust 1 Ga2 3 Gain Adjust 2 These pins are provided for adjusting the gain of transmit section, GA1 and GA2 are the inverting input and output of the amplifier, respectively. GA2 can drive a load impedance of 10k8 or more and S0pF of lass. Analog Ground All analog signals are referenced to this pin. a = AOUT AOUT Analog Output &! y This pin outputs the decoded and fitered analog signals. It can drive a load - impedance of 3kQ or greater, and 100pF or less. This output is forced to AG level in the analog loopback mode and power down mode. TEST 7 | Test TEST If this pin is at the TTL low level or left open, normal operation mode is| selected. If this pin is connected to -VS, the test mode is selected. tn this ‘mode, AIN is internally connected to the input of the coder and its output is available on the DOUT pin, Also the output of the decoder is directly available on the AOUT pin, Apply voltage should not exceed 2.0V, Digital Input This is a TTL compatible input to the decoder and accepts an eight-bit data Word into the shift register on the falling edge of RCLK. a ROLK Receive Clock This TTL compatible input detines the bit rate on the receive POM highway. The device can operate with clock rates of 64kHiz to 3.152MHz. The digital PCM codes ara accepted on the falling edge of the clock, Digital Input This is a TTL compatible input to the decoder and accepts an eight-bit data Word into the shift register on the falling edge of CLK. XCLK Transmit Clock This TTL compatible input defines the bit rate on the transmit PCM highway. The device can operate with bit rates of 64kHz to 3.152MHz. The digital PCM codes are shifted out of the digital output (DOUT) pin on the rising adge of the XCLK, 5-24
FUJITSU MICROELECTRONICS 32E D EM 3749762 0017159 & MMFMI MB6021A MB6022A MB6025A MB6026A ou ncenpip: T-75-11-09 PIN DESCRIPTION (Cont'd) MB6025A, MB6026A [Pin No_| [ Pane. | Deseription [Pn namal-srcealnNm| CLK Bit Clock This TTL compatible input defines the bit rate on the PCM highway. The device can operate with bit rates of 64kHz to 3.152MHz. The digital PCM codes are shifted out of the digital output (DOUT) pin onthe rising edge of the clock and shifted into the digital input (DIN) pin on the falting ‘edge. RSYNC Receive Synchronization Clock This TTL compatible input defines the beginning of the receive timeslot on the receive PCM highway. it must be synchronized with RCLK. The clock rate is typically 8kHz and its duration can be equal to or more than one RCLK cycle. SYNC ‘Synchronization Clock This TTL compatible input detines the beginning of the transmit and receive & 55 timeslot on the PCM highway. It must be synchronized with CLK, - The clock rate is typically 8kHz and its duration can be equal to or more than ‘one CLK cycle. XSYNC 13 Transmit Synchronization Clock This TTL compatible input defines the beginning of the transmit timestot on the transmit PCM highway. It must be synchronized with XCLK. The clock rate is typically 8kHz and its duration can be equal to or more than one XCLK cycle. a Digital Ground All digital signals are reference to this pin. POL POL Power Down/Analog Loopback This three level input is provided fot the selection of power down mode or analog loopback mode. i this pin is atthe TTL high level, the normal operation is selected. If this pin is at the TTL low level, the device is powered down: regardless of the synchronization clocks. if this pin is connected to -VS, the analog loopback mode Is selected, In this mode, the output of the receive fitter is internally connected to the input of the transmit filter and AOUT is forced to AG level. ouT 17 | DouT Digital Output This is a TTL compatible open-drain output. A pull-up resistor greater than 0.5k must be connected to +VS. PCM digital codes are shifted out of the device on the rising edges of XCLK in| a serial format. ‘This output goes into high-impedance state when eight bits are shifted out of | the output shift register. 5-25
FUJITSU MICROELECTRONICS 31E D 3749?b2 0017160 2 BMFMI MB6021A T-75-11-09 MB6022A MB6025A MB6026A meee RECOMMENDED OPERATING CONDITIONS [Fn] [vain] | ratmo fe tc [in| tye [Fonte Sump voiee 7 fe | we | wre [so [vas |v [nese Soy Vinge te [8 | ve] 35 [a0 | wars |v] Digital Output Load Resistance 7 [ere ts fet me | ffm om | faestee ts et a fe | Tf le | Resistance Analog Output Load eae fe fete | [| [wf » | [SoatsTenmawe | | | wef 3 [= |» |<] DC CHARACTERISTICS (Recommended operating conditions unless otherwise noted.) Pin en [vewe T MB6022A, MB6025A Symbol frm [coe | a Mee020A rae [me | [sve Spy cine | opens |r| «| 7 ve | [70 Pro Poa] [esse SnCu] opens [16 | ve | ve [ [ons [Tan] = mace Eestve Supt SHEE |, >| san Peo oe [pes Tie a] ti XSYNC=RSYNC=' 5-26
FUJITSU MICROELECTRONICS SLE . Mm 3749762 OO171b) 4 MFNI MB6021A MB6022A MB6025A MB6026A -11-09 DC CHARACTERISTICS (Cont'd) 1-76-11 ‘Symbol MB6025A4/26A [rue | | wan | rye | ex | Digital Input 8,9,10 |9, 10, 11 [Rese | PiaRaaMt tte tonne | ve [eo | [we] v | Digital Input 8,9,10 9, 10,11 Ea a Digital Input 8,9,10 9,10, 11 [raeem | PataRafattttef rose [|| [vo [a] Digital Input 8,9,10 |9, 10,11 [emus | PR aBaM tt ror | | [| to | on] Digital Input 8,9,10 9, 10,11 [ogame [aaa] me [om TT [oe | or | Digital Input ry Eee OO Digital Output Ro=0.5kQ jemvoeet | Rass [oe Te [oe fm [| | foal Digital Output [eaeeeien | fs fl | oe fe Tf [fl Digital Output gence [we Pe Te fom TT [eo Analog Input [eaeenee | Tt ft ft | te [mf 0 [| av] Analog Input Ea DD ce 6 Dd james | Tt Pt Tt mm TT fe Capacitance Analog Output jamsnenee | Ts [| | Amn [aso] | i | ay ‘Analog Output Resistance ger ee fe fe eh dob 5-27
. . 4 FUJITSU MICROELECTRONICS SLE D. Gm 3749762 0017162 & EMFNI MB6021A T-75-11-09 MB6022A MB6025A MB6026A eee AC CHARACTERISTICS (MB6021A, MB6022A) (Recommended operating conditions unless otherwise noted.) Digital input 8,9,10 [rece | ooveaw [Hale] © [| # | | Digital I \\—- 8, 9,10] 9, 10, 11 [ravine | aovrow Teavlaenl [Lf | « | ‘Shift Clock feeeey [se foe [me [| ome [me | ‘Shit Clock [iimeras | vee [se [on | ome [ow | | | | Shift Cl jewwae [wow fae [on | [ow | [| o | ” ; Synchronization re: Frequency = ‘Synchronizati re Ea eo XSYNC to XCLK jie fee fe Te [Te | aa ae Delay a a nd ed eee Te [wee Pe to RCLK to DIN Ea DIN to RCLK apres ewe Te | PT [a | XCLK or XSYNC to Notet jasciesgrer [we fowl [Lm | [ae | = | XCLK to DOUT Notet [arena feet fm | [am | | ese we [weer] [=] Lo ee Note 1: DOUT Load Conditions: Ra=0.5kQ, Cu=144pF, +lo=0.4mA 5-28
FUJITSU MICROELECTRONICS 326 D Mi 3749762 OOL?163 8 MMFMI . MB6021A MB6022A MB6025A MB6026A AC CHARACTERISTICS (MB6025A, MB6026A) T-78-11-09 (Recommended operating conditions unless otherwise noted.) ey Ea feet ewe Poe TL [To Ea ee Frequency ° Era a a a cc ES Pr Da SYNC to CLK jemreer | we Pe Pm | | ‘CLK to SYNC jeer Tee Pe eT | CLK to DIN ES Dc DIN to CLK . ape ee Pe Pe TT fel mer [ane eT | ia A a a a Disable Time [eure | mm | * [+ [wl [wl Note 1: DOUT Load Conditions: Ra=0.5kQ, Co=144pF, +lo=0.4mA 5-29
FUJITSU MICROELECTRONICS 32E D KM 3749762 OOL7164 T MMFMI MB6021A MB6022A -11- MB6025A 1-78-11-09 MB6026A eS Fig. 3 ~ MB6021A, MB6022A TIMING DIAGRAM tac xouk 20 == milk SF LAY EN ey Lay Sa ta AAG EX CNG = TAB bs a as __- rome Sy SSa= Ye = aaa te to won to tor Dour gay ———— =I XX SOE Kone te two tor = nou 3QY PENA ZTRI ZENA ZIN INI PER ATEN TN AEN EN fen nowne $8) SEES HP SSSEISIIIa ~ Sk tor tao ON Oy sanaa aK LXE RE at EXE Fig. 4 ~ MB6025A, MB6026A TIMING DIAGRAM twcn 2.0V —-FA——FA--~ pay ele = — — So Ck ev --/-- s\\_fs\\_ /7\\ ya\\ fe Towoe tes twoe one $0) I= a ee [A ee 24y S=SSS= EE ’ i . 7 vy od pour gay —--~--[ Wea ke Ke Ee oe to ls tor 20y ===S=ay == === pean Gee Ge Oca ira Gc) acs Gira Gc Gla 5-30
FUJITSU MICROELECTRONICS SLE D EM 3749762 OOL7165 1 BMFNI MB6021A MB6022A MB6025A MB6026A TRANSMISSION CHARACTERISTICS OF p.-LAW -15-11-09 (MB6021A, MB6025A) (Recommended operating conditions unless otherwise noted.) Conditions ca [ve | oe | Signal to Distortion 1020Hz tone | +3! ~30dBmo 35.0 3B =4od8im0 30.0 0B (Ato) (C Message) ~45d8m0 25.0 B Signal to Distortion 1020Hz tone | #3 t0-G0dBmo 36.9 aB (Ato D) (C Message) rfogiime 319 8 Signal to Distortion 1020Hz tone | +310 -30dBmo 36.0 B —40dBm0 31.0 dB (Oto) (C Message) ~45d8m0 28.0 8 i 3 to ~40dBmo 04 o4 | 4B eons tozaHz tone | -40 to -0d8m0 GTA 08 08 | 4B =50 to -B5d8m0 =20 20 | 8 on Tracki 43 to ~40dBm0 02 02 | oB [acorns | toon | eas | om |] Le S| -50 to ~55dBm0 0.8 08 dB , 43 10 ~40dBm0 02 o2 | 4B oun? 1020Hztona | ~40 to -S0dBmo 04 o4 | 4B -50 to -55dBm0 70.8 08 dB 60- Zz . 300 = 3000Hz 02 B Fraugrey Response 3000 - 3400Hz FRA 02 oB = t2kHz x Relative to dO, 820Hz eo= 00K st Ey 30-9002 : 300 - 3000Hz 0.1 0.15 dB aoa” Response 3000 - 3400Hz 0.1 08 dB $498 = 4ep0rz Note2 FH \\8— 12kH2 x Rolative to od®m0, 820Hz ‘ O- 300Hz 01 dB 300 ~ 3000Hz 4 ots | dB Frequency Response 3000 - 3400Hz 0.1 08 6B .6— 12kH2 x Relative to OdBim0, 820Hz 0B Note 1 : 29 (1- Sin 24000) » Note 2: 14.5 (1- Sin = (4000-1) ) 1200 1200 5-31 a
FUJITSU MICROELECTRONICS SLE D EM 37497?b2 OOL?1bb 3 mur MB6021A T-75-11-09 MB6022A MB6025A MB6026A (MB6021A, MB6025A) (Cont’d) [we [te | toe | Idle Channel Noise 4 a a oe idle Channel Noise a Crosstalk se [eee ew | [fal ‘Analog Input 1020Hz, Od8m0 Lovel £VS=45.0V, Tan25°C all 1.227 Ves Analog Output 1020Hz, OdBm0 Lovet 2V8ai5.0V, Ten 25°C Aol 1227 Vems 1020Hz, 0d8m0 Gain Accurancy Internal VREF ~05 +05 | oB (Ato A) 4VS=85.0V, Tae25°C 03 +03 | ¢B 1020Hz, Od8m0 Internal VREF 025 | 0 | +025 | 4B Gain Accurancy (Ato D) AVS=85.0V, Tre25°C ox ~015 | 0 | 4015 | oB Variation with power Supply £0.02 4B Variation with Temperature £0.001 dBrc 1020Hz, OdBmMO Internal VREF 0.25 ° 40.25 dB Gain Accurancy {Dt0 A) 2VS=45.0V, Tr=25°C 0.15 0 40.15 | dB Variation with power Supply +£0.02 6B Variation with Temperature £0.001 dBrPC 5-32
FUJITSU MICROELECTRONICS BLE D MM 3749762 OOFL7167 5 MEFNI _- MBGO21A MB6022A MB6025A MB6026A a -75-11-09 TRANSMISSION CHARACTERISTICS OF pt-LAW 1-75 (MB6021A, MB6025A) (Cont’d) 500- 600Hz 16 eon 1000 ~ 2e00Hie oa Cea Detection 2600 = 2800Hz 15 1020Hz, od8mo Relative to Minimum Delay o<t<SokHz Idle Chane! Noise aby? (C Message) PSRRA+ +VS +50mVop O<fsSOkHz idle Channel Noise fen (C Message) PSRRA- =VS +50mVop AINsAG AIN Intermoduratic a. 0.47kHz, -10dBm0 aoa , 0.32kHz, -10dBm0 'MAt 8 AOUT (2a-b) AIN i yduratic a. 1.02kHz, -9dBm0 awh ‘ration b. 0.05kHz, -23dBm0 ~~ mo ‘AOUT (a-b) signa Froquncy noise | 2 agit? =70 | d8mo ignal Froquoncy Noise | 4 — 2ookHz -50 | damo (AoA) AIN-AG (Ato A) 4.6 - 200kHz pepe oe Pet Tro (Ato A) AIN=0dBm0, 700 - 1100Hz 5-33 -
FUJITSU MICROELECTRONICS SLE D. MM 3749762 0017168 7 MMFNI MB6021A T-75-11-09 MB6022A MB6025A MB6026A eee TRANSMISSION CHARACTERISTICS OF A-LAW (MB6022A, MB6026A) (Recommended operating conditions unless otherwise noted.) ‘Symbol [wo [ve [ox | SORTS 712 | 4910 -godsmo 35.0 6B 4020Hz tone —40dBm0 30.0 dB PMecsase ~45dBmo 25.0 3B Signal to Di waoay owen =348m0 28.0 38 jm x Method 1 =40d8mo 285 oB =65d8m0 135 3B SCITS 712 | 4310 -sodamo 36.0 B - 1020Hz tone —40dBm0 31.0 dB oe PMessage ~45d8m0 26.0 3B = Signal to Distortion eo) Bape 80x 300 48 CCNTG.712 | -6to imi x 34.0 <8 Mathog 1 Soasmo 295 8 =s5d8m0 145 a8 er 7? | +310 -aodemo 36.0 8 1020Hz tone fog8mo 310 8 preteen ~45d8mo 26.0 8 Signal to Distort (way nn sadgm0 309 4B CCITT G. 712 -6 to ~27dBm0 5 34.0 8 Method 1 osemo 205 3B ~$5dBm0 14.5 6B 5-34
FUJITSU MICROELECTRONICS BLE D MM 3749762 OOL7169 9 BMFNI MB6021A MB6022A MB6025A MB6026A TRANSMISSION CHARACTERISTICS OF A-LAW T-75-11-09 (MB6022A, MB6026A) (Cont'd) Symbol [wie | ve | oe | CCNTG.712 | +3t0~40d8mo ~04 oa | <8 Method 2 —40 to -50dBmO 0.8 0.8 dB Gain Tracking 4020Hz tone _| -50 to -5548m0 GTA =2.0 20 | B wos) CCITT G. 712 | -10t0 -S5dBmo -05 48 Mathod 1 55 to ~60dBm0 1.0 38 CCITG.712 | 4310 -d0d8mo 02 o2 | dB Method 2 40 to -50dBm0 0.4 04 dB Gain Tracking 1020Hz tone _ | -50 to ~S5d8m0 om 08 og | 08 (Ato 0) CCITT. 712 | -10t0-S0dBmo 0.25 0.25 | dB eat 80 to -85dm0 04 o4 | dB 55 to ~60d8m0 ~08 os | 0B CONT G.712 | +3t0~40d8mo 02 02 | oB Method 2 49 to -S068m0 04 04 | dB § 5y Gain Tracking 1020Hz tone _| -50 to -55d8m0 cra ~0.8 08 4B wa) CONT G.712 | ~10t0 -S0dBmo 70.25 025 | 4B Method T 80 to 85480 Ry) o4 | dB 55 10 -B0d8m0 8 os | 08 0- 60Hz 24.0 0B 60 ~ g000H 33 a Fraavercy Response 9000 ~ 3400Hz FRA 03 B (AtoA) 3400 - 4600Hz Note 1 48 4.6 12kHz 64.0 4B Relative to OdBm0, 820Hz O- 60Hz 24.0 6B 200- gosorie 3H ois | 38 = 3000Hz : . Frequency Response 3000 - 3400Hz 0.1 08 4B (Ato0) 3400 - 4600Hz Note 2 3B 4.6— 12kHz 32.0 4B Rolative to Od8m0, 820Hz O- 300Hz 01 dB 300 — 3000Hz 0.41 O15 aB Frequency Response 3000 - 3400Hz —0.1 08 aB (Dto A) 3400 - 4600Hz_ Note2 4B 4.6 12kHz 32.0 dB Relative to OdBm0, 820Hz 3B Note 1: 29(1- Sin 200 ) Note 2: 14.5 (1. Sin 00 200 ) 5-35 \\ : H i
FUJITSU MICROELECTRONICS SLE D GM 3749762 0017170 S BFNI MB6021A T-75-11-09 MB6022A MB60254 MB6026A See TRANSMISSION CHARACTERISTICS OF A-LAW (MB6022A, MB6026A) (Cont'd) PRE [re [em [me fl a a a ‘dle Channel Noi Ee fase [wee me Pw fo] Crosstalk [se [ewe ee fo] ee 1020Hz, OdBmo Analog Input Internal VRE AIL Ves ov 2VS=35.0V, Tax25°C 1020Hz, OdBmo Analog Output internal VAEF AOL 1.210 1.252 | Vims 4VS=35.0V, Tr=25°C 1020Hz, OdBmO Gain Accurancy Internal VREF ~05 405 | 4B (Ato A) - GAA £VSmi5,0V, Tye25°C 0.3 +03 | dB 1020H2, odBmo Internal VREF 025 | 0 | 4026 | ae Gain Accurancy GAX {Ato D) £VSm25.0V, Tex25°C ~015 | 0 | 4015 | op Variation with power Supply +£0.02 4B Variation with Temperature £0.001 dBc 1020Hz, 0dBmo Internal VREF 0.25 oO 40.25 dB Gain Accurancy {Dio A) £VSm45.0V, Tex25°C 015 | 0 | +015 | ae Variation with power Supply 20.02 48 Variation with Temperature +£0.01 dare eR [ewe me ele 5-36
A FUJITSU MICROELECTRONICS BLE D MM 3749?b2 0017171 7 BMFNI MB6021A MB6022A MB6025A MB6026A SSS TRANSMISSION CHARACTERISTICS OF A-LAW J-15-11-09 (MB6022A, MB6026A) (Cont'd) parameter | vane 500~ 600Hz 1.5 600 - 1000Hz 0.75 Delay to Distorion | 200 ~ 00H e 1020+, od8mo Relative to Minimum Delay O<f<S0kHz Idle Channel Noise aon? (P Message) +VS +50mVop AIN=AG OctsS0kHz Idle Channel Noise wens) (P Massage) PSRRA- =VS +50mVop AIN2AG AIN Intermoduration a, 0.47KHz, -10d8m0 -38 (Ato A) b. 0.32kHz, -10dBm0 AOUT (2a-b) AIN Intermodurati a, 1.02kHz, -8d8m0 (aod) ration b. 0.05kHz, -23dBm0 se Bmo AOUT (a-b) - ~ [o- akHe =70 | mo Single Frequoncy Noise | itis —200kHe 50 | dBmo AIN-AG (eee is (toa) 4.kH2 ~ 200KHz pe feast PT de (Ato A) AINsOdBm0, 700 = 1100Hz 5-37
: ‘ FUJITSU MICROELECTRONICS SLE Dd We 3749762 0017172 9 MFNI MB6021A MB6022A T-75-11-09 MB6025A MB6026A eee PACKAGE DIMENSIONS PLASTIC DIP (Suffix: -P) 16-LEAD PLASTIC DUAL IN-LINE. PACKAGE (Case No. : DIP-16P-M03) 766 998 119 45:'229, wwoex-1 _ ae \\ ] 260+ 010 300 (782) Jesoro2m ave Inoex.2 —t Jecifen UT orgie I) gare aie o108- 994 11207895 1307835 woaet8 yh a TUNA | [res vss wax i J L oson2n 001284) |] 0107 38 oo aun max Te ITS rare, © 1988 FUIITSU LIMITED 016030S-30 wets natn) 5-38
FUJITSU MICROELECTRONICS SLE D MM 3749762 0017173 0 man MB6021A MB6022A MB6025A MB6026A J-75-11-09 PACKAGE DIMENSIONS 18-LEAD PLASTIC LEADED CHIP CARRIER (Case No, : LOC-18P-M08) 322 005 “1367 $990 40°98) fee | [Tp easio eansane = Basta ; rdwoex Pt 13300 Swan q | _B. as 003 “465 020 q Bzassoom oveorosn cial R.030(0 75) TYP_ 1501380) cal 02610 68) Ga 2 TP 263+ 020, 608-081 ®: cero Ww. ¢ 1989 FUIITSU LIMITED c18019S-1¢ EO. omnes PIN ASSIGNMENT GA AIN -VS DOUT [2] [+] [ol Gaz [3 | [16] Pow ac [4] [15] DG ne [=| (TOP VIEW) [ia] no aout [6 | [13] XSYNC TEST [12] RSYNC Le} by bel +VS DIN RCLK XCLK MB6021A, MB6022A 5-39