MB40968 FUJITSU | Alldatasheet

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DS04-28308-3EFUJITSU SEMICONDUCTOR DATA SHEET ASSP 2-Channel 8-BIT D/A Converter MB40968/40968V ■ DESCRIPTION The Fujitsu MB40968/40968V is a 2-channel 8-bit high speed digital to analog converter for video frequency band fabricated by Fujitsu Advanced Bipolar T echnology. This is suitable for YC signal processing of digital VCR. ■ FEATURES

  • Resolution: 8-bits
  • L i n e a r i t y e r r o r : ±0.2% (max.)
  • Maximum conversion rate: 30 MHz (Min.)
  • Analog output voltage range: 3 to 5V
  • Reference voltage output: MB40968: Resistance-type potential divider output (3/5 × V CCA ) MB40968V: Band gap reference output (VCCA – 2 [V])
  • Digital input voltage: TTL level
  • Single power supply voltage: +5.0 [V]
  • Power dissipation: 270 [mW] (typ) ■ PACKAGE (DIP-28P-M03) Plastic DIP , 28 pin (FTP-28P-M01) Plastic FTP , 28 pin

■ PIN ASSIGNMENT (TOP VIEW) A A 6 A 7 A 8(LSB) CLKA B 1(MSB) B 2 B 3 B 4 B 5 B 6 B 7 B 8(LSB) CLKB A 4 A 3 A 2 A 1(MSB) V CCD V CCA A OUT A.GND B OUT V CCA V RIN V ROUT COMP D.GND

■ PIN DESCRIPTION Pin Number Symbol I/O Descriptions 25 to 28 1 to 4 A1 to A8 I A-channel Digital Signal Inputs: A1 (MSB), A8 (LSB) 6 to 13 B 1 to B8 I B- channel Digital Signal Inputs: B1 (MSB), B8 (LSB) 5C L K A I A-channel Clock Input

14 CLK B I B-channel Clock Input

24 V CCD — Power Supply for Digital Circuit

19, 23 V CCA — Power Supply for Analog Circuit, two pins (19,23) should be used.

15 D-GND — Ground for Digital Circuit

21 A-GND — Ground for Analog Circuit

Terminal for reference voltage input. Zero scale voltage of analog output is specified applying any voltage to this terminal. Input reference voltage should be 2.7 to 4.3V and, V CCA – VRIN ≤ 2.2V MB40968 VROUT O Terminal for reference voltage output by resistance-type potential divider. Analog output of “VCCA to 3/5 × VCCA ” is supplied connecting this terminal with VRIN terminal. MB40968V VROUT O Terminal for reference voltage output consists of Band Gap reference. This terminal supplies the voltage of “VCCA to VCCA – 2V”. 2V output is maintained connecting this terminal with VRIN, even if the power supply fluctuates frequently.

16 COMP —

Terminal for phase compensation capacitance; Capacitance of 1 µF or more should be inserted between COMP and A- GND.

22 A OUT O A-channel Analog Signal Output

20 B OUT O B-channel Analog Signal Output

■ BLOCK DIAGRAM 8 8 8 AMP. Current SwitchBuffer Master Slave F-F Input Buffer CLK A A 1(MSB) A 2 A 3 A 4 A 5 A 6 A 7 A 8(LSB) A-OUT (A) (A) (A) (A) 8 8 8 Current SwitchBuffer Master Slave F-F Input Buffer CLK B B 1(MSB) B 2 B 3 B 4 B 5 B 6 B 7 B 8(LSB) B-OUT (B) (B) (B) (B) Reference Resistor Reference Voltage D.GND A.GND V ROUT V RIN COMP V CCD V CCA

■ ABSOLUTE MAXIMUM RATINGS Precautions: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Func- tional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ■ RECOMMENDED OPERATING CONDITIONS Rating Symbol Value Unit Power supply voltage V CCA , VCCD –0.5 to +7.0 V Supply voltage difference V CCD – VCCA 1.5 V Digital input voltage V ID –0.5 to +7.0 V Storage temperature T STG –55 to +125 °C Parameter Symbol Value Unit Min. Typ. Max. Power supply voltage VCCA , VCCD (VCCA – VCCD ) 4.75 (–0.2) 5.00 5.25 (0.2) V Analog reference voltage VCCA – VRIN 0.70 2.00 2.20 V VRIN 2.70 3.00 4.30 High level digital Input voltage V IHD 2.0 — — V Low level digital input voltage V ILD —— 0 . 8 V Clock frequency f CLK — — 30 MHz Data set up time t SU 10.0 — — ns Data hold time t h 4.0 — — ns High level clock pulse width t WH 10.0 — — ns Low level clock pulse width t WL 10.0 — — ns Phase compensation capacitance C COMP 1.0 — — µF Operating temperature Top 0 — 70 °C

■ ELECTRICAL CHARACTERISTICS (VCC = 4.75 to 5.25V , T a = 0 to 70°C) *1: *2: VCC = 5.00 (V) MB40968 MB40968V Parameter Symbol Condition Value Unit Min. Typ. Max. Resolution — — — — 8 Bit Linearity error LE DC — — ±0.2 % Reference input current I RIN VRIN = 3.000 (V) — — 10 µA High level digital input current IIHD VIHD = 2.7 (V) — — 20 µA Low level digital input current IILD VILD = 0.4 (V) –100 — — µA 2-channel’s output voltage ratioFSR* 1 VCCA = 5.00 (V) VCCD = 5.00 (V) VRIN = VROUT 0—4% Full-scale analog output voltage VOFS VCCA = 5.00 (V) VCCD = 5.00 (V) VRIN = VROUT VCCA –0.015 VCCA —V Zero-scale analog output voltage VOZS VCCA = 5.00 (V) VCCD = 5.00 (V) VRIN = 3.000 (V) 2.938 3.008 3.078 V Output resistance R O Ta = 25°C 192 240 288 Ω Power supply current I CC VCCA = 5.25 (V) VCCD = 5.25 (V) VRIN = VROUT — 54*2 80 mA Reference output voltage V ROUT VCCA = 5.00 (V) VCCD = 5.00 (V) 2.900 3.000 3.100 V Reference output voltage V ROUT — VCCA –2.100 VCCA –2.000 VCCA –1.900 V Reference output voltage temperature constant — — — 100 — ppm/ °C FSR V OFS A() V OZS A()–

(VCC = 4.75 to 5.25V , T a = 0 to 70°C) Parameter Symbol Condition Value Unit Min. Typ. Max. Minimum conversion rate Fs — 30 — — MSPS Output delay time tPLH tPHL C L = 15 pF Ter m ina ted A.O UT pin with 240Ω Ter m ina ted B.O UT pin with 240Ω —1 0 —n s Output rise time t r —5— n s Output fall time t f —5— n s Settling time tsetLH tsetHL —1 5 —n s

Figure 1 DAC Output Voltage Input A 1 – 8 B 1 – 8 FF (V CCA ) V OFS (V RIN) V OZS Output A OUT B OUT 5.000 V 5.000 V 3.008 V 3.000 V

1 LSB = 8 mV

1.5V 1.5V 90% 50% 10% ±1/2 LSB t PLH t PHL t setLH t setHL t wLt wH t ht su t r t f ±1/2 LSB Data Input Clock Output Analog Output V OZS Figure 2 Timing Diagram

The relations between Digital input code and Analog output voltage of MB40968/40968V are ideally indicated as follows. Output Voltage Ratio between 2 channels is calculated as follows. AOUT N BOUT N() V CCA 255 N– V OFS V CCA= V OZS V CCA 255 FSR V OFS A() V OZS A()–

■ TYPICAL CONNECTION EXAMPLE 5 V DATA Input CLK Input V CCAV CCD D.GND A.GND CLK A CLK B V RIN V ROUT COMP A 1 to A 8 B 1 to B 8 A OUT B OUT 1µF 0.01µF0.01µF 2.2µH 2.2µH 47µF47µF

■ PRECAUTIONS 1. Inter-channel Crosstalk The MB88361 is a 2-channel D/A converter, requiring the use of special mounting methods to minimize crosstalk between analog output pins. Specifically, it is recommended that PC board designs should emphasize the prevention of large coupling capacities between analog output lines. (See ■ TYPICAL CHARACTERISTIC CURVES.) 2. Prevention of Switching Noise To reduce superimposed switching noise on the analog output signal to an absolute minimum, it is recommended that a noise limiting capacitor between the VCCA and VCCD pins be placed as close as possible to the pins and connected to the A.GND and D.GND pins. 3. Power Supply Patterns Power supply patterns connected to the A.GND and B.GND pins should be as possible in order to reduce parasitic impedance.

■ TYPICAL CHARACTERISTIC CURVES (Continued) V CC=5.25 V V RIN=V ROUT 100 Power Supply Current I CC(mA) 0-25 25 50 75 100 Operating Temperature Ta(°C) V CC=5.00 V V RIN=3.000 V 1007550250-25 Operating Temperature Ta(°C) 0.2 0.15 0.1 0.05 Linearity Error |LE|(%) 300 280 260 240 220

200 Output Resistance R O(Ω )

Operating Temperature Ta(°C) Figure 7 Power Supply Current vs. Operating Temperature Figure 8 Linearity Error vs. Operating Temperature Figure 9 Output Resistance vs. Operating Temperature Operating Temperature Ta(°C) V CC=5.00 V V RIN=V ROUT V CC (reference) -10 Full-Scale Analog Output Voltage V OFS(V) 0-25 25 50 75 100 Figure 10 Full-Scale Analog Output Voltage vs. Operating Temperature V CC=5.00 V V RIN=3.000 V 1007550250-25 Operation Temperature Ta(°C) 3.100 3.050 3.000 2.950 2.900Zero-Scale Analog Output Voltage V OZS(V) Figure 11 Zero-Scale Analog Output Voltage vs. Operating Temperature V CC=5.00 V 1007550250-25 Operating Temperature Ta(°C) 3.100 3.050 3.000 2.950 2.900Reference Output Voltage V ROUT (V) Figure 12 MB40968 Reference Output Voltage vs. Operating Temperature

(Continued) Output Rise Time t r Output Fall Time t f (ns) 0-25 25 50 75 100 Operating Temperature Ta(°C) 20 V CC=5.00 V V RIN=V ROUT C L=15 pF OUTPUT 240 Ω (1 V amplitude) OUTPUT OPEN (2 V amplitude) t r t f t r t f Output Rise Time t r Output Fall Time t f(ns) Power Supply Voltage V CC(V)

20 Ta=25°C

V RIN=V ROUT C L=15 pF OUTPUT 240 Ω (1 V amplitude) OUTPUT OPEN (2 V amplitude) t r t f t r t f Output Delay Time t PHL,t PLH(ns) 0-25 25 50 75 100 Operating Temperature Ta(°C) V CC=5.00 V V RIN=V ROUT C L=15 pF OUTPUT OPEN (2 V amplitude) OUTPUT 240 Ω (1 V amplitude) Output Delay Time t PHL,t PLH(ns) Power Suppry Voltage V CC(V) V RIN=V ROUT C L=15 pF OUTPUT OPEN (2 V amplitude) OUTPUT 240 Ω (1 V amplitude) Clock Pulse Width t W (ns) 0-25 25 50 75 100 Operating Temperature Ta(°C) V CC=5.00 V t WL t WH Clock Pulse Width t W (ns) Power Supply Voltage V CC(V) Ta=25°C t WL t WH Figure 19 Output Rise, Fall Time vs. Operating Temperature Figure 20 Output Rise, Fall Time vs. Power Supply Voltage Figure 21 Output Delay Time vs. Operating Temperature Figure 22 Output Delay Time vs. Power Supply Voltage Figure 23 Clock Pulse Width vs. Operating Temperature Figure 24 Clock Pulse Width vs. Power Supply Voltage

■ PACKAGE DIMENSION +.020 –.012 +.008 +0.50 +0.20 –0.30 TYP 10.16(.400) 0.25±0.05 (.010±.002) 23.114(.910)REF (.018±.004) 0.45±0.10 (.070±.007) 3.00(.118)MIN 4.85(.191)MAX (.358±.010) 9.10±0.25 .039 1.024 INDEX-1 MAX 1.778(.070) 1.00 0.51(.020)MIN 15°MAX 26.00 1.778±0.18 INDEX-2

1994 FUJITSU LIMITED D28012S-3C-3C

Dimensions in mm (inch) (DIP-28P-M03) Plastic DIP , 28 pin

+0.05 –0.02 +.002 –.001 +0.25 –0.20 +.010 –.008 (.020±.008) (STAND OFF) 0.05(.002)MIN 0.50±0.20 (.362±.012) 9.20±0.30 2.80(.110)MAX (.018±.004) 0.45±0.10 16.51(.650)REF 1.27(.050)TYP

1 PIN INDEX

0.15 .006 17.75 .699 Details of "A" part 0.60(.024) 0.20(.008) 0.18(.007)MAX 0.68(.027)MAX "A" MØ0.13(.005) 0.10(.004)

1994 FUJITSU LIMITED F28005S-5C-4C Dimensions in mm (inch)

(FTP-28P-M01) Plastic FTP , 28 pin

For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-88, Japan Tel: (044) 754-3753 Fax: (044) 754-3329 North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division

3545 North First Street

San Jose, CA 95134-1804, U.S.A. Tel: (408) 922-9000 Fax: (408) 432-9044/9045 Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10

63303 Dreieich-Buchschlag

Tel: (06103) 690-0 Fax: (06103) 690-122 Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LIMITED No. 51 Bras Basah Road, Plaza By The Park, #06-04 to #06-07 Singapore 189554 Tel: 336-1600 Fax: 336-1609 F9607  FUJITSU LIMITED Printed in Japan All Rights Reserved. Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical semiconductor applications. Com- plete information sufficient for construction purposes is not nec- essarily given. The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu as- sumes no responsibility for inaccuracies. The information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu. Fujitsu reserves the right to change products or specifications without notice. No part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of Fujitsu. The information contained in this document are not intended for use with equipments which require extremely high reliability such as aerospace equipments, undersea repeaters, nuclear con- trol systems or medical equipments for life support.