MAXQ1741 MAXIM | Alldatasheet
Document overview
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Technical content
Features
High-Performance, Low-Power, 16-Bit MAXQ20C RISC Core 6MHz Internal Oscillator (±10%) Up to 12MHz External Crystal Supported 1.7V to 3.6V Operating Voltage 1-Wire® Interface for Debugger and Flash Programming Optimized for C-Compiler S Security AES Hardware Accelerators Hardware True Random-Number Generator Self-Destruct Input for Tamper Detection Permanent Loader Lockout Option Code Scrambling S Memory 16KB Flash Memory
1024 Bytes Memory Page Sectors
1000 Erase/Write Cycles per Sector
1152 Bytes Fast-Wipe NV SRAM, 128 Bytes Usable by Cryptographic Engine 6KB Utility ROM with User-Callable Routines S I/O and Peripherals Triple-Track Magnetic Stripe Head Interface Two SPI Communication Ports USART Communication Port Two 16-Bit Timers I2C Communication Port Up to 16 General-Purpose I/O Pins Up to 8 External Interrupt Pins S Low Power Consumption 3µA Current in Lowest Power Stop Mode 3.75mA (typ) at 6MHz, 0.8mA (typ) at 1MHz Divided System Clock Modes Available S Additional Peripherals On-Chip Power-On/Power-Fail Reset Supply Overvoltage Detection Programmable Watchdog Timer Wake-Up Timer 19-6564; Rev 0; 12/12 Ordering Information appears at end of data sheet. DeepCover is a trademark and MAXQ and 1-Wire are registered trademarks of Maxim Integrated Products, Inc. Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, go to: www.maximintegrated.com/errata. For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/MAXQ1741.related For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. ABRIDGED DATA SHEET
DeepCover Secure Microcontroller for Magnetic Card Reading Block Diagram Detailed Description The MAXQ1741 is a MAXQ20C-based microcontroller intended for integration into magnetic card readers. It can be interfaced directly to a 3-track magnetic card reader head, allowing security features to be added to a POS or ATM card reader right at the machine/card inter - face. Encryption is provided by a hardware AES engine. Security features include a self-destruct input for tamper detection, code scrambling, and fast-wiping of the NV SRAM in the event of a tamper detection and supply- rail monitoring for overvoltage conditions. A 16KB flash memory provides nonvolatile storage for user programs and other static, nonvolatile data. The device provides 1KB of fast-wipe NV SRAM and 128 bytes of data NV SRAM, which instantaneously zeroizes its contents when a tamper is detected. The 128 bytes can be used as data RAM or working RAM for the AES. The fast-wipe feature ensures that any data in the 1KB of memory is destroyed before any application software can access it. Communication peripherals include a hard - ware I 2C, a hardware USART, and two hardware SPIs. A 1-Wire port is available for system programming and application debugging. Microprocessor The MAXQ20C core supports the Harvard memory archi- tecture with separate 16-bit program and data address buses. A fixed 16-bit instruction word is standard, but data can be arranged in 8 or 16 bits. The MAXQ core is implemented as a pipelined processor with performance approaching 1MIPS per MHz. The 16-bit data path is implemented around register modules, and each register module contributes specific functions to the core. The accumulator module consists of sixteen 16-bit registers and is tightly coupled with the arithmetic logic unit (ALU). Program flow is supported by a configurable soft stack. Execution of instructions is triggered by data transfer between functional register modules, or between a func - tional register module and memory. Since data move - ment involves only source and destination modules, circuit switching activities are limited to active modules only. For power-conscious applications, this approach localizes power dissipation and minimizes switching noise. The modular architecture also provides a maxi - mum of flexibility and reusability that are important for a microprocessor used in embedded applications. The MAXQ instruction set is highly orthogonal. All arith - metic and logical operations can use any register in conjunction with the accumulator. Data movement is sup- ported from any register to any other register. Memory is accessed through specific data pointer registers with auto increment/decrement support. Memory The microcontroller incorporates several memory types:
- 16KB flash memory
- 1152 bytes fast-wipe NV SRAM
- 128 bytes of instantaneous zeroization NV SRAM
- 6KB utility ROM
- RAM-based software stack The NV SRAM is cleared by a DRS event. The 128-byte memory can be used as general-purpose memory if the AES function is not in use. Starting the AES engine invali- dates data stored in this memory. 16KB FLASH MEMORY WATCHDOG TIMER INTERNAL 6MHz OSCILLATOR 6KB UTILITY ROM MAXQ RISC CPU 1024B FAST-ERASE DATA NV SRAM VOLTAGE MONITOR/ REGULATOR 256B FAST-WIPE DATA/AES NV SRAM SPI SPI 1-Wire INTERFACE 16-BIT TIMER 16-BIT TIMER I2C GPIO UP TO 16 3-TRACK MAG STRIPE INTERFACE USART WAKE-UP TIMER SELF- DESTRUCT INPUT AES ENCRYPTION ENGINE RANDOM- NUMBER GENERATOR GND +1.7V TO +3.6VMAXQ1741 ABRIDGED DATA SHEET
DeepCover Secure Microcontroller for Magnetic Card Reading
Ordering Information
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Note: Refer to MAXQ174X User’s Guide for more details. +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Additional Documentation Designers must have the following documents to fully use all the features of this device. This data sheet contains pin descriptions, feature overviews, and electrical speci - fications. Errata sheets contain deviations from published specifications. The user’s guides offer detailed informa - tion about device features and operation.
- This MAXQ1741 data sheet, which contains electrical/ timing specifications and pin descriptions.
- The revision-specific MAXQ1741 errata sheet.
- The MAXQ174X User’s Guide, which contains detailed information on core features and operation, including programming. Development and Technical Support A variety of highly versatile, affordably-priced develop - ment tools for this microcontroller are available from Maxim and third-party suppliers, including:
- Compilers
- In-circuit emulators
- Integrated development environments (IDEs) A partial list of development tool vendors can be found at www.maximintegrated.com/MAXQ_tools. For technical support, go to https://support.maximinte- grated.com/micro. Note to readers: This document is an abridged version of the full data sheet. To request the full data sheet, go to www.maximintegrated.com/MAXQ1741 and click on Request Full Data Sheet. PART TEMP RANGE OPERATING VOLTAGE (V) FLASH MEMORY (KB) DATA MEMORY (KB) TYP HEAD INDUCTANCE PIN- PACKAGE MAXQ1741-FBX+ -40NC to +85NC 1.70 to 3.6 16 1 High 28 TQFN-EP* MAXQ1741A-FBX+ -40NC to +85NC 1.70 to 3.6 16 1 Low 28 TQFN-EP* MAXQ1741-DNS+ -40NC to +85NC 1.70 to 3.6 16 1 High Bare die MAXQ1741A-DNS+ -40NC to +85NC 1.70 to 3.6 16 1 Low Bare die PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.