MAXM17572

MAXM17572 AD | Alldatasheet

Document overview

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Technical content

The Himalaya series of voltage regulator ICs, power mod- ules, and chargers enable cooler, smaller, and simpler power-supply solutions. The MAXM17572 is a high-effi - ciency, synchronous, Himalaya step-down DC-DC power module with integrated controller, MOSFETs, compensa - tion components, and inductor that operates over a wide input-voltage range. The module operates from 4.5V to 60V input and delivers up to 1A output current over a pro- grammable output voltage range of 0.9V to 12V. The mod- ule significantly reduces design complexity and manufac - turing risks, and offers a true “plug-and-play” power supply solution, reducing the time-to-market. The MAXM17572 employs peak-current-mode control architecture. The MAXM17572 offers programmable switching frequen- cy, RESET output voltage monitoring, adjustable input undervoltage lockout, and programmable soft-start. The module also features hiccup-mode overload protection and a thermal shutdown function. The MAXM17572 is available in a low-profile, compact, 12-pin 3.5mm x 3.5mm x 2.3mm uSLIC package. Simula - tion models are available.

Applications

• Industrial Power Supplies
• Distributed Supply Regulation
• FPGA and DSP Point-of-Load Regulator
• Base Station Point-of-Load Regulator
• HVAC and Building Control Benefits and Features
• Easy to use
• Wide 4.5V to 60V Input
• Adjustable 0.9V to 12V Output
• ±1.2% Feedback Accuracy
• Up to 1A Output Current
• Internally Control Loop Compensated
• All Ceramic Capacitors
• Flexible Design
• PWM Mode of Operation
• Adjustable Frequency with External Frequency Synchronization (400kHz to 2.2MHz)
• Programmable Soft-Start
• Open-Drain Power Good Output ( RESET Pin)
• Programmable EN/UVLO threshold
• Auxiliary Bootstrap Supply (EXTVCC) for Improved Efficiency
• Robust Operation
• Over Temperature Protection
• Hiccup Over Current Protection
• High Industrial Ambient Operating Temperature Range (-40°C to +125°C)/Junction Temperature Range (-40°C to +150°C)
• Rugged
• Complies with CISPR32 (EN55032) Class B Conducted and Radiated Emissions. Click here to ask an associate for production status of specific part numbers. MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module Ordering Information appears at end of data sheet. 19-101182; Rev 0; 9/21

Typical Application Circuit MMAAXXMM1177557722 IN VCC LX PGND BST RESET OUT EN/UVLO FB VIN (7V to 60V) SS EXTVCC RT/SYNC EP 118kΩ 25.5kΩ 0.1µF 4.7Ω C6 22µF 5V, 1A 0.1µFC1 4.7µF 21.5kΩ C3 5600pF 2.2µF FB FB FSW : 900kHz MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 2

MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 3

Note 1: Junction temperature greater than +125°C degrades operating lifetimes. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Package Information

12 PIN uSLIC

Land Pattern Number 90-100113 Thermal Resistance Four Layer Board (Note 2) Junction to Ambient (θJA) 42°C/W For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Note 2: Package thermal resistance is measured on an evaluation board with no airflow.

Electrical Characteristics

(VIN = VEN/UVLO = 24V, RRT/SYNC = 40.2kΩ, CVCC = 2.2μF, VPGND = VSGND = VEXTVCC = 0, LX = SS = RESET = OUT = OPEN, VBST to VLX = 5V, V FB = 1V, T A = -40°C to +125°C, unless otherwise noted. Typical values are at T A = +25°C. All voltages are referenced to SGND, unless otherwise noted (Note3).) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS INPUT SUPPLY (VIN ) Input Voltage Range VIN 4.5 60 V Input Shutdown Current IIN-SH VEN/UVLO = 0V (shutdown mode) 4.7 7.25 μA Input Quiescent Current IQ_PWM Normal switching mode, VFB = 0.8V 11 mA Enable/Under Voltage Lockout (EN/UVLO) EN/UVLO Threshold VENR VEN/UVLO rising 1.19 1.215 1.26 V VENF VEN/UVLO falling 1.068 1.09 1.131 EN/UVLO Input Leakage Current IENLKG VEN/UVLO = 1.25V, TA = 25°C -50 +50 nA LDO (VCC) VCC Output Voltage Range VCC 6V ≤ VIN ≤ 60V; IVCC = 1mA 4.75 5 5.25 V VCC Current Limit IVCC-MAX VCC = 4.3V, VIN = 7V 25 54 100 mA VCC Dropout VVCC-DO VIN = 4.5V , IVCC = 15mA 0.35 V MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 6

Electrical Characteristics (continued) (VIN = VEN/UVLO = 24V, RRT/SYNC = 40.2kΩ, CVCC = 2.2μF, VPGND = VSGND = VEXTVCC = 0, LX = SS = RESET = OUT = OPEN, VBST to VLX = 5V, V FB = 1V, T A = -40°C to +125°C, unless otherwise noted. Typical values are at T A = +25°C. All voltages are referenced to SGND, unless otherwise noted (Note3).) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VCC UVLO VVCC-UVR VCC rising 4.05 4.2 4.3 V VVCC-UVF VCC falling 3.65 3.8 3.9 EXT LDO (EXTVCC) EXTVCC Switch Over Voltage EXTVCC rising 4.56 4.7 4.84 V EXTVCC falling 4.3 4.45 4.6 EXTVCC Dropout EXTVCC-DO VEXTVCC = 4.75V , IEXTVCC = 15mA 0.3 V EXTVCC Current Limit EXTVCC_CILI M VVCC = 4.5V, VEXTVCC = 7V 26.5 60 105 mA SOFT-START (SS) Soft Start Current ISS VSS = 0.5V 4.7 5 5.3 μA CURRENT LIMIT Peak Current-Limit Threshold IPEAK-LIMIT 2.05 2.47 2.8 A Runaway Current-Limit Threshold IRUNAWAY- LIMIT 2.5 2.76 3.1 A OUTPUT SPECIFICATIONS FB Regulation Voltage VFB_REG 0.889 0.9 0.911 V FB Input Bias Current IFB 0V ≤ VFB ≤ 1V, TA = +25°C -50 +50 nA FB Undervoltage Trip Level to Cause HICCUP VFB-HICF 0.56 0.58 0.65 V HICCUP Timeout (Note 4) 32768 Cycles RT/SYNC and Timings Switching Frequency FSW RRT = OPEN 430 490 550 kHz RRT = 51.1kΩ 370 400 430 RRT = 40.2kΩ 475 500 525 RRT = 8.06kΩ 1950 2200 2450 Synchronization Frequency Capture Range FSW set by RRT 1.1 x FSW 1.4 x FSW Synchronization Pulse Width 50 ns Synchronization Threshold VIH 2.1 V VIL 0.8 Minimum On-Time tON_MIN 60 80 ns Minimum Off-Time tOFF_MIN 140 150 160 ns RESET RESET Output Level Low IRESET = 10mA 400 mV RESET Output Leakage Current TA = TJ = +25°C, VRESET = 5.5V -100 +100 nA MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 7

Electrical Characteristics (continued) (VIN = VEN/UVLO = 24V, RRT/SYNC = 40.2kΩ, CVCC = 2.2μF, VPGND = VSGND = VEXTVCC = 0, LX = SS = RESET = OUT = OPEN, VBST to VLX = 5V, V FB = 1V, T A = -40°C to +125°C, unless otherwise noted. Typical values are at T A = +25°C. All voltages are referenced to SGND, unless otherwise noted (Note3).) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VFB Threshold for RESET Assertion VFB-OKF VFB falling 90.5 92 94.6 % VFB Threshold for RESET De-assertion VFB-OKR VFB rising 93.8 95 97.8 % RESET Delay after FB Reaches 95% Regulation

1024 Cycles

Threshold TSHDNR Temp rising 165 ºC Thermal Shutdown Hysteresis TSHDNHY 10 ºC Note 2: Electrical specifications are production tested at T A = +25°C. Specifications over the entire operating temperature range are guaranteed by design and characterization. Note 3: See the Overcurrent Protection / Hiccup Mode section for more details MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 8

Typical Operating Characteristics (VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at T A = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.) MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 9

Typical Operating Characteristics (continued) (VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at T A = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.) MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 10

Typical Operating Characteristics (continued) (VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at T A = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.) MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 11

Typical Operating Characteristics (continued) (VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at T A = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.) MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 12

Typical Operating Characteristics (continued) (VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at T A = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.) MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 13

Typical Operating Characteristics (continued) (VIN = VEN/UVLO = 24V, VSGND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at T A = +25°C. All voltages are referenced to SGND, unless otherwise noted. The circuit values for different output-voltage applications shown in Table 2, unless otherwise noted.) Pin Configuration PGND EN/UVLO SS VCC LX BST EXTVCC OUT FB RESET RT/SYNC IN EP (SGND) TTDDFFNN 33..55mmmm xx 33..55mmmm INDICATES PIN 1 OF THE MODULE MMAAXXMM1177557722 TOP VIEW Pin Description PIN NAME FUNCTION 1 PGND Power Ground Pin. Connect the PGND pin externally to the power ground plane. MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 14

Pin Description (continued) PIN NAME FUNCTION 2 LX Switching node of the inductor. 3 BST Bootstrap capacitor node.Connect a 0.1μF ceramic capacitor between BST and LX.

4 EXTVCC

External Power Supply Input. Reduces the Internal-LDO Loss. Connect it to OUT when output voltage is programmed between 5V to 12V. When EXTVCC is not used, connect it to SGND. 5 OUT Module Output Pin. Connect a capacitor from OUT to PGND. See the PCB Layout Guidelines section for more details. 6 FB Output Feedback Connection. Connect FB to a resistor-divider between OUT and SGND to set the output voltage.

7 RT/SYNC

Oscillator Timing Resistor Input. Connect a resistor from RT/SYNC to SGND to program the switching frequency from 400kHz to 2.2MHz. Leave RT/SYNC open for the default 490 kHz frequency. An external pulse can be applied to RT/SYNC through a coupling capacitor to synchronize the internal clock to the external pulse frequency. See the Setting the Switching Frequency (RT) and External Frequency Synchronization (SYNC) sections for details. 8 VCC 5V LDO Output of the module. Bypass VCC with a 2.2μF ceramic capacitor to SGND. 9 SS Soft-Start Input. Connect a capacitor from SS to SGND to set the soft-start time. 10 RESET Open-Drain RESET Output. The RESET output is driven low if FB drops below 92% of its set value. RESET goes high 1024 clock cycles after FB rises above 95% of its set value.

11 EN/UVLO

Enable/Under Voltage Lockout Input. Pull EN/UVLO to SGND to disable the module output. Connect EN/UVLO to IN for always-ON operation. Connect a resistor-divider between IN, EN/ UVLO, and SGND to program the input voltage at which the module turns on. 12 IN Power Supply Input. Decouple to PGND with a capacitor; place the capacitor close to IN and PGND pins. - EP Exposed Pad and Signal Ground (SGND). Connect a large copper plane below the module to improve heat dissipation capability. Add thermal vias below the exposed pad. Refer to the MAXM17572 EV kit datasheet for a layout example. MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 15

1.215V MMAAXXMM1177557722 4.7µH LX IN SGND EXTVCC BST OUT VCC SS FB HIGH SIDE MOSFET DRIVER LOW SIDE MOSFET DRIVER LDO CURRENT SENSE HICCUP THERMAL SHUTDOWN VCC VCC HICCUP MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 16

The MAXM17572 is a high-efficiency, synchronous, step-down DC-DC power module with integrated controller, MOSFETs, compensation components, and inductor that operates over a wide input-voltage range. The module operates from 4.5V to 60V input and delivers up to 1A output current over a programmable output voltage range of 0.9V to 12V. When EN/UVLO and the V CC threshold are ascertained to be higher than their respective rising threshold levels, an internal power-up sequence ramps up the error-amplifier reference, resulting in an output-voltage soft-start. The FB pin monitors the output voltage through a resistor divider. The RESET pin transitions to a high-impedance state 1024 clock cycles after the output voltage reaches 95% of regulation. The module operates in pulse-width modulation (PWM) mode providing a constant frequency operation at all loads. The module features a RT/SYNC pin to program the switching frequency. A programmable soft-start feature allows users to reduce input inrush current. The module also incorporates an input enable/undervoltage lockout pin (EN/UVLO) that allows the user to turn on the module at the desired input-voltage level. The module employs a peak-current-mode control architecture. An internal error amplifier compares the feedback voltage to a fixed reference voltage and generates an error voltage. The error voltage is compared to the sum of the current- sense voltage and slope-compensation voltage by a PWM comparator to set the on-time. At each rising edge of the clock, the high-side MOSFET turns on and remains on until either the appropriate or maximum duty cycle is reached, or the peak current limit is detected. During the high-side MOSFET’s on-time, the internal inductor current ramps up. During the rest of the switching cycle, the high-side MOSFET turns off and the low-side MOSFET turns on. The inductor in the module releases the stored energy as its current ramps down and provides current to the output. Linear Regulator (VCC, EXTVCC) The module has two internal low-dropout regulators (LDOs) that power VCC. One LDO is powered from IN and the other LDO is powered from EXTV CC. Only one of the two LDOs is in operation at a time, depending on the voltage levels present at EXTV CC. If EXTV CC voltage is greater than 4.7V (typ), V CC is powered from EXTV CC. If EXTV CC is lower than 4.7V (typ), V CC is powered from IN. Powering V CC from EXTVCC increases efficiency at higher input voltages. EXTVCC voltage should not exceed (VIN + 0.3) and 26V. Typical V CC output voltage is 5V. Bypass V CC to SGND with a 2.2μF low-ESR ceramic capacitor. V CC powers the internal blocks and the low-side MOSFET driver, and recharges the external bootstrap capacitor. The MAXM17572 employs an undervoltage-lockout circuit that forces both the regulators off when V CC falls below 3.8V (typ). The regulators can be immediately enabled again when VCC is higher than 4.2V (typ). The 400mV UVLO hysteresis prevents chattering on power-up/power-down. In applications where the buck converter output is connected to the EXTV CC pin, if the output is shorted to ground, then transfer from EXTVCC LDO to the internal LDO happens seamlessly without any impact on the normal functionality. Enable/Undervoltage Lockout (EN/UVLO), Soft-Start (SS) When EN/UVLO voltage is above 1.215V (typ), the internal error-amplifier reference voltage of the module starts to ramp up. The duration of the soft-start ramp is programmable through the choice of an external capacitor put at the SS pin, allowing a smooth increase of the output voltage. Driving EN/UVLO low disables both power MOSFETs as well as other internal circuitry and reduces IN shutdown current to below 4.7μA (typ). EN/UVLO can be used as an input-voltage UVLO adjustment input. An external voltage-divider between IN and EN/UVLO to SGND adjusts the input voltage at which the module turns on or turns off. If input UVLO programming is not desired, connect EN/UVLO to IN (see the Electrical Characteristics table for EN/UVLO rising and falling threshold voltages). External Frequency Synchronization (SYNC) The internal oscillator of the MAXM17572 can be synchronized to an external clock signal through the RT/ SYNC pin. The external clock should be coupled to the RT/SYNC pin using the circuit as shown in Figure 1. The external synchronization clock frequency must be between 1.1 × FSW and 1.4 × FSW, where FSW is the frequency programmed by the RT resistor (RRT). A resistor must be connected from the RT/SYNC pin to GND to be able to synchronize the MAXM17572 to an external clock. When an external clock is applied to the RT/SYNC pin, the internal oscillator frequency changes to the external clock frequency (from the original frequency based on the RT setting) after detecting 16 external clock edges. The minimum external clock high pulse width and amplitude should be greater than 50ns and 2.1V, respectively. The MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 17

maximum external clock low pulse amplitude should be less than 0.8V. Figure 1. External Clock Synchronization nominal regulated voltage. RESET also goes low during thermal shutdown. useful in applications where digital integrated circuits with multiple rails are powered. and 1024 clock cycles. Hiccup mode of operation ensures low power dissipation under output short-circuit conditions.

VIN = Operating input voltage FSW = Switching Frequency in Hz L = Power module output inductance (4.7µH ±20%) IOUT = Required output (load) current The following condition should be satisfied at the desired load current, IOUT: IOUT + ∆ I 2 < 2.05 Thermal Overload Protection Thermal overload protection limits the total power dissipation in the module. When the junction temperature exceeds +165°C, an on-chip thermal sensor shuts down the module and turns off the internal power MOSFETs, allowing the module to cool down. The thermal sensor turns the module on after the junction temperature cools by 10°C. MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 19

Operating Input Voltage Range The minimum and maximum operating input voltages for a given output voltage should be calculated as follows: VIN(MIN) = (IOUT × 0.3) + VOUT + (IOUT × 0.44) 1 − (FSW(MAX) × tOFF_MIN(MAX)) VIN(MAX) = VOUT FSW(MAX) × tON_MIN(MAX) Where VOUT = Steady-state output voltage IOUT = Maximum load current FSW(MAX) = Worst-case switching frequency in Hz tOFF_MIN(MAX) = Worst case minimum OFF time (160ns) tON_MIN(MAX) = Worst case minimum ON time (80ns) For D > 0.5, VIN(MIN) = 3.09 × VOUT + 1.66 × IOUT − 5.80 × 10 − 3 × FSW 500 Where FSW = Switching frequency in Hz Selection of Input Capacitor The input capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the switching of the module. The input capacitor RMS current requirement (I RMS) is defined by the following equation: IRMS = IOUT(MAX) × √VOUT × (VIN − VOUT) VIN Where IOUT(MAX) is the maximum load current. I RMS has a maximum value when the input voltage equals twice the output voltage (VIN = 2 x VOUT), so: IRMS(MAX) = IOUT(MAX) Choose an input capacitor that exhibits less than +10°C temperature rise at the RMS input current for optimal long- term reliability. Use low-ESR ceramic capacitors with high-ripple-current capability at the input. X7R capacitors are recommended in industrial applications for their temperature stability. Calculate the input capacitance using the following equation: CIN = IOUT(MAX) × D × (1 − D) η × ∆ VIN × FSW Where D is the operating duty cycle of the converter ∆VIN is the allowable input voltage ripple FSW is the operating switching frequency in Hz η is the efficiency of the converter In applications where the source is located away and distant from the device input, an appropriate electrolytic capacitor should be added to provide necessary damping of potential oscillations caused by the inductance of the input power path and input ceramic capacitor. MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 20

Selection of Output Capacitor X7R ceramic output capacitors are preferred due to their stability over temperature in industrial applications. The minimum recommended output capacitor values are listed in Table 1 for desired output voltages to support a dynamic step load of 50% of the maximum output current and to contain the output-voltage deviation to 3% of the output voltage. For additional adjustable output voltages and dynamic step load, the required output capacitance can be calculated from the following equation: COUT = ISTEP × tRESPONSE 2 × ∆ VOUT tRESPONSE ≈ 0.33 fC Where COUT is the required output capacitance ∆VOUT is the allowable output voltage deviation ISTEP is the load current step tRESPONSE is the response time of the controller Select fC to be 1/9th of fSW if the switching frequency is less than or equal to 495kHz. If the switching frequency is more than 495kHz, select f C to be 55kHz. Derating of ceramic capacitors with DC-voltage at appropriate AC voltage (equal to the steady-state output voltage ripple) must be considered when selecting the output capacitor. Derating curves are available from all major ceramic capacitor manufacturers. Selection of Soft-Start Capacitor The module implements an adjustable soft-start operation to reduce inrush current during startup. A capacitor (C SS) connected from the SS pin to SGND to program the soft-start time. The selected output capacitance (C SEL) and the output voltage (V OUT) determine the minimum value of C SS, as shown by the following equation: CSS ≥ 56 × 10 − 6 × CSEL × VOUT The soft-start time (tSS) is related to the capacitor connected at SS (CSS) by the following equation: tSS = CSS 5.55 × 10 − 6 For example, to program a 1ms soft-start time, a 5.6nF capacitor should be connected from the SS pin to SGND. Note that during start-up, the module operates at half the programmed switching frequency until the output voltage reaches 66.7% of set output nominal voltage. Setting the Input Undervoltage-Lockout Level The module offers an adjustable input undervoltage-lockout level. Set the voltage at which the module turns on with a resistive voltage-divider connected from IN to SGND (see Figure 2). Connect the center node of the divider to EN/UVLO. Choose R1 to be 3.3MΩ (max) and then calculate R2 as follows: R2 = R1 × 1.215 VINU − 1.215 where VINU is the voltage at which the module is required to turn on. See Table 1 to set the proper VINU voltage greater than or equal to the minimum input voltage for each desired output voltage. If the EN/UVLO pin is driven from an external signal source, it is recommended to place a series resistance of 1kΩ minimum between the signal source output and the EN/UVLO pin to reduce voltage ringing on the line. MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 21

490kHz. See Table 1 for RRT resistor values for a few common switching frequencies. Table 1. Switching Frequency vs. RT Resistor

490 OPEN

Table 2. Selection of Component Values

η is the efficiency of the power module at the desired operating conditions See the Typical Operating Characteristics for the power-conversion efficiency or measure the efficiency to determine the total power dissipation. An EE-Sim model is available for the MAXM17572 to simulate efficiency and power loss for the desired operating conditions. The junction temperature (T J) of the module can be estimated at any given maximum ambient temperature (TA) from the following equation: TJ = TA + [θJA × PLOSS] Where θJA is the junction to ambient thermal resistance. For the MAXM17572 evaluation board, the thermal resistance from junction-to-ambient (θJA) is 42°C/W. Operating the module at junction temperatures greater than +125°C degrades operating lifetimes. PCB Layout Guidelines Careful PCB layout is critical to achieve low switching losses and stable operation. Use the following guidelines for good PCB layout:

• Keep the input capacitors as close as possible to the IN and PGND pins
• Keep the output capacitors as close as possible to the OUT and PGND pins
• Keep the resistive feedback divider as close as possible to the FB pin
• Connect all of the PGND connections to a copper plane area as large as possible on the bottom layer
• Connect EP to SGND plane on bottom layer
• Use multiple vias to connect internal PGND planes to the top layer PGND plane
• Do not keep any solder mask on EP on bottom layer. Keeping solder mask on exposed pads decreases the heat dissipating capability
• Refer to the MAXM17572 EV kit layout for first pass success MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 24

Figure 4. Layout Guidelines

Typical Application Circuits 5V Output Typical Application Circuit MAXM17572 IN VCC LX PGND BST RESET OUT EN/UVLO FB VIN (7V to 60V) SS EXTVCC RT/SYNC EP 118kΩ 25.5kΩ 0.1µF 4.7Ω 22µF 5V, 1A 0.1µF 4.7µF 21.5kΩ 5600pF 2.2µF C1 = 4.7µF/100V/1206/Murata GRM31CZ72A475K C2 = 2.2µF/10V/0603/Murata GRM188R71A225K C4 = 0.1µF/25V/0402/Murata GRM155R71E104K C6 = 22µF/25V/1210/Murata GRM32ER71E226K FSW : 900kHz 3.3MΩ 732kΩ 3.3V Output Typical Application Circuit MAXM17572 IN VCC LX PGND BST RESET OUT EN/UVLO FB SS EXTVCC RT/SYNC EP 22µF 3.3V,1A 0.1µF 4.7µF 33.2kΩ 5600pF 2.2µF 41.2kΩ 110kΩ C1 = 4.7µF/100V/1206/Murata GRM31CZ72A475K C2 = 2.2µF/10V/0603/Murata GRM188R71A225K C4 = 0.1µF/25V/0402/Murata GRM155R71E104K C5 = 22µF/25V/1210/Murata GRM32ER71E226K FSW : 600kHz VIN (5V to 60V) 3.3MΩ 1.1MΩ MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 26

Ordering Information

PART NUMBER TEMP RANGE PIN PACKAGE MAXM17572AMC+ -40°C to +125°C 12-pin 3.5mm x 3.5mm x 2.3mm uSLIC Package MAXM17572AMC+T -40°C to +125°C 12-pin 3.5mm x 3.5mm x 2.3mm uSLIC Package +Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel. MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module www.analog.com Analog Devices | 27

Revision History

0 9/21 Release for Market Intro — Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. MAXM17572 4.5V to 60V, 1A Himalaya uSLIC Step-Down Power Module w w w . a n a l o g . c o m Analog Devices | 28