MAX7030_V4

MAX7030_V4 MAXIM | Alldatasheet

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Technical content

Features

♦ +2.1V to +3.6V or +4.5V to +5.5V Single-Supply Operation ♦ Single-Crystal Transceiver ♦ Factory-Preset Frequency (No Serial Interface Required) ♦ ASK/OOK Modulation ♦ +10dBm Output Power into 50Ω Load ♦ Integrated TX/RX Switch ♦ Integrated Transmit and Receive PLL, VCO, and Loop Filter ♦ > 45dB Image Rejection ♦ Typical RF Sensitivity*: -114dBm ♦ Selectable IF Bandwidth with External Filter ♦ < 12.5mA Transmit-Mode Current ♦ < 6.7mA Receive-Mode Current ♦ < 800nA Shutdown Current ♦ Fast-On Startup Feature, < 250µs ♦ Small, 32-Pin, Thin QFN Package MAX7030 Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL

Ordering Information

19-3706; Rev 4; 6/12 1For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. PART TEMP RANGE PIN-PACKAGE MAX7030_ATJ+ -40 °C to +125°C 32 Thin QFN-EP** Product Selector Guide PART CARRIER FREQUENCY (MHz) MAX7030LATJ+ 315 MAX7030HATJ+ 433.92 *0.2% BER, 4kbps Manchester-encoded data, 280kHz IF BW +Denotes a lead(Pb)-free/RoHS-compliant package. **EP = Exposed pad. Note: The MAX7030 is available with factory-preset operating frequencies. See the Product Selector Guide for complete part numbers. Pin Configuration, Typical Application Circuit, and Functional Diagram appear at end of data sheet.

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL ABSOLUTE MAXIMUM RATINGS Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ENABLE, T/R, DATA, AGC0, AGC1, HVIN+ 0.3V) Continuous Power Dissipation (TA = +70°C) 32-Pin Thin QFN (derate 21.3mW/°C DC ELECTRICAL CHARACTERISTICS (Typical Application Circuit, 50Ω system impedance, VAVDD = VDVDD = VHVIN = VPAVDD = +2.1V to +3.6V, fRF = 315MHz or 433.92MHz, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V AVDD = V DVDD = V HVIN = V PAVDD = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage (3V Mode) V DD HVIN, PAVDD, AVDD, and DVDD connected to power supply 2.1 2.7 3.6 V Supply Voltage (5V Mode) HVIN PAVDD, AVDD, and DVDD unconnected from HVIN, but connected together 4.5 5.0 5.5 V fRF = 315MHz 3.5 5.4Transmit mode, PA off, VDATA at 0% duty cycle (Note 2) fRF = 434MHz 4.3 6.7 fRF = 315MHz 7.6 12.3Transmit mode, VDATA at 50% duty cycle (Notes 3, 4) fRF = 434MHz 8.4 13.6 fRF = 315MHz 11.6 19.1Transmit mode, VDATA at 100% duty cycle (Note 2) fRF = 434MHz 12.4 20.4 Receiver 315MHz 6.1 7.9 Receiver 434MHz 6.4 8.3 mA Deep-sleep (3V mode) 0.8 8.8 TA < +85°C, typ at +25°C (Note 4) Deep-sleep (5V mode) 2.4 10.9 µA Receiver 315MHz 6.4 8.2 Receiver 434MHz 6.7 8.4 mA Deep-sleep (3V mode) 8.0 34.2 Supply Current I DD TA < +125°C, typ at +125°C (Note 2) Deep-sleep (5V mode) 14.9 39.3 µA Voltage Regulator V REG VHVIN = 5V, ILOAD = 15mA 3.0 V DIGITAL I/O Input-High Threshold V IH (Note 2) 0.9 x VHVIN V Input-Low Threshold V IL (Note 2) 0.1 x VHVIN V

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL AC ELECTRICAL CHARACTERISTICS (Typical Application Circuit , 50 Ω system impedance, V PAVDD = V AVDD = V DVDD = V HVIN = +2.1V to +3.6V, f RF = 315MHz or 433.92MHz, T A = -40°C to +125°C, unless otherwise noted. Typical values are at V PAVDD = V AVDD = V DVDD = V HVIN = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS GENERAL CHARACTERISTICS Frequency Range 315/433.92 MHz Maximum Input Level P RFIN 0 dBm fRF = 315MHz (Note 6) 32Transmit Efficiency 100% Duty Cycle fRF = 434MHz (Note 6) 30 fRF = 315MHz (Note 6) 24Transmit Efficiency 50% Duty Cycle fRF = 434MHz (Note 6) 22 ENABLE or T/R transition low to high, transmitter frequency settled to within 50kHz of the desired carrier 200 ENABLE or T/R transition low to high, transmitter frequency settled to within 5kHz of the desired carrier

350 Power-On Time t ON

ENABLE transition low to high, or T/ R transition high to low, receiver startup time (Note 5) 250 μs RECEIVER 315MH z -114 Sensitivity 0.2% BER, 4kbps Manchester data rate, 280kHz IF BW, average RF power 434MH z -113 dBm Image Rejection 46 dB POWER AMPLIFIER TA = +25 °C (Note 4) 4.6 10.0 15.5 TA = +125 °C, VPAVDD = VAVDD = VDVDD = VHVIN = +2.1V (Note 2) 3.9 6.7 Output Power P OUT TA = -40°C, VPAVDD = VAVDD = VDVDD = VHVIN = +3.6V (Note 4) 13.1 15.8 dBm Modulation Depth 82 dB Maximum Carrier Harmonics With output-matching network -40 dBc Reference Spur -50 dBc DC ELECTRICAL CHARACTERISTICS (continued) (Typical Application Circuit, 50Ω system impedance, VAVDD = VDVDD = VHVIN = VPAVDD = +2.1V to +3.6V, fRF = 315MHz or 433.92MHz, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V AVDD = V DVDD = V HVIN = V PAVDD = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Pulldown Sink Current AGC 0- 2, E N ABLE , T/R, D ATA ( V H V I N = 5.5V ) 20 µA Output-Low Voltage V OL ISINK = 500µA 0.15 V Output-High Voltage V OH ISOURCE = 500µA V H V IN - 0.26 V

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL AC ELECTRICAL CHARACTERISTICS (continued) (Typical Application Circuit , 50 Ω system impedance, V PAVDD = V AVDD = V DVDD = V HVIN = +2.1V to +3.6V, f RF = 315MHz or 433.92MHz, T A = -40°C to +125°C, unless otherwise noted. Typical values are at V PAVDD = V AVDD = V DVDD = V HVIN = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS PHASE-LOCKED LOOP Transmit VCO Gain K VCO 340 MHz/V 10kHz offset, 200kHz loop BW -68 Transmit PLL Phase Noise 1MHz offset, 200kHz loop BW -98 dBc/Hz Receive VCO Gain 340 MHz/V 10kHz offset, 500kHz loop BW -80 Receive PLL Phase Noise 1MHz offset, 500kHz loop BW -90 dBc/Hz Transmit PLL 200 Loop Bandwidth Receive PLL 500 kHz Reference Frequency Input Level 0.5 V P-P LOW-NOISE AMPLIFIER/MIXER (Note 8) fRF = 315MHz 1 - j4.7 LNA Input Impedance Z INLNA Normalized to 50 fRF = 434MHz 1- j3.3 fRF = 315MHz 50 High-gain state fRF = 434MHz 45 fRF = 315MHz 13 Voltage-Conversion Gain Low-gain state fRF = 434MHz 9 dB High-gain state -42 Input-Referred, 3rd-Order Intercept Point IIP3 Low-gain state -6 dBm Mixer-Output Impedance 330 LO Signal Feedthrough to Antenna -100 dBm RSSI Input Impedance 330 Operating Frequency f IF 10.7 MHz 3dB Bandwidth 10 MHz Gain 15 mV/dB ANALOG BASEBAND Maximum Data-Filter Bandwidth 50 kHz Maximum Data-Slicer Bandwidth 100 kHz Maximum Peak-Detector Bandwidth 50 kHz Manchester coded 33 Maximum Data Rate Nonreturn to zero (NRZ) 66 kbps

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL AC ELECTRICAL CHARACTERISTICS (continued) (Typical Application Circuit , 50 Ω system impedance, V PAVDD = V AVDD = V DVDD = V HVIN = +2.1V to +3.6V, f RF = 315MHz or 433.92MHz, T A = -40°C to +125°C, unless otherwise noted. Typical values are at V PAVDD = V AVDD = V DVDD = V HVIN = +2.7V, TA = +25°C, unless otherwise noted.) (Note 1) Note 1: Supply current, output power, and efficiency are greatly dependent on board layout and PAOUT match. Note 2: 100% tested at TA = +125°C. Guaranteed by design and characterization overtemperature. Note 3: 50% duty cycle at 10kHz ASK data (Manchester coded). Note 4: Guaranteed by design and characterization. Not production tested. Note 5: Time for final signal detection; does not include baseband filter settling. Note 6: Efficiency = POUT/(VDD x IDD). Note 7: Dependent on PCB trace capacitance. Note 8: Input impedance is measured at the LNAIN pin. Note that the impedance at 315MHz includes the 12nH inductive degenera- tion from the LNA source to ground. The impedance at 434MHz includes a 10nH inductive degeneration connected from the LNA source to ground. The equivalent input circuit is 50Ω in series with ~2.2pF. The voltage conversion is measured with the LNA input-matching inductor, the degeneration inductor, and the LNA/mixer tank in place, and does not include the IF filter insertion loss. Typical Operating Characteristics (Typical Application Circuit, VPAVDD = VAVDD = VDVDD = VHVIN = +3.0V, fRF = 433.92MHz, IF BW = 280kHz, 4kbps Manchester encod- ed, 0.2% BER, TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX7030 toc01 SUPPLY VOLTAGE (V) SUPPLY CURRENT (mA) 3.33.02.72.4 5.8 6.0 6.2 6.4 6.6 6.8 7.0 5.6 2.1 3.6 +85°C +125°C +25°C -40°C SUPPLY CURRENT vs. RF FREQUENCY MAX7030 toc02 RF FREQUENCY (MHz) SUPPLY CURRENT (mA) 425400325 350 375 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.0 300 450 +85°C +125°C +25°C -40°C DEEP-SLEEP CURRENT vs. TEMPERATURE MAX7030 toc03 TEMPERATURE (°C) DEEP-SLEEP CURRENT (μA) 1108535 60-10-15 -40 VCC = +3.6V VCC = +3.0V VCC = +2.1V RECEIVER PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CRYSTAL OSCILLATOR Crystal Frequency f XTAL (fRF -10.7) /24 MHz Frequency Pulling by V DD 2 ppm/V Crystal Load Capacitance (Note 7) 4.5 pF

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL BIT-ERROR RATE vs. AVERAGE INPUT POWER MAX7030 toc04 AVERAGE INPUT POWER (dBm) BIT-ERROR RATE (%) -113-115-117-119 0.1 100 0.01 -121 -111 fRF = 434MHz fRF = 315MHz 0.2% BER SENSITIVITY vs. TEMPERATURE TEMPERATURE (°C) SENSITIVITY (dBm) 11085603510-15 -117 -114 -111 -108 -105 -102 -120 -40 MAX7030 toc05 fRF = 434MHz fRF = 315MHz RSSI vs. RF INPUT POWER MAX7030 toc06 RF INPUT POWER (dBm) RSSI (V) 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 -130 10 LOW-GAIN MODE HIGH-GAIN MODE AGC SWITCH POINT AGC HYSTERESIS: 3dB RSSI AND DELTA vs. IF INPUT POWER MAX7030 toc07 IF INPUT POWER (dBm) RSSI (V) -10-30-50-70 0.3 0.6 0.9 1.2 1.5 1.8 2.1 -90 10 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 -3.5 DELTA (%) RSSI DELTA SYSTEM GAIN vs. IF FREQUENCY MAX7030 toc08 IF FREQUENCY (MHz) SYSTEM GAIN (dBm) 252015105 -10 -20 03 0 LOWER SIDEBAND UPPER SIDEBAND FROM RFIN TO MIXOUT fRF = 434MHz 48dB IMAGE REJECTION IMAGE REJECTION vs. TEMPERATURE MAX7030 toc09 TEMPERATURE (°C) IMAGE REJECTION (dB) 11085603510-15 -40 fRF = 433MHz fRF = 315MHz S11 SMITH PLOT OF RFIN MAX7030 toc12 433MHz 500MHz400MHz NORMALIZED IF GAIN vs. IF FREQUENCY MAX7030 toc10 IF FREQUENCY (MHz) NORMALIZED IF GAIN (dB) -16 -12 -20 1 100 S11 vs. RF FREQUENCY MAX7030 toc11 RF FREQUENCY (MHz) S11 (dB) 450400350300250 -18 -12 -24 200 500 433.92MHz Typical Operating Characteristics (continued) (Typical Application Circuit, VPAVDD = VAVDD = VDVDD = VHVIN = +3.0V, fRF = 433.92MHz, IF BW = 280kHz, 4kbps Manchester encod- ed, 0.2% BER, TA = +25°C, unless otherwise noted.) RECEIVER

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL INPUT IMPEDANCE vs. INDUCTIVE DEGENERATION MAX7030 toc14 INDUCTIVE DEGENERATION (nH) REAL IMPEDANCE (Ω) IMAGINARY IMPEDANCE (Ω) -210 -200 -190 -180 -170 -160 -150 -220 1 100 fRF = 434MHz IMAGINARY IMPEDANCE REAL IMPEDANCE PHASE NOISE vs. OFFSET FREQUENCY MAX7030 toc15 OFFSET FREQUENCY (Hz) PHASE NOISE (dBc/Hz) 1M100k10k1k -110 -100 -90 -80 -70 -60 -50 -120 100 10M fRF = 315MHz PHASE NOISE vs. OFFSET FREQUENCY MAX7030 toc16 OFFSET FREQUENCY (Hz) PHASE NOISE (dBc/Hz) -110 -100 -90 -80 -70 -60 -50 -120 fRF = 433MHz 1M100k10k1k100 10M Typical Operating Characteristics (continued) (Typical Application Circuit, VPAVDD = VAVDD = VDVDD = VHVIN = +3.0V, fRF = 433.92MHz, IF BW = 280kHz, 4kbps Manchester encod- ed, 0.2% BER, TA = +25°C, unless otherwise noted.) RECEIVER INPUT IMPEDANCE vs. INDUCTIVE DEGENERATION MAX7030 toc13 INDUCTIVE DEGENERATION (nH) REAL IMPEDANCE (Ω) IMAGINARY IMPEDANCE (Ω) -280 -270 -260 -250 -240 -230 -220 -290 1 100 fRF = 315MHz IMAGINARY IMPEDANCE REAL IMPEDANCE

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL Typical Operating Characteristics (continued) (Typical Application Circuit, VPAVDD = VAVDD = VDVDD = VHVIN = +3.0V, fRF = 433.92MHz, IF BW = 280kHz, 4kbps Manchester encod- ed, 0.2% BER, TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX7030 toc17 SUPPLY VOLTAGE (V) SUPPLY CURRENT (mA) 3.33.02.72.4 2.1 3.6 fRF = 315MHz PA ON WITHOUT ENVELOPE SHAPING TA = +85°C TA = +125°C TA = -40°C TA = +25°C SUPPLY CURRENT (mA) 2.5 3.0 3.5 4.0 5.0 4.5 5.5 6.0 2.0 SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX7030 toc18 SUPPLY VOLTAGE (V) fRF = 315MHz PA OFF TA = +85°C TA = +125°C TA = -40°CTA = +25°C SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX7030 toc19 SUPPLY VOLTAGE (V) SUPPLY CURRENT (mA) 3.33.02.72.4 2.1 3.6 fRF = 434MHz PA ON WITHOUT ENVELOPE SHAPING TA = +85°C TA = +125°C TA = -40°C TA = +25°C SUPPLY CURRENT (mA) 3.0 3.5 4.0 5.0 4.5 5.5 6.0 SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX7030 toc20 SUPPLY VOLTAGE (V) fRF = 434MHz PA OFF TA = +85°C TA = +125°C TA = -40°C TA = +25°C SUPPLY CURRENT vs. OUTPUT POWER AVERAGE OUTPUT POWER (dBm) 62-10 -6 -2 -14 10 MAX7030 toc21 SUPPLY CURRENT (mA) fRF = 315MHz PA ON ENVELOPE SHAPING ENABLED PA ON 50% DUTY CYCLE SUPPLY CURRENT vs. OUTPUT POWER AVERAGE OUTPUT POWER (dBm) 62-10 -6 -2 -14 10 MAX7030 toc22 SUPPLY CURRENT (mA) fRF = 434MHz PA ON ENVELOPE SHAPING ENABLED PA ON 50% DUTY CYCLE SUPPLY CURRENT AND OUTPUT POWER vs. EXTERNAL RESISTOR MAX7030 toc23-1 EXTERNAL RESISTOR (Ω) SUPPLY CURRENT (mA) 1k1001 10 0.1 10k -12 -16 OUTPUT POWER (dBm) fRF = 315MHz PA ON POWER CURRENT SUPPLY CURRENT AND OUTPUT POWER vs. EXTERNAL RESISTOR MAX7030 toc23-2 EXTERNAL RESISTOR (Ω) SUPPLY CURRENT (mA) 1k1001 10 0.1 10k -12 -16 OUTPUT POWER (dBm) fRF = 433MHz PA ON POWER CURRENT TRANSMITTER

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL OUTPUT POWER vs. SUPPLY VOLTAGE MAX7030 24-1 SUPPLY VOLTAGE (V) OUTPUT POWER (dBm) 3.33.02.72.4 2.1 3.6 fRF = 315MHz PA ON ENVELOPE SHAPING DISABLED TA = -40°C TA = +25°C TA = +125°C TA = +85°C OUTPUT POWER vs. SUPPLY VOLTAGE MAX7030 24-2 SUPPLY VOLTAGE (V) OUTPUT POWER (dBm) 3.33.02.72.4 2.1 3.6 fRF = 315MHz PA ON ENVELOPE SHAPING ENABLED TA = +125°C TA = +25°C TA = -40°C TA = +85°C OUTPUT POWER vs. SUPPLY VOLTAGE MAX7030 25-1 SUPPLY VOLTAGE (V) OUTPUT POWER (dBm) 3.33.02.72.4 2.1 3.6 fRF = 434MHz PA ON ENVELOPE SHAPING DISABLED TA = +85°C TA = +125°C TA = +25°C TA = -40°C OUTPUT POWER vs. SUPPLY VOLTAGE MAX7030 25-2 SUPPLY VOLTAGE (V) OUTPUT POWER (dBm) 3.33.02.72.4 2.1 3.6 fRF = 434MHz PA ON ENVELOPE SHAPING ENABLED TA = +85°C TA = +125°C TA = +25°C TA = -40°C EFFICIENCY vs. SUPPLY VOLTAGE MAX7030 toc26 SUPPLY VOLTAGE (V) EFFICIENCY (%) 3.33.02.72.4 2.1 3.6 TA = +85°C TA = +125°C TA = +25°C TA = -40°CfRF = 315MHz PA ON EFFICIENCY vs. SUPPLY VOLTAGE MAX7030 toc27 SUPPLY VOLTAGE (V) EFFICIENCY (%) 3.33.02.72.4 2.1 3.6 TA = +85°C TA = +125°C TA = +25°C TA = -40°C fRF = 434MHz PA ON EFFICIENCY vs. SUPPLY VOLTAGE MAX7030 toc28 SUPPLY VOLTAGE (V) EFFICIENCY (%) 3.33.02.72.4 2.1 3.6 TA = +85°C TA = +125°C TA = +25°C TA = -40°C fRF = 315MHz 50% DUTY CYCLE EFFICIENCY vs. SUPPLY VOLTAGE MAX7030 toc29 SUPPLY VOLTAGE (V) EFFICIENCY (%) 3.33.02.72.4 2.1 3.6 TA = +85°C TA = +125°C TA = +25°C TA = -40°C fRF = 434MHz 50% DUTY CYCLE PHASE NOISE vs. OFFSET FREQUENCY MAX7030 toc30 OFFSET FREQUENCY (Hz) PHASE NOISE (dBc/Hz) 1M100k10k1k -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -140 100 10M fRF = 315MHz Typical Operating Characteristics (continued) (Typical Application Circuit, VPAVDD = VAVDD = VDVDD = VHVIN = +3.0V, fRF = 433.92MHz, IF BW = 280kHz, 4kbps Manchester encoded, 0.2% BER, TA = +25°C, unless otherwise noted.) TRANSMITTER

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL PHASE NOISE vs. OFFSET FREQUENCY MAX7030 toc31 OFFSET FREQUENCY (Hz) PHASE NOISE (dBc/Hz) -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -140 fRF = 434MHz 1M100k10k1k100 10M REFERENCE SPUR MAGNITUDE vs. SUPPLY VOLTAGE MAX7030 toc32 SUPPLY VOLTAGE (V) REFERENCE SPUR MAGNITUDE (dBc) 3.33.02.72.4 -65 -60 -55 -50 -45 -40 -70 2.1 3.6 434MHz 315MHz -10 FREQUENCY STABILITY vs. SUPPLY VOLTAGE MAX7030 toc33 SUPPLY VOLTAGE (V) FREQUENCY STABILITY (ppm) fRF = 434MHz fRF = 315MHz Typical Operating Characteristics (continued) (Typical Application Circuit, VPAVDD = VAVDD = VDVDD = VHVIN = +3.0V, fRF = 433.92MHz, IF BW = 280kHz, 4kbps Manchester encod- ed, 0.2% BER, TA = +25°C, unless otherwise noted.) TRANSMITTER

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL Pin Description PIN NAME FUNCTION 1 PAVDD Power-Amplifier Supply Voltage. Bypass to GND with 0.01µF and 220pF capacitors placed as close as possible to the pin.

2 ROUT

Envelope-Shaping Output. ROUT controls the power-amplifier envelope’s rise and fall times. Connect ROUT to the PA pullup inductor or optional power-adjust resistor. Bypass the inductor to GND as close as possible to the inductor with 680pF and 220pF capacitors, as shown in the Typical Application Circuit. 3 TX/RX1 Transmit/Receive Switch Throw. Drive T/R high to short TX/RX1 to TX/RX2. Drive T/R low to disconnect TX/RX1 from TX/RX2. Functionally identical to TX/RX2. 4 TX/RX2 Transmit/Receive Switch Pole. Typically connected to ground. See the Typical Application Circuit. 5 PAOUT Power-Amplifier Output. Requires a pullup inductor to the supply voltage (or ROUT if envelope shaping is desired), which can be part of the output-matching network to an antenna. 6 AVDD Analog Power-Supply Voltage. AVDD is connected to an on-chip +3.0V regulator in 5V operation. Bypass AVDD to GND with a 0.1µF and 220pF capacitor placed as close as possible to the pin. 7 LNAIN Low-Noise Amplifier Input. Must be AC-coupled. 8 LNASRC Low-Noise Amplifier Source for External Inductive Degeneration. Connect an inductor to GND to set the LNA input impedance. 9 LNAOUT Low-Noise Amplifier Output. Must be connected to AVDD through a parallel LC tank filter. AC-couple to MIXIN+. 10 MIXIN+ Noninverting Mixer Input. Must be AC-coupled to the LNA output. 11 MIXIN- Inverting Mixer Input. Bypass to AVDD with a capacitor as close as possible to the LNA LC tank filter. 12 MIXOUT 330 Ω Mixer Output. Connect to the input of the 10.7MHz filter. 13 IFIN- Inverting 330 Ω IF Limiter-Amplifier Input. Bypass to GND with a capacitor. 14 IFIN+ Noninverting 330 Ω IF Limiter-Amplifier Input. Connect to the output of the 10.7MHz IF filter.

15 PDMIN Minimum-Level Peak Detector for Demodulator Output

16 PDMAX Maximum-Level Peak Detector for Demodulator Output

17 DS- Inverting Data Slicer Input

18 DS+ Noninverting Data Slicer Input

19 OP+ Noninverting Op-Amp Input for the Sallen-Key Data Filter

20 DF Data-Filter Feedback Node. Input for the feedback capacitor of the Sallen-Key data filter. 21, 25 N.C. No Connection. Do not connect to this pin. 22 T/ R Transmit/Receive. Drive high to put the device in transmit mode. Drive low or leave unconnected to put the device in receive mode. It is internally pulled down. 23 ENABLE Enable. Drive high for normal operation. Drive low or leave unconnected to put the device into shut- down mode.

24 DATA Receiver Data Output/Transmitter Data Input

26 DVDD Digital Power-Supply Voltage. Bypass to GND with a 0.01µF and 220pF capacitor placed as close as possible to the pin.

27 HVIN

High-Voltage Supply Input. For 3V operation, connect HVIN to AVDD, DVDD, and PAVDD. For 5V operation, connect only HVIN to 5V. Bypass HVIN to GND with a 0.01µF and 220pF capacitor placed as close as possible to the pin.

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL Detailed Description The MAX7030 315MHz and 433.92MHz CMOS trans- ceiver and a few external components provide a com- plete transmit and receive chain from the antenna to the digital data interface. This device is designed for transmitting and receiving ASK data. All transmit fre- quencies are generated by a fractional-N-based syn- thesizer, allowing for very fine frequency steps in increments of f XTAL/4096. The receive LO is generated by a traditional integer-N-based synthesizer. Depending on component selection, data rates as high as 33kbps (Manchester encoded) or 66kbps (NRZ encoded) can be achieved. Receiver Low-Noise Amplifier (LNA) The LNA is a cascode amplifier with off-chip inductive degeneration that achieves approximately 30dB of volt- age gain that is dependent on both the antenna-match- ing network at the LNA input and the LC tank network between the LNA output and the mixer inputs. The off-chip inductive degeneration is achieved by connecting an inductor from LNASRC to GND. This inductor sets the real part of the input impedance at LNAIN, allowing for a more flexible match for low-input impedances such as a PCB trace antenna. A nominal value for this inductor with a 50 Ω input impedance is 12nH at 315MHz and 10nH at 434MHz, but the induc- tance is affected by PCB trace length. LNASRC can be shorted to ground to increase sensitivity by approxi- mately 1dB, but the input match must then be reopti- mized. The LC tank filter connected to LNAOUT consists of L5 and C9 (see the Typical Application Circuit ). Select L5 and C9 to resonate at the desired RF input frequency. The resonant frequency is given by: where L TOTAL = L5 + LPARASITICS and CTOTAL = C9 + CPARASITICS. LPARASITICS and CPARASITICS include inductance and capacitance of the PCB traces, package pins, mixer- input impedance, LNA-output impedance, etc. These parasitics at high frequencies cannot be ignored, and can have a dramatic effect on the tank filter center fre- quency. Lab experimentation should be done to opti- mize the center frequency of the tank. The total parasitic capacitance is generally between 5pF and 7pF. Automatic Gain Control (AGC) When the AGC is enabled, it monitors the RSSI output. When the RSSI output reaches 1.28V, which corre- sponds to an RF input level of approximately -55dBm, the AGC switches on the LNA gain-reduction attenua- tor. The attenuator reduces the LNA gain by 36dB, thereby reducing the RSSI output by about 540mV to 740mV. The LNA resumes high-gain mode when the RSSI output level drops back below 680mV (approxi- mately -59dBm at the RF input) for a programmable interval called the AGC dwell time (see Table 1). The AGC has a hysteresis of approximately 4dB. With the AGC function, the RSSI dynamic range is increased, allowing the MAX7030 to reliably produce an ASK out- put for RF input levels up to 0dBm with a modulation depth of 18dB. AGC is not required and can be dis- abled (see Table 1). f LCTOTAL TOTAL Pin Description (continued) PIN NAME FUNCTION 28 AGC2 AGC Enable/Dwell Time Control 2 (MSB). See Table 1. Bypass to GND with a 10pF capacitor. 29 AGC1 AGC Enable/Dwell Time Control 1. See Table 1. Bypass to GND with a 10pF capacitor. 30 AGC0 AGC Enable/Dwell Time Control 0 (LSB). See Table 1. Bypass to GND with a 10pF capacitor. 31 XTAL1 Crystal Input 1. Bypass to GND if XTAL2 is driven by an AC-coupled external reference. 32 XTAL2 Crystal Input 2. XTAL2 can be driven from an external AC-coupled reference. — EP Exposed Pad. Solder evenly to the board’s ground plane for proper operation.

cause the AGC to switch on every bit. mined by the control pin settings shown in Table 1. that AGC1 is set high and AGC0 and AGC2 are set low. for a costly front-end SAW filter for many applications. MIXIN+ and MIXIN- inputs are functionally identical.

001 K = 11

010 K = 13

011 K = 15

100 K = 17

101 K = 19

110 K = 21

111 K = 23

Table 1. AGC Dwell Time Settings for

only and connect AVDD, PAVDD, and DVDD together. In both cases, bypass DVDD, HVIN, and PAVDD to GND with 0.01µF and 220pF capacitors and bypass AVDD to GND with 0.1µF and 220pF capacitors. Bypass T/ R, ENABLE, DATA, and AGC0-2 with 10pF capacitors to GND. Place all bypass capacitors as close as possible to the respective pins. Transmit/Receive Antenna Switch The MAX7030 features an internal SPST RF switch that, when combined with a few external components, allows the transmit and receive pins to share a common antenna (see the Typical Application Circuit). In receive mode, the switch is open and the power amplifier is shut down, presenting a high impedance to minimize the loading of the LNA. In transmit mode, the switch closes to complete a resonant tank circuit at the PA output and forms an RF short at the input to the LNA. In this mode, the external passive components couple the output of the PA to the antenna and protect the LNA input from strong transmitted signals. The switch state is controlled by the T/ R pin (pin 22). Drive T/R high to put the device in transmit mode; drive T/R low to put the device in receive mode. Control Interface Considerations When operating the MAX7030 with a +4.5V to +5.5V supply voltage, the AGC0, ACG1, AGC2, DATA, ENABLE and T/ R pins may be driven by a microcon- troller with either 3V or 5V interface logic levels. When operating the MAX7030 with a +2.1V to +3.6V supply, the microcontroller must produce logic levels which conform to the V IH and V IL specifications in the DC Crystal Oscillator (XTAL) The XTAL oscillator in the MAX7030 is designed to pre- sent a capacitance of approximately 3pF between the XTAL1 and XTAL2 pins. In most cases, this corre- sponds to a 4.5pF load capacitance applied to the external crystal when typical PCB parasitics are added. It is very important to use a crystal with a load capacitance that is equal to the capacitance of the MAX7030 crystal oscillator plus PCB parasitics . If a crystal designed to oscillate with a different load capacitance is used, the crystal is pulled away from its stated operating frequency, introducing an error in the reference frequency. Crystals designed to operate with higher differential load capacitance always pull the ref- erence frequency higher. In actuality, the oscillator pulls every crystal. The crys- tal’s natural frequency is really below its specified fre- quency, but when loaded with the specified load capacitance, the crystal is pulled and oscillates at its specified frequency. This pulling is already accounted for in the specification of the load capacitance. Additional pulling can be calculated if the electrical parameters of the crystal are known. The frequency pulling is given by: where: f p is the amount the crystal frequency is pulled in ppm. Cm is the motional capacitance of the crystal. CCASE is the case capacitance. CSPEC is the specified load capacitance. CLOAD is the actual load capacitance. When the crystal is loaded as specified, i.e., CLOAD = CSPEC, the frequency pulling equals zero. f C CC CC xP m CASE LOAD CASE SPEC = + − + ⎠⎟2 11 106 MAX7030 Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL 18192021222324 7654321 MAX7030 THIN QFN TOP VIEW ROUT PAVDD TX/RX1 TX/RX2 PAOUT AVDD LNAIN 8LNASRC XTAL2 XTAL1 AGC0 AGC1 AGC2 HVIN DVDD N.C. DATA ENABLE T/R N.C. DF OP+ DS+ DS- PDMIN IFIN+

16 PDMAX

Table 3. Component Values for Typical Application Circuit Note: Component values vary depending on PCB layout.

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL C8L3 91 0 11 C10 C12 C11 IN OUTGND 14 15 16 C13 C17 25262728293032 31 AGC1 AGC0 MAX7030 3.0V C23 VDD VDD PAVDD ROUT TX/RX1 TX/RX2 PAOUT AVDD LNAIN LNASRC LNAOUT MIXIN+ MIXIN- IFIN+ IFIN- PDMIN PDMAX MIXOUT DS- DS+ OP+ DF N.C. T/R ENABLE DATA N.C. DVDD HVIN AGC2 AGC1 AGC0 XTAL1 XTAL2 AGC2 C20C21 C14 C15 DATA ENABLE C16 TRANSMIT/ RECEIVE C22 C5C4 C18 C19 C1C2 R3* *OPTIONAL POWER-ADJUST RESISTOR C24 EXPOSED PAD VDD VDD VDD Typical Application Circuit Chip Information PROCESS: CMOS

Package Information

For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.

32 Thin QFN-EP T3255+3 21-0140 90-0001

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL LNA 90° RSSI IF LIMITING AMPS 100kΩ 100kΩ DATA FILTER 9 10 11 12 14 13 RX DATA 2322 DIGITAL LOGIC CRYSTAL OSCILLATOR 27 3.0V REGULATOR PAMAX7030 512 RX VCO RX FREQUENCY DIVIDER PHASE DETECTOR CHARGE PUMP LOOP FILTER TX FREQUENCY DIVIDER Σ I Q TX VCO ΔΣ MODULATOR EXPOSED PAD LNAIN LNASRC TX/RX1 TX/RX2 XTAL1 XTAL2 HVIN AVDD ROUT PAVDD PAOUT T/R DVDD ENABLE DATA AGC2 AGC1 AGC0 DS- PDMAX PDMIN DS+ OP+ DF IFIN+ IFIN-MIXOUTMIXIN-MIXIN+LNAOUT 3 4 Functional Diagram

Low-Cost, 315MHz and 433.92MHz ASK Transceiver with Fractional-N PLL Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circu it patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical. Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. 20 ____________________Maxim Integrated Products, 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 © 2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

Revision History

0 5/05 Initial release — 1 9/08 Added + to each part to denote lead-free/RoHS-compliant package and explicitly calling out the odd frequency as contact factory for availability 1 2 6/09 Made correction in Power Amplifier (PA) section 15 3 11/10 Updated AC Electrical Characteristics, Absolute Maximum Ratings, and Package Information 2, 5, 18 4 6/12 Deleted the MAX7030MATJ+ from the Selector Guide and all references to the MAX7030MATJ+ throughout the data sheet; updated f XTAL reference in the Phase- Locked Loop section; updated Power Amplifier section; inserted Control Interface Considerations; updated Table 3 1, 13, 15, 16, 17, 18