MAX501AEWG | DigiCamel IC Datasheet

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Voltage-Output, 12-Bit Multiplying DACs The MAXS01/MAXS02 are 12-bit, 4-quadrant, voltage- @ 12-Bit Voltage Output DAC > output, multiplying digital-to-analog converters (DACs) 40V and SmA Output with an output amplifier. Thin-film resistors, laser ot Drive bw trimmed at the water level, maintain accuracy over the @ Monotonic Over Temperature full operating temperature range. @ Four Range-Scaling Resistors Qa The MAX501/MAX502 have buffered latches that are @ 84 (MAX5G1) and 12-Bit (MAX502) Interface i=} easily interfaced with microprocessors. Data is trans- @ 24-Pin DIP and Wide SO Packages = ferred into the input register in either a right-justified ~~ \\ 8+4-bit format (MAX501) or with a 12-bit-wide data path z (MAX502). In the MAX501, an LDAC signaltransfersdata. § ————____— Ordering Information from the input register to the DAC register. In the MAX502, ‘CHIP SELECT (CS) and WRITE (WR) signals. For stand- PACKAGE (88s) alone operation, the CS and WR inputs are grounded, a t making all latches transparent. All logic inputs are level \\ triggered and compatible with TTL and +5V CMOS logic MAXSOIBGNG OFC 0x70°G_24Narow Paste OP 204 | © iow i) ; The internally compensated, low-input offset-voltage Sutputamptver provides en cutputvotage rom *10Vto “10V while sourcing and sinking upto mA, Digital Attenuators Programmable-Gain Amplifiers servo Control Diptl to amarto-20mA Converters Automatic Test Equipment Onterng mtorr eee apecneatne Programmable Power Supplies ** Contact factory for availability and processing to MIL-STD-889. ___ ss Functional Diagram = ______ Pin Configurations TOP VIEW Voo RA RB RC AFB ~, 20 21 |22 | 23 | 24 Vour C4] [24] RFB on] fz rc on Gy RB 17 os Ge] maxim [2 RA VREF- [ear H pss] = MAX502_—- [20] Voo Vout o7 Ce] 173) vss ‘tf ma he peed Bee per AGND 0s Ce] [a7] VREF OE DATA LATCH Lo 03 Go] Fis] wa a | Vs 02 Ga] [1s] 00 OGNO (72) [73] 01 14) 2 12 16 }15 DO...D1 DGND Cf WR DIP/SO MAX801 on last page MAXIMA __ SSS Maxim integrated Products 1 For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800

Voltage-Output, 12-Bit Multiplying DACs QW ABSOLUTE MAXIMUM RATINGS UY VSSIODGND 2... -seeeeeeeeeeeeeees 40:3V,-17V Continuous Power Dissipation (any package) VREFtOAGND 66... eee ccc s cls isceecseees £25V 1O475°C eerie eeeeecesewesn eee eee eens « 650MW Pd RFBIOAGND «20... ee cece ec eceeeecneec nee £25V dorate above +75°C wee cece eee ee eee TOMW/PC © Note: Vour may be shorted to AGND, Vo, or Vss if the power dissipation of the package is not exceeded. » Stresses beyond those under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional oft ‘i the a ‘ofthe speciication is not implied. E 0 x Peace eatrmcmres At has or any athe conltons Beyond hzse indicated nha operational sections o the gpciteation st pied. Exposure $ ELECTRICAL CHARACTERISTICS Dual Supply (V0 = #11.4V to +18.75V, Vsg = -11.4V to -15.75V, VREF = +10V, AGND = DGND = OV, AL = 2kM, CL = 100pF; all grades, Ta= TmIN to TMax, unless otherwise noted.) (Note 2) [__PARAMeTen | symaou | CONDITIONS [ win tye wax Tunirs | STATIC PERFORMANCE [eesouton a Ta=425°C [waxsovsoza Tae | Relative Ac m LC MAX501/5028 ive Acura minime Aecwraey TA= Twa to Trans [MAXS01/5028 [ae | Differential Noniinearity a [tazvasre | Zero-Code Offset Error Ta= Tutor, MAXS501/502_C/E mv ATTan te Twas | axsOv0.M 5 ‘AVos/ RC or RB connected to Vout, RA, Vour connected, VREF = 2.5V i i AGain/ senna [GP fl [Reerence input Resbtence [aR ‘Application Resistor

2 MAAXLM

Voltage-Output, 12-Bit Multiplying DACs ELECTRICAL CHARACTERISTICS (continued) 2 Dual Supply (Vpp = +11.4V to +15.75V, Vsg = -11.4V to -15.75V, VREF = +10V, AGND = DGND = OV, Ry = 2k, C = 100pF, all grades, Ta = TmIN to Tmax, unless otherwise noted.) (Note 2) > i>) Input Current Vin = OV and Vi Tap Low Voage [Dw [CSC TV] SS Input High Voltage [vw [rv CE > [ voo fo a5 78] a ‘Supply Volt pw vouge [ves Png 1878 | L~) [too [Yourunioaded TO Lx} Su Current py is Wewrinssgg | VREF = -10V Vop = 15V + 5% AGain/AV, +£0.02 ain/AYD0 VREF = -8.9V Vop = 12V+5% Power-Sur Rejection poly VREF = 10V AGain/AV: Vss = -15V + 5% ‘Ss VREF = 8.9V.

4 Vss = -12V + 5%

DYNAMIC PERFORMANCE (Note 3) Outputotage Setting Tine | te [To 40.01% of fulacale LE Te | a 7 DAC Glitch impulse | [Maiorcarrytransition Tavs Multiplying Feedthrough Error |__| VREF = +10V at 10kHz, DAC = all Os a ee | Unity-Gain Small-Signal Bandwidth Full Power Bandwidth a a Total Harmonie Distortion | THD _|VREF = 6Viuag at Taz a OUTPUT CHARACTERISTICS OperLoop Gain [Avo [RB not connected, Vour=z1O.AL=an [9 ———~«dzC a Cc a [Shor-GireuitGurent | [tasers CTSC*dCmk Jortzto tHe, Tasvasro TC ans | Output Noise ipa Netee Vowag® | eee 3 MAAXIAA

Voltage-Output, 12-Bit Multiplying DACs N TIMING CHARACTERISTICS (See Figures 1a, 1b) [) Dual Supply (Vpp = +11.4V to +15.75V, Vss = -11.4V to -15.75V, VREF = +10V, AGND = DGND = OV, Ri = 2kQ, Ci = 100pF, all grades, 6 Ta = TIN to Tmax, unless otherwise noted.) (Note 2)

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= oe a A White Pulse wiath wr |e tumtotang WeOeoe fwd jansece CT wSCSC~* Oar Setp Time efi |» | [Dawtoigtine | mm | COCOC~CSSSC~id Note 2: VouT must be less than Vpp - 2.5V and greater than Vs + 2.5V to ensure correct operation. Performance at supplies other than Vop = +15V and Vss = -15V is guaranteed by PSRR tests. Leave unused feedback resistors floating. Note 3: Dynamic Performance and Output Characteristics are included for design guidance and are not subject to test.

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Voltage-Output, 12-Bit Multiplying DACs a TTTFFFFSFFFSFSFSFSSséwT pal Operating Characteristics z FREQUENCY RESPONSE, QUTPUT VOLIMGE SWING: > ‘GAIN = -1 » ¥e. RESISTIVE LOAD a —— +180 @ Voo = #15 Tsoy Jee 8 0 ‘N 08 20 f ry e+ oN 08 ge 1 1/7 | \\ io ne -100 ae a z Sat l_ ce ee ee 9 we LYE= Sy may sL_[t YT -« | Bead ny Lt J | a 100 1k 10k 100k «1M 10M 1 0 100 1k 10k Lm) FREQUENCY (Hz) LOAD RESISTANCE (Q) 1X} NOISE SPECTRAL DENSITY ‘THO vs. FREQUENCY 5 KI BAC CODE: 1... ad bag cove TH a om 00k a [Xp ty e* ocean AL | to 3 | 7 Poems mt | 10 100 1k 10k 100k 100 tk 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) (MULTIPLYING FEEDTHROUGH wmurrPLe FeoTHROUGH ERROR va. FREQUENCY cno HAN / son 3 veo | Oo wi J \\ sane e.| | | V1 Vout = 40 ee so” - LL 7 | GND MON ut) ° VY 20ps/DIV 10 tk 10k 100k 1M FREQUENCY (Hz) MAXIM t's

Voltage-Output, 12-Bit Multiplying DACs N t-) NI te ‘s GSLSB OR = CSMSB SS m i=} os to x os tune = rd ‘tser° vag ‘tour’ GA Figure 1a. MAX501 Timing Diagram J“ Tes cs WR tos ton >] Figure 1b, MAX502 Timing Diagram NOTES: 1. All input signal rise and fall times measured from 10% to 90% of +5V, te = te = 20ns. 2. Tieng measur erence leis =

6 MAXIM

Similarly, a low on CSMSB and WR with CSLSB high _truth tables.

Table 2. MAX502 Truth Table

Figure 6. MAX502 Interface Circuit — Latches Minimize

Product Information

MAX501AEWG specifications and overview.

Summary

Voltage-Output, 12-Bit Multiplying DACs Rev 1; 12/96

Description

Voltage-Output, 12-Bit Multiplying DACs Rev 1; 12/96

Source title MAX501AEWG Datasheet(PDF) - Maxim Integrated Products

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