MAX5013 MAXIM | Alldatasheet

Document overview

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Technical content

Features

' 12-Bit, 100Msps DAC ' TTL-Compatible Inputs ' Low Power: 640mW ' 1/2LSB DNL ' 40MHz Multiplying Bandwidth ' Extended-Industrial Temperature Range ' Superior Performance over AD9713: Improved Settling Time: 13ns Improved Glitch Energy: 15pV-s Master/Slave Latches MAX5013 12-Bit, 100Msps TTL DAC Functional Diagram 19-1272; Rev 0a; 8/97 PART MAX5013AEPI MAX5013BEPI -40°C to +85°C -40°C to +85°C TEMP. RANGE PIN-PACKAGE

28 Plastic DIP

Ordering Information

Pin Configurations appear at end of data sheet. MAX5013BEQI -40°C to +85°C 28 PLCC MAX5013 MAX5013AEQI -40°C to +85°C 28 PLCC For the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468.

12-Bit, 100Msps TTL DAC ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VCC = +5.0V, VEE = -5.2V, RSET = 7.5kΩ , Control Amp In = Ref Out, VOUT = 0V, TA = TMIN to TMAX, unless otherwise noted.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Supply Voltages Input Voltages Output Currents Continuous Power Dissipation Full temperature VI V V I V V IV IV V V -1.2 2.0 V VI I VI V TA = +25° C I I TEST LEVEL VI 5.0 5.0 dBc 701.23MHz; 10Msps TA = +25° CSpurious-Free Dynamic Range mA20.48TA = +25° CFull-Scale Output Current (Note 5) pV-s15TA = +25° CGlitch Energy (Note 4) ns2TA = +25° COutput Propagation Delay (tD) (Note 3) ns13TA = +25° CSettling Time (tST) (Note 2) Msps100TA = +25° CConversion Rate Dynamic Performance µA/° C0.01Full temperatureOffset-Drift Coefficient Output Compliance Voltage -1.2 2.0 TA = +25° C IV kΩ0.8 1.0 1.2TA = +25° CEquivalent Output Resistance 0.5 2.5 0.8 1.0 1.2 LSB±1.5Max at full temperature Differential Nonlinearity ±0.5 ±0.75 DC Performance µA ppm/° C150Full temperatureGain-Error Tempco % F.S.8.0Full temperature ±0.75 ±1.0Best fit LSB±1.75Max at full temperature Integral Nonlinearity pF10TA = +25° COutput Capacitance 1.0 5.0TA = +25° C UNITSMAX5013A MIN TYP MAXCONDITIONSPARAMETER 20.48 100 0.01 0.5 2.5 ±20 ±1.0 ±1.25 150 8.0 ±1.0 ±1.5 ±2.0 1.0 5.0 MAX5013B MIN TYP MAX Bits12Resolution 12 V 6810MHz span16MHz; 40Msps 2MHz span 10.1MHz; 50Msps 685.055MHz; 20Msps V ns2RL = 50ΩRise/Fall Time 2 Gain Error (Note 1) Zero-Scale Offset Error DYNAMIC PERFORMANCE DC PERFORMANCE

12-Bit, 100Msps TTL DAC Note 1:Gain is measured as a ratio of the full-scale current to ISET. The ratio is nominally 128. Note 2:Measured as voltage at mid-scale transition to ±0.024%; RL = 50Ω . Note 3:Measured from the rising edge of Latch Enable to where the output signal has left a 1LSB error band. Note 4:Glitch is measured as the largest single transient. Note 5:Calculated using I = 128 x Control Amp In RFS SET Full temperature IV IV VI IV V I VI VI VI VI V MHz V V V V I TA = +25° C VI TEST LEVEL V 50 50Internal Reference Voltage Drift ns0.5 0TA = +25° CInput Hold Time (tH) 3.5Full temperature ns3 2TA = +25° CInput Setup Time (tS) pF3TA = +25° CInput Capacitance µA600Full temperatureLogic 0 Current µA20Full temperatureLogic 1 Current V0.8Full temperatureLogic 0 Voltage V2.0Full temperatureLogic 1 Voltage MΩ3TA = +25° CAmplifier Input Impedance Amplifier Input Bandwidth 1 V-1.15 -1.20 -1.25Internal Reference Voltage 16Full temperature mA8 14TA = +25° CPositive Supply Current (+5.0V) ppm/° C MHz40TA = +25° CReference Multiplying Bandwidth kΩ3TA = +25° CReference Input Impedance mW640Nominal Power Dissipation µA/V30 100 ±5% of VEE and VCC, external reference, TA = +25° C Power-Supply Rejection Ratio UNITSMAX5013A MIN TYP MAXCONDITIONSPARAMETERS IV 0.5 0 3.5 3 2 600 0.8 2.0 IV -1.15 -1.20 -1.25 8 14 640 30 100 MAX5013B MIN TYP MAX ns5.0 4.0TA = +25° CLatch Pulse Width (tPWL, tPWH) 0.5Full temperature 5.0 4.0 0.5 ELECTRICAL CHARACTERISTICS (continued) (VCC = +5.0V, VEE = -5.2V, RSET = 7.5kΩ , Control Amp In = Ref Out, VOUT = 0V, TA = TMIN to TMAX, unless otherwise noted.) VI I 148Full temperature mA115 140TA = +25° CNegative Supply Current (-5.2V) 148 115 140 DIGITAL INPUTS VOLTAGE INPUT AND CONTROL POWER-SUPPLY REQUIREMENTS Negative Supply Voltage IV

12-Bit, 100Msps TTL DAC NAME FUNCTION 1–10 D2–D11 Digital Input Bits 2–11 PIN

13 Analog Return Analog Return Ground

12, 21 Digital VEE Digital Negative Supply (-5.2V)

11 D12 (LSB) Digital Input Bit 12 (LSB)

14 IOUT Analog Current Output

15, 25 Analog VEE Analog Negative Supply (-5.2V) 16 I OUT Complementary Analog Current Output

17 Ref In Voltage Reference Input

20 Ref Out Internal Voltage Reference Output. Ref Out is normally connected to Control Amp In. 19 Control Amp In Normally connected to Ref Out if not connected to external reference. 18 Control Amp Out Output of Internal Control Amplifier. Control Amp Out is normally connected to Ref In.

26 Latch Enable Latch-Control Line

24 RSET* Connection for external resistance reference when using internal amplifier (nominally 7.5kΩ ). 23 Digital VCC Digital Positive Supply (+5.0V) 22 Ref GND Ground return for internal voltage reference and amplifier.

28 D1 (MSB) Digital Input Bit 1 (MSB)

27 DGND Digital Ground Return

*Full-Scale Current Out = 128 (Control Amp In / RSET). TEST LEVEL CODES TEST LEVEL TEST PROCEDURE All electrical characteristics are subject to the following conditions: All parameters having min/max specifications are guar- anteed. The Test Level column indicates the specific device testing actually performed during production and Quality Assurance inspection. Any black section in the data column indicates that the specification is not tested at the specified condition. I II III IV V VI 100% production tested at the specified temperature. 100% production tested at T A = +25° C, and sample tested at the specified temperatures. QA sample tested only at the specified temperatures. Parameter is guaranteed (but not tested) by design and characterization data. Parameter is a typical value for information purposes only. 100% production tested at T A = +25° C. Parameter is guaranteed over specified temperature range.

12-Bit, 100Msps TTL DAC Analog VEE R Set D igital VC C R ef G N D D igital VEE R ef O ut C ontrol Am p O ut Latch Enable D G N D D 1 (M SB) C ontrol Am p In R ef In Analog VEE IO ut D igital VEE D 6 D 7 D 8 D 9 D 10 D 11 (LSB) D 12 D 2 D 3 D 4 D 5 Analog R eturn IO ut PD IP Pin Configurations Analog VEE R Set D igital VC C R ef G N D D igital VEE R ef O ut C ontrol Am p In D 6 D 7 D 8 D 9 D 10 D 11 (LSB) D 12 Latch Enable DGND SB) D1 D2D3D4D5 Control Am p Out Ref In Analog VEE IOut Analog Return Digital VEE IOut PLC C DIP PLCC MAX5013 MAX5013

12-Bit, 100Msps TTL DAC A B C D E J K F G H I INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX A 0.200 5.08 B 0.120 0.135 3.05 3.43 C 0.020 0.51 D 0.100 2.54 E 0.067 1.70 F 0.013 0.33 G 0.170 0.180 4.32 4.57 H 0.622 15.80 I 0.555 14.10 J 1.460 37.08 K 0.085 2.16 28L Plastic DIP

12-Bit, 100Msps TTL DAC A B Pin Pin C D E F G H I TO P V IEW Pin B O TTO M V IEW INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX A 0.450 0.456 11.43 11.58 B 0.485 0.495 12.32 12.57 C 45° 45° D 0.165 0.175 4.19 4.45 E 0.010 0.25 F 0.022 typ .56 typ 0.00 G 0.18 typ 4.57 typ 0.00 H 0.05 typ 1.27 typ 0.00 I 0.039 0.430 0.99 10.92 28L PLCC TOP VIEW BOTTOM VIEW