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Technical content

The MAX20002/MAX20003 are small, synchronous buck converters with integrated high-side and low-side MOSFETs. Each device is designed to deliver up to 2A/3A with input voltages from 3.5V to 36V, while using only 15µA quiescent current at no load. Voltage quality can be monitored by observing the PGOOD signal. The devices can operate in dropout by running at 98% duty cycle, making them ideal for automotive applications. The devices offer fixed output voltages of 5V/3.3V, along with the ability to program the output voltage between 1V to 10V. Frequency can be programmed using a resistor to ground on the FOSC pin from 220kHz to 2.2MHz. The devices offer a forced fixed-frequency mode and skip mode with ultra-low quiescent current of 15µA. They have a pin that can be programmed to turn on/off the spread spectrum, further helping systems designers with better EMC management. The MAX20002/MAX20003 are available in a small 5mm x 5mm 20-pin TQFN package with exposed pad and use very few external components.

Applications

  • Point-of-Load Applications in Automotive
  • Distributed DC Power Systems
  • Navigation and Radio Head Units Benefits and Features
  • Synchronous DC-DC Converter with Integrated FETs
  • MAX20002 = 2A
  • MAX20003 = 3A
  • 15µA Quiescent Current When in Skip Mode
  • Small Solution Size Saves Space
  • 220kHz to 2.2MHz Adjustable Frequency
  • Programmable 1V to 10V Output for the Buck or Fixed 5V/3.3V Options Available
  • Fixed 8ms Internal Soft-Start
  • Fixed Output Voltage with ±2% Output Accuracy (5V/3.3V) or Externally Resistor Adjustable (1V to 10V) with ±1% FB Accuracy
  • PGOOD Output and High-Voltage EN Input Simplify Power Sequencing
  • Protection Features and Operating Range Ideal for Automotive Applications
  • Operating VIN Range of 3.5V to 36V
  • 42V Load-Dump Protection
  • 99% Duty-Cycle Operation with Low Dropout
  • -40°C to +125°C Automotive Temperature Range
  • AEC-Q100 Qualified
  • Fast and Accurate Overvoltage Protection Enables Fast Recovery from Automotive Transients (MAX20002C/E and MAX20003C/E) Ordering Information appears at end of data sheet. 19-7311; Rev 17; 7/20 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current EVALUATION KIT AVAILABLE Click here to ask about the production status of specific part numbers.

N.C. LX LX LX EP 12kΩ .1µF 2 x 22µF 2.2µH 2.2µF4.7µF 20.0kΩ 1,000pF 2.2µF VOUT = 3.3V/5V AT 3A, 2.2MHz VBAT Typical Application Circuit/Block Diagram www.maximintegrated.com Maxim Integrated │ 2 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current

Continuous Power Dissipation (TA = +70°C) 20-Pin TQFN (derate 33.3mW/°C above +70°C) ..2666.7mW (VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2µH, CIN = 4.7µF, COUT = 44µF, CBIAS = 2.2µF, CBST = 0.1µF, RFOSC = 12kΩ, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.)

Electrical Characteristics

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage VSUP, VSUPSW 3.5 36 V Load-Dump Event Supply Voltage VSUP_LD tLD < 1s 42 V Supply Current ISUP Skip mode, no load, VOUT = 3.3V, VFSYNC = 0V 15 30 µA Skip mode, no load, VOUT = 5V, VFSYNC = 0V 20 35 µA Shutdown Supply Current ISHDN VEN = 0V 5 10 µA BIAS Regulator Voltage VBIAS VSUP = VSUPSW = 6V to 42V, IBIAS = 0 to 10mA 4.7 5 5.4 V BIAS Undervoltage Lockout VUVBIAS VBIAS rising 2.9 3.15 3.4 V PACKAGE TYPE: 20 TQFN Package Code T2055+4C Outline Number 21-0140 Land Pattern Number 90-0009 PACKAGE TYPE: 20 SW TQFN Package Code T2055Y+4C Outline Number 21-100165 Land Pattern Number 90-100065 THERMAL RESISTANCE, FOUR-LAYER BOARD Junction to Ambient (θ JA) 30°C/W Junction to Case (θJC) 2°C/W www.maximintegrated.com Maxim Integrated │ 3 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.

Package Information

Electrical Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2µH, CIN = 4.7µF, COUT = 44µF, CBIAS = 2.2µF, CBST = 0.1µF, RFOSC = 12kΩ, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS BIAS Undervoltage-Lockout Hysteresis 400 500 mV Thermal-Shutdown Threshold 175 °C Thermal-Shutdown Threshold Hysteresis 15 °C OUTPUT VOLTAGE PWM-Mode Output Voltage (Note 1) VOUT_5V VFB = VBIAS, 6V < VSUPSW < 36V, fixed-frequency mode 4.9 5 5.1 V VOUT_3.3V 3.23 3.3 3.37 Skip-Mode Output Voltage (Note 2) VOUT_ SKIP_5V No load, VFB = VBIAS, skip mode 4.9 5 5.15 V VOUT_ SKIP_3.3V 3.23 3.3 3.4 Load Regulation VFB = VBIAS, 30mA < ILOAD < 3A 0.5 % Line Regulation VFB = VBIAS, 6V < VSUPSW < 36V 0.02 %/V BST Input Current IBST_ON High-side MOSFET on, VBST - VLX = 5V 1.5 mA IBST_OFF High-side MOSFET off, VBST - VLX = 5V 1.5 µA LX Current Limit ILX MAX20003: MAX20003C/EATPA/V+, MAX20003C/EATPB/V+, 3.75 5 6.25 A MAX20002, MAX20002C, MAX20002E 2.5 3.33 4.16 MAX20003CATPC/V+, MAX20003CATPD/V+ 5 LX Rise Time VOUT = 5V, 3.3V 4 ns Spread Spectrum Spread spectrum enabled FOSC ±3% High-Side Switch On- Resistance RON_H ILX = 0.5A, VBIAS = 5V 60 140 mΩ High-Side Switch Leakage Current High-side MOSFET off, VSUP = 36V, VLX = 0V, TA = +25°C 1 5 µA Low-Side Switch On- Resistance RON_L ILX = 0.5A, VBIAS = 5V 35 70 mΩ Low-Side Switch Leakage Current Low-side MOSFET off, VSUP = 36V, VLX = 36V, TA = +25°C 1 5 µA FB Input Current IFB TA = +25°C 20 100 nA FB Regulation Voltage VFB FB connected to an external resistive divider, 6V < VSUPSW < 36V 0.99 1 1.01 VFB connected to an external resistive divider, 6V < VSUPSW < 36V (MAX20002C/E, MAX20003C/E) 0.985 1 1.015 www.maximintegrated.com Maxim Integrated │ 4 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current

Electrical Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, L1 = 2.2µH, CIN = 4.7µF, COUT = 44µF, CBIAS = 2.2µF, CBST = 0.1µF, RFOSC = 12kΩ, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) Note 1: Device not in dropout condition. Note 2: Guaranteed by design; not production tested. Note 3: Contact the factory for SYNC frequency outside the specified range. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS FB Line Regulation ∆VLINE 6V < VSUPSW < 36V 0.02 %/V Transconductance (from FB to COMP) gM VFB = 1V, VBIAS = 5V 700 µS Minimum On-Time tON_MIN 80 ns Maximum Duty Cycle DCMAX 98 99 % Oscillator Frequency RFOSC = 73.2kΩ 400 kHz RFOSC = 12kΩ 2.0 2.2 2.4 MHz SYNC, EN, AND SPS LOGIC THRESHOLDS External Input Clock Acquisition Time tFSYNC 1 Cycle External Input Clock Frequency RFOSC = 12kΩ (Note 3) 1.8 2.6 MHz External Input Clock High Threshold VFSYNC_HI VFSYNC rising 1.4 V External Input Clock Low Threshold VFSYNC_LO VFSYNC falling 0.4 V FSYNC Leakage Current TA = +25°C 1 µA Soft-Start Time tSS 5.6 8 12 ms Enable Input High Threshold VEN_HI 2.4 V Enable Input Low Threshold VEN_LO 0.6 V Enable Threshold Voltage Hysteresis VEN_HYS 0.2 V Enable Input Current IEN TA = +25°C 0.1 1 µA Spread-Spectrum Input High Threshold VSPS_HI 2.0 V Spread-Spectrum Input Low Threshold VSPS_LO 0.4 V Spread-Spectrum Input Current ISPS TA = +25°C 0.1 1 µA POWER-GOOD AND OVERVOLTAGE-PROTECTION THRESOLDS PGOOD Switching Level VRISING VFB rising, VPGOOD = high 93 95 97 %VFBVFALLING VFB falling, VPGOOD = low 90 92.5 95 PGOOD Debounce Time 25 µs PGOOD Output Low Voltage ISINK = 5mA 0.4 V PGOOD Leakage Current VOUT in regulation, TA = +25°C 1 µA Overvoltage-Protection Threshold VOUT rising (monitor FB pin) 107 VOUT falling (monitor FB pin) 104 www.maximintegrated.com Maxim Integrated │ 5 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current

(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFSYNC = 0V, RFOSC = 12kΩ, TA = +25°C, unless otherwise noted.) 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 VOUT (V) ILOAD (A) LOAD REGULATION 400kHz toc04 2.2MHz 100 0.0001 0.001 0.01 0.1 1 10 EFFICIENCY (%) LOAD CURRENT (A) fSW = 2.2MHz VIN = 14V EFFICIENCY vs. LOAD CURRENT toc01 SKIP MODE FPWM MODE 3.3V 3.3V 5V5V COILCRAFT XAL5030-222MEB 2.00 2.04 2.08 2.12 2.16 2.20 2.24 2.28 -40 -25 -10 5 20 35 50 65 80 95 110 125 SWITCHING FREQUENCY (MHz) TEMPERATURE (°C) fSW vs. TEMPERATURE toc07 VOUT = 3.3V VIN = 14V, FPWM MODE VOUT = 5V 100 0.0001 0.001 0.01 0.1 1 10 EFFICIENCY (%) LOAD CURRENT (A) fSW = 400kHz, VIN =14V EFFICIENCY vs. LOAD CURRENT toc02 SKIP MODE FPWM MODE 3.3V 3.3V 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 12 42 72 102 132 SWITCHING FREQUENCY (MHz) RFOSC (kΩ) SWITCHING FREQUENCY vs. RFOSC toc08 2.10 2.12 2.14 2.16 2.18 2.20 2.22 2.24 2.26 2.28 2.30 SWITCHING FREQUENCY (MHz) ILOAD (A) fSW vs. LOAD CURRENT toc05 VOUT = 3.3V VIN = 14V, FPWM MODE 375 380 385 390 395 400 405 410 415 420 425 SWITCHING FREQUENCY (MHz) ILOAD (A) fSW vs. LOAD CURRENT toc06 VOUT = 3.3V VIN = 14V, FPWM MODE 6 12 18 24 30 36 SUPPLY CURRENT (µA) SUPPLY VOLTAGE (V) SUPPLY CURRENT vs. SUPPLY VOLTAGE toc09 3.3V/2.2MHz SKIP MODE 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 VOUT (V) ILOAD (A) LOAD REGULATION 400kHz toc03 2.2MHz VOUT = 5V, VIN = 14V, SKIP MODE Maxim Integrated │ 6 www.maximintegrated.com MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current Typical Operating Characteristics

(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFSYNC = 0V, RFOSC = 12kΩ, TA = +25°C, unless otherwise noted.) 6 12 18 24 30 36 SHUTDOWN CURRENT (µA) SUPPLY VOLTAGE (V) SHUTDOWN CURRENT vs. SUPPLY VOLTAGE toc10 3.3V/2.2MHz SKIP MODE 4.92 4.94 4.96 4.98 5.00 5.02 5.04 5.06 5.08 5.10 -40 -25 -10 5 20 35 50 65 80 95 110 125 VBIAS (V) TEMPERATURE (°C) BIAS VOLTAGE vs. TEMPERATURE toc13 VIN = 14V, ILOAD = 0A, FPWM MODE 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 6 12 18 24 30 36 42 VOUT (V) VIN (V) VOUT vs. VIN toc15 5V/2.2MHz PWM MODE ILOAD = 0A 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 6 12 18 24 30 36 VOUT (V) VIN (V) VOUT vs. VIN toc14 5V/2.2MHz, ILOAD = 0A, FPWM MODE -40 -25 -10 5 20 35 50 65 80 95 110 125 SUPPLY CURRENT (µA) TEMPERATURE (°C) SUPPLY CURRENT vs. TEMPERATURE toc11 3.3V/2.2MHz SKIP MODE -40 -25 -10 5 20 35 50 65 80 95 110 125 SHUTDOWN CURRENT (µA) TEMPERATURE (°C) SHUTDOWN CURRENT vs. TEMPERATURE toc12 3.3V/2.2MHz SKIP MODE Maxim Integrated │ 7 www.maximintegrated.com MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current Typical Operating Characteristics (continued)

(PWM MODE) 5V/div 500mV/div (AC- COUPLED) 1A/div toc22 100µs VOUT IOUT LOAD TRANSIENT (PWM MODE) 10V/div 5V/div 10V/div toc19 10ms VIN VOUT DIPS AND DROPS VLX VPGOOD 5V/div 5V/div 2V/div 2V/div toc20 400ms VIN VOUT VPGOOD COLD CRANK 5V/2.2MHz 10V/div 5V/div toc21 100ms VOUT VIN LOAD DUMP 10V/div toc18 200ns VLX VFSYNC SYNC FUNCTION 5V/div 5V/div 100V/div 1V/div toc16 100nF FULL-LOAD STARTUP BEHAVIOR 10V/div 5V/div 1A/div 2ms VIN ILOAD VOUT VPGOOD 10V/div 5V/div 1V/div toc17 VIN VOUT SLOW VIN RAMP BEHAVIOR ILOAD VPGOOD 2A/div 5V/div 2A/div 100mV/div 20V/div toc24 1ms IOUT VLX LOAD TRANSIENT RESPONSE (MAX20003CATPD) ILX VOUT AC- RIPPLE 2A 2A/div Maxim Integrated │ 8 www.maximintegrated.com MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current Typical Operating Characteristics (continued) (VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFSYNC = 0V, RFOSC = 12kΩ, TA = +25°C, unless otherwise noted.)

1 FOSC Resistor-Programmable Switching-Frequency-Setting Control Input. Connect a resistor from FOSC to AGND to set the switching frequency.

2 OUT

Switching-Regulator Output. OUT also provides power to the internal circuitry when the output voltage of the converter is set between 3V to 5V during skip mode at very light load conditions after BIAS is switched over to buck output. 3 FB Feedback Input. Connect an external resistive divider from OUT to FB and AGND to set the output voltage. Connect to BIAS to set the output voltage to 5V or 3.3V. 4 COMP Error-Amplifier Output. Connect an RC network from COMP to AGND for stable operation. See the Compensation Network section for more details. 5 BIAS Linear Regulator Output. BIAS powers up the internal circuitry. Bypass with a minimum of 2.2µF ceramic capacitor to ground.

6 AGND Analog Ground

7 EN SUP Voltage-Compatible Enable Input. Drive EN low to disable the devices. Drive EN high to enable the devices. 8, 9 SUPSW Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch. Bypass SUPSW to PGND with a 0.1µF and 4.7µF ceramic capacitors. 10 SUP Voltage-Supply Input. SUP powers up the internal linear regulator. Bypass SUP to PGND with a 2.2µF ceramic capacitor. 4321 12131415 11 MAX20002 MAX20003 LX LX LX N.C. FSYNC SUP SUPSW SUPSW EN AGND FOSC OUT FB COMP BIAS BST PGND PGND SPS PGOOD TQFN (5mm x 5mm) EP* *EP = EXPOSED PAD www.maximintegrated.com Maxim Integrated │ 9 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current Pin Configuration Pin Description

11 PGOOD Open-Drain, PGOOD Output. PGOOD asserts when VOUT is above 95% regulation point. PGOOD goes low when VOUT is below 92% regulation point. 12 SPS Spread-Spectrum Pin. Pull high for spread spectrum on and low for spread spectrum off. 13,14 PGND Power Ground 15 BST High-Side Driver Supply. Connect a 0.1µF capacitor between LX and BST for proper operation. 16–18 LX Inductor Switching Node 19 N.C. No Connection

20 FSYNC

Synchronization Input. The devices synchronize to an external signal applied to FSYNC. Connect FSYNC to AGND to enable skip mode operation. Connect to BIAS or to an external clock to enable fixed-frequency, forced-PWM mode operation. Do not leave the FSYNC pin unconnected. — EP Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective power dissipation. Do not use as the only IC ground connection. EP must be connected to PGND. www.maximintegrated.com Maxim Integrated │ 10 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current Pin Description (continued)

Figure 1. Internal Block Diagram

The MAX20002/MAX20003 are 2A/3A current-mode step- down converters with integrated high-side and low- side MOSFETs. The low-side MOSFET enables fixed- frequency, forced-PWM operation in light-load applica - tions. The devices operate with input voltages from 3.5V to 36V while using only 15µA quiescent current at no load. The switching frequency is resistor programmable from 220kHz to 2.2MHz and can be synchronized to an external clock. The devices’ output voltage is available as 5V/3.3V fixed or adjustable from 1V to 10V. The wide input voltage range, along with its ability to operate at 99% duty cycle during undervoltage transients, makes the devices ideal for automotive applications. In light-load applications, a logic input (FSYNC) allows the devices to operate either in skip mode for reduced current consumption, or fixed-frequency, forced-PWM mode to eliminate frequency variation and help minimize EMI. Protection features include cycle-by-cycle current limit, and thermal shutdown with automatic recovery. See Figure 1 for an internal block diagram. Wide Input Voltage Range The devices include two separate supply inputs (SUP and SUPSW) specified for a wide 3.5V to 36V input voltage range. VSUP provides power to the device and V SUPSW provides power to the internal switch. When the device is operating with a 3.5V input supply, conditions such as cold crank can cause the voltage at the SUP and SUPSW pins to drop below the programmed output voltage. Under such conditions, the devices operate in a high duty-cycle mode to facilitate minimum dropout from input to output. The MAX20002E/MAX20003E provide additional filtering on the input inside the IC and are more robust against poor PCB layout; however, to get the best performance out of any version of the MAX20002/MAX20003, proper layout guidelines must be followed. Maximum Duty-Cycle Operation The devices have a maximum duty cycle of 98% (typ). The IC monitors the off-time (time for which the low-side FET is on) in both PWM and skip modes every switch - ing cycle. Once the off time of 100ns (typ) is detected continuously for 12µs, the low-side FET is forced on for 150ns (typ) every 12µs. The input voltage at which the devices enter dropout changes depending on the input voltage, output voltage, switching frequency, load current, and the efficiency of the design. The input voltage at which the devices enter dropout can be approximated as: OUT OUT ON_H SUP V (I R ) V 0.98 Note: The previous equation does not take into account the efficiency and switching frequency but is a good first- order approximation. Use the R ON_H number from the maximum column in the Electrical Characteristics table. Linear Regulator Output (BIAS) The devices include a 5V linear regulator (V BIAS) that provides power to the internal circuit blocks. Connect a 2.2µF ceramic capacitor from BIAS to AGND. Power-Good Output (PGOOD) The devices feature an open-drain power-good output (PGOOD). PGOOD asserts when VOUT rises above 95% of its regulation voltage. PGOOD deasserts when V OUT drops below 92.5% of its regulation voltage. Connect PGOOD to BIAS with a 10kΩ resistor. Synchronization Input (FSYNC) FSYNC is a logic-level input useful for operating-mode selection and frequency control. Connecting FSYNC to BIAS or to an external clock enables fixed-frequency, forced-PWM operation. Connecting FSYNC to AGND enables skip-mode operation. The external clock frequency at FSYNC can be higher or lower than the internal clock by 20%. If the external clock frequency is greater than 120% of the internal clock, contact the factory applications team to verify the design. The devices synchronize to the external clock in two cycles. When the external clock signal at FSYNC is absent for more than two clock cycles, the devices use the internal clock. System Enable (EN) An enable control input (EN) activates the devices from their low-power shutdown mode. EN is compatible with inputs from automotive battery level down to 3.5V. The high-voltage compatibility allows EN to be connected to SUP, KEY/KL30, or the inhibit pin (INH) of a CAN transceiver. EN turns on the internal regulator. Once V BIAS is above the internal lockout threshold, V UVBIAS = 3.15V (typ), the converter activates and the output voltage ramps up within 8ms. www.maximintegrated.com Maxim Integrated │ 12 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current

on the driving external clock. are needed for your application. Connect FB to BIAS for a fixed +5V/3.3V output voltage. switching losses are much lower in skip mode. Figure 2. Adjustable Output-Voltage Setting

Three key inductor parameters must be specified for operation with the devices: inductance value (L), inductor saturation current (I SAT), and DC resistance (R DCR). To select inductor value, the ratio of inductor peak-to-peak AC current to DC average current (LIR) must be selected first. A good compromise between size and loss is a 30% peak-to-peak ripple current to average-current ratio (LIR = 0.3). The switching frequency, input voltage, output volt- age, and selected LIR then determine the inductor value as follows: SUP OUT OUT SUP SW OUT (V V ) VL V f I LIR where VSUP, VOUT, and IOUT are typical values (so that efficiency is optimum for typical conditions). The switch - ing frequency is set by R FOSC (see TOC 8 in the Typical Operating Characteristics section). Input Capacitor The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit’s switching. The input capacitor RMS current requirement (I RMS) is defined by the following equation: OUT SUP OUT RMS LOAD(MAX) SUP V x(V - V )II V= × IRMS has a maximum value when the input voltage equals twice the output voltage: SUP OUTV 2V = × therefore: = LOAD(MAX) RMS I I 2 Choose an input capacitor that exhibits less than +10°C self-heating temperature rise at the RMS input current for optimal long-term reliability. The input-voltage ripple is comprised of ΔV Q (caused by the capacitor discharge) and ΔV ESR (caused by the ESR of the capacitor). Use low-ESR ceramic capacitors with high ripple-current capability at the input. Assume the contribution from the ESR and capacitor discharge equal to 50%. Calculate the input capacitance and ESR required for a specified input voltage ripple using the following equations: ESRIN LOUT VESR II 2 ∆= ∆+ where: SUP OUT OUTL SUP SW (V - V ) VI V fL ×∆= ×× and: OUTIN Q SW I D(1- D)C Vf ×= ∆× OUT SUPSW VD V= where: IOUT is the maximum output current and D is the duty cycle. Output Capacitor The output filter capacitor must have low enough equiva - lent series resistance (ESR) to meet output-ripple and load-transient requirements. The output capacitance must be high enough to absorb the inductor energy while transitioning from full-load to no-load conditions without tripping the overvoltage-fault protection. When using high-capacitance, low-ESR capacitors, the filter capaci - tor’s ESR dominates the output-voltage ripple, so the size of the output capacitor depends on the maximum ESR required to meet the output-voltage ripple (V RIPPLE(P-P)) specifications: RIPPLE(P-P) LOAD(MAX)V ESR I LIR= ×× The actual capacitance value required relates to the physical size needed to achieve low ESR, as well as to the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR and voltage rating rather than by capacitance value. When using low-capacity filter capacitors, such as ceramic capacitors, size is usually determined by the capacity need- ed to prevent voltage droop and voltage rise from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem. However, low-capacity filter capacitors typically have high- ESR zeros that can affect the overall stability. www.maximintegrated.com Maxim Integrated │ 14 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current

compensation network optimizes the control-loop stability. ground to cancel this ESR zero. where RLOAD = VOUT/IOUT(MAX) in Ω and gmc = 3S. for an individual capacitor. VFB/VOUT, where VFB is 1V (typ). Figure 3. Compensation Network

A dominant pole (f dpEA) is set by the compensation capacitor (C C) and the amplifier output resistance (ROUT_EA). A zero (f ZEA) is set by the compensation resistor (RC) and the compensation capacitor (CC). There is an optional pole (fPEA) set by CF and RC to cancel the output capacitor ESR zero if it occurs near the crossover frequency (fC, where the loop gain equals 1 (0dB)). Thus: zEA CC 1f 2C R= π× × pdEA C OUT,EA C pEA FC 1f 2CR= π× × The loop-gain crossover frequency (f C) should be set below 1/10 of the switching frequency and much higher than the power-modulator pole (fpMOD) SWpMOD C fff 10<< ≤ The total loop gain as the product of the modulator gain, the feedback voltage divider gain, and the error amplifier gain at fC should be equal to 1. So: FBMOD(fC) EA(fC) OUT VGAIN GAIN 1V×× = For the case where fzMOD is greater than fC: EA(fC) m,EA CGAIN g R = × Therefore: FBMOD(fC) m,EA C OUT VGAIN g R 1V× × ×= Solving for RC: OUTC m,EA FB MOD(fC) VR g V GAIN= ×× Set the error-amplifier compensation zero formed by R C and CC (fzEA) at the f pMOD. Calculate the value of C C a follows: C pMOD C 1C 2f R= π× × If fzMOD is less than 5 x f C, add a second capacitor (C F) from COMP to GND and set the compensation pole formed by RC and CF (fpEA) at the f zMOD. Calculate the value of CF as follows: F zMOD C 1C 2f R= π× × As the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly and the crossover frequency remains the same. For the case where f zMOD is less than fC: The power-modulator gain at fC is: pMOD MOD(fC) MOD(dc) zMOD f GAIN GAIN f= × The error-amplifier gain at fC is: zMODEA(fC) m,EA C C fGAIN g R f= ×× Therefore: zMODFBMOD(fC) m,EA C OUT C fVGAIN g R 1Vf× × ×× = Solving for RC: OUT CC m,EA FB MOD(fC) zMOD VfR g V GAIN f ×= ×× × Set the error-amplifier compensation zero formed by R C and CC at the fpMOD (fzEA = fpMOD). C pMOD C 1C 2f R= π× × If fzMOD is less than 5 × f C, add a second capacitor C F from COMP to ground. Set f pEA = f zMOD and calculate CF as follows: F zMOD C 1C 2f R= π× × It is always recommended to verify the loop stability and the calculated compensation network components using the bode plot analyzer. Then adjust the compensation network components as needed to the desired crossover frequency and gain/phase margins. www.maximintegrated.com Maxim Integrated │ 16 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current

Careful PCB layout is critical to achieve low switching losses and clean, stable operation. Use a multilayer board whenever possible for better noise immunity and power dissipation. Follow these guidelines for good PC board layout: 1) Use a large contiguous copper plane under the device package. Ensure that all heat-dissipating components have adequate cooling. The bottom pad of the devices must be soldered down to this copper plane for effective heat dissipation and getting the full power out of the devices. Use multiple vias or a single large via in this plane for heat dissipation 2) Isolate the power components and high current path from the sensitive analog circuitry. This is essential to prevent any noise coupling into the analog signals. 3) Keep the high-current paths short, especially at the ground terminals. This practice is essential for stable, jitter-free operation. The high current path compris - ing of input capacitor, high-side FET, inductor, and the output capacitor should be as short as possible. 4) Keep the power traces and load connections short. This practice is essential for high efficiency. Use thick copper PCBs (2oz vs. 1oz) to enhance full-load efficiency. 5) The analog signal lines should be routed away from the high-frequency planes. This ensures integrity of sensitive signals feeding back into the IC. 6) The ground connection for the analog and power section should be close to the IC. This keeps the ground current loops to a minimum. In cases where only one ground is used, adequate isolation between analog return signals and high-power signals must be maintained. www.maximintegrated.com Maxim Integrated │ 17 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current

Ordering Information

(FB TIED TO RESISTOR- DIVIDER) (V) VOUT FIXED (FB TIED TO BIAS) (V) MAXIMUM OPERATING CURRENT (A) MINIMUM ILIM (A) TIGHT OV THRESHOLD COMING OUT OF DROPOUT MAX20002ATPA/V+ 20 TQFN-EP* 1 to 10 5 2 2.5 No MAX20002ATPA/VY+** 20 SW TQFN-EP* 1 to 10 5 2 2.5 No MAX20002ATPB/V+ 20 TQFN-EP* 1 to 10 3.3 2 2.5 No MAX20002CATPA/V+ 20 TQFN-EP* 1 to 10 5 2 2.5 Yes MAX20002CATPB/V+ 20 TQFN-EP* 1 to 10 3.3 2 2.5 Yes MAX20002EATPA/VY+** 20 SW TQFN-EP* 1 to 10 5 2 2.5 Yes MAX20002EATPB/VY+ 20 SW TQFN-EP* 1 to 10 3.3 2 2.5 Yes MAX20003ATPA/V+ 20 TQFN-EP* 1 to 10 5 3 3.75 No MAX20003ATPA/VY+** 20 SW TQFN-EP* 1 to 10 5 3 3.75 No MAX20003ATPB/V+ 20 TQFN-EP* 1 to 10 3.3 3 3.75 No MAX20003CATPA/V+ 20 TQFN-EP* 1 to 10 5 3 3.75 Yes MAX20003CATPB/V+ 20 TQFN-EP* 1 to 10 3.3 3 3.75 Yes MAX20003CATPC/V+ 20 TQFN-EP* 1 to 10 5 3 5 Yes MAX20003CATPD/V+ 20 TQFN-EP* 1 to 10 3.3 3 5 Yes MAX20003EATPA/VY+ 20 SW TQFN-EP* 1 to 10 5 3 3.75 Yes MAX20003EATPB/VY+ 20 SW TQFN-EP* 1 to 10 3.3 3 3.75 Yes Note: All devices operate over the -40°C to +125°C operating temperature range. /V denotes an automotive qualified part. +Denotes a lead(Pb)-free/RoHS-compliant package. SW = Side wettable. *EP = Exposed pad. **Future product—contact factory for availability. www.maximintegrated.com Maxim Integrated │ 18 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current Chip Information PROCESS: BiCMOS

Revision History

0 3/14 Initial release — 1 5/14 Added overvoltage-protection threshold spec to Electrical Characteristics table 5 2 2/15 Updated the Benefits and Features section 1 3 11/15 Added new package variants to Electrical Characteristics and Ordering Information tables 4, 5, 17 4 3/16 Changed land pattern number in Package Information table from 90-0010 to 90-0009 17 5 4/16 Updated Ordering Information 18 6 6/16 Removed MAX20003CATPA/V+ and MAX20003CATPB/V+ from Ordering Information 18 7 6/16 Removed MAX20003CATPC/V+ and MAX20003CATPD/V+ from Ordering Information 18 8 9/16 Updated Benefits and Features; added new package variants in Electrical Characteris- tics, added TOC24 in Typical Operating Characteristics, updated FSYNC function in Pin Description; removed future product designations, added new package variants, and Tight OV Threshold column in Ordering Information; added new Overvoltage Protection (OVP) section 1, 4, 5, 8, 10, 13, 18 9 4/17 Added MAX2002ATPAVY+ and MAX2003ATPAVY+ (future products) in Ordering Information 18 10 5/17 Added MAX20002D and MAX20003D to data sheet 1, 4, 12, 13, 11 6/17 Added note under Absolute Maximum Ratings section; changed part number in 2nd row of LX Current Limit in Electrical Characteristics table from MAX20003D to MAX20002D; updated part numbers in Wide Input Voltage Range section; updated equation in bottom-left column in Input Capacitor section; changed MAX20002DATPA/VY+ and MAX20002DATPB/VY+ maximum operating current and minimum ILIM current in Order- ing Information table 3, 4, 12, 14, 12 9/17 Changed note under Absolute Maximum Ratings to Note 2 and added to the Electrical Characteristics, changing the subsequent note numbers accordingly 3 12.1 Corrected TOC03 in Typical Operating Characteristics section (which was replaced by the page 1 figure in error) 6 13 10/17 Deleted Note 2 from Electrical Characteristics table (renumbering remaining notes); removed future product status from the MAX20002DATPA/VY+, MAX20002DATPB/VY+, MAX20003DATPA/VY+, MAX20003DATPB/VY+ in Ordering Information table; changed POD from 21-100065 to 21-100165 in Package Information 3, 18 14 12/18 Updated the Compensation Network section 16 15 11/19 Updated Benefits and Features, Electrical Characteristics, and Pin Description sections 1, 3, 9 16 4/20 Changed MAX20002D and MAX20003D to MAX20002E and MAX20003E, change all the reference from D to E 1, 4, 13, 18 17 7/20 Updated Detailed Description and Ordering Information 12, 18 Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2017 Maxim Integrated Products, Inc. │ 19 MAX20002/MAX20003 36V, 220kHz to 2.2MHz, 2A/3A Fully Integrated Step-Down Converters with 15μA Operating Current For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.