MAG3110 FREESCALE | Alldatasheet

Document overview

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Technical content

Features

  • 1.95V to 3.6V Supply Voltage (VDD)
  • 1.65V to VDD IO Voltage (VDDIO)
  • Ultra Small 2 mm x 2 mm x 0.85 mm, 0.4 mm Pitch, 10 Pin Package
  • Full Scale Range ±1000 μT
  • Sensitivity of 0.10 μT
  • Noise down to 0.05 μT rms
  • Output Data Rates (ODR) up to 80 Hz 2C digital output interface (operates up to 400 kHz Fast Mode)
  • 7 - b i t I2C address = 0x0E
  • Sampled Low Power Mode
  • RoHS compliant

Applications

  • Electronic Compass
  • Dead-reckoning assistance for GPS backup
  • Location-based Services

ORDERING INFORMATION

Part Number Temperature Range Package Description Shipping MAG3110FCR2 -40°C to +85°C DFN-10 Tape and Reel

10 PIN DFN

2 mm x 2 mm x 0.85 mm CASE 2154 MAG3110 MAG3110: 3-AXIS DIGITAL MAGNETOMETER Top and Bottom View Top View Pin Connections Cap-A VDD NC Cap-R GND GND INT1 SDA VDDIO SCL MAG3110

  • AN4246, Calibrating for Soft Iron and Hard Iron Distortions
  • AN4247, PCB Layout Guidelines and Recommendations
  • AN4248, Using the MAG3110 Magnetometer for an eCompass Application
  • AN4249, Using the MAG3110 Magnetometer to Implement a 3-D Pointer

1 Block Diagram and Pin Description

1.1 Block Diagram

Figure 1. Block Diagram

1.2 Pin Description

Figure 2. Pin Connections Figure 3. Measurement Coordinate System

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1.3 Application Circuit

near as possible to pins 1 and 2 of the device. VDDIO supplies power for the I/O pins SCL, SDA, and INT1. signals SCL and SDA will clamp any logic signals with their internal ESD protection diodes. Figure 4. Electrical Connection Table 1. Pin Description

1 Cap-A Bypass Cap for Internal Regulator

3 NC No Connect – do not connect

4 Cap-R Cap for Reset Pulse

5 GND GND

6 SDA I2C Serial Data (Write = 0x1C; Read = 0x1D)

7 SCL I2C Serial Clock

9 INT1 Interrupt - Active High Output

10 GND GND

2 Operating and Electrical Specifications

2.1 Operating Characteristics

2.2 Absolute Maximum Ratings

extended periods may affect device reliability. Table 2. Operating Characteristics @ VDD = 1.8 V, T = 25°C unless otherwise noted.

  1. OS = Over Sampling Ratio.
  2. Self-test is one direction only.

20 LSB

Table 3. Maximum Ratings Table 4. ESD and Latch-up Protection Characteristics cause the part to otherwise fail. This is an ESD sensitive, improper handling can cause permanent damage to the part.

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2.3 Electrical Characteristics

Table 5. Electrical Characteristics @ VDD = 2.0V, VDDIO = 1.8V, T = 25°C unless otherwise noted

  1. ODR = Output Data Rate; OS = Over Sampling Ratio.
  2. Time to obtain valid data from STANDBY mode to ACTIVE Mode.

2.4 I 2C Interface Characteristics

Table 6. I2C Slave Timing Values(1)

  1. All values referred to VIH (min) and VIL (max) levels.
  2. tHD;DAT is the data hold time that is measured from the falling edge of SCL, applies to data in transmission and the acknowledge.
  3. A device must internally provide a hold time of at least 300 ns for the SDA signal (with respect to the VIH (min) of the SCL signal) to bridge the

undefined region of the falling edge of SCL.

  1. The maximum tHD;DAT could be must be less than the maximum of tVD;DAT or tVD;ACK by a transition time. This device does not stretch the

LOW period (tLOW) of the SCL signal.

  1. tVD;DAT = time for Data signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is worse).
  2. tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is worse).
  3. A Fast mode I2C device can be used in a Standard mode I2C system, but the requirement tSU;DAT 250 ns must then be met. This will
  4. Cb = total capacitance of one bus line in pF.
  5. The maximum tf for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage tf is specified at 250 ns.

this when considering bus timing.

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Figure 5. I2C Slave Timing Diagram

2.5 General I 2C Information

high state. The value of the pull-up resistors depends on the system I2C clock rate and the capacitance load on the I2C bus. between the bus capacitance and the pull-up resistor) and will limit the I2C clock frequency. Lower resistance value pull-up resistors consume more power, but enable higher I2C clock operating frequencies. pull-up resistor is required in higher bus capacitance systems. in addition to selecting a lower value resistance pull-up resistor. Pull-up resistors for high speed buses typically are about 1K Ω. bus capacitance can be kept under 20 pF. With a 1K pull-up resistor, the I2C clock rates can be well in excess of a few megahertz.

3 Modes of Operation

Table 7. Modes of Operation Description STANDBY I 2C communication is possible. Only POR and digital blocks are enabled. Analog subsystem is disabled. ACTIVE I 2C communication is possible. All blocks are enabled (POR, Digital, Analog).

magnetic transducer for sensing and an ASIC for control and digital I2C communications.

4.1 I2C Serial Interface

magnetic data readings are available. Interrupt driven sampling allows operation without the overhead of software polling.

4.2 Factory Calibration

automatically by the MAG3110 ASIC before the magnetic field readings are written to registers 0x01 to 0x06 (see section 5). offset which can be automatically subtracted from the magnetic field readings (see section 4.3.3).

4.3 Digital Interface

compliant with Fast mode (400 kHz), and Normal mode (100 kHz) I2C standards.

4.3.1 General I 2C Operation

the serial data line or SDA. Pull-up resistors are required on both lines. address does not match, the device ignores further bus activity until the next start condition happens. must then pull the data line low during this clock period. MAG3110 device does clock stretching. A data transfer is always terminated by a STOP. write bit is set in the lowest bit position. The I2C 8-bit write address is 0x1C and the read address is 0x1D. The I2C 8-bit write address is 0x3A and the read address is 0x3B. Please consult the factory for alternate addresses. Table 8. Serial Interface Pin Description

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See Figure 6 for details on how to perform read/write operations with MAG3110. Figure 6. MAG3110 I2C Generic Read/Write Operations

4.3.2 Fast Read Mode

(OUT_X_MSB, OUT_X_LSB, OUT_Y_MSB, OUT_Y_LSB, OUT_Z_MSB, OUT_Z_LSB).

4.3.3 User Offset Corrections

device board mount. These values may be used to compensate for hard iron interference. always applied irrespective of the setting of the RAW bit. of the RAW bit which only controls the subtraction of the user defined hard iron offset.

4.3.4 INT1

  1. Put MAG3110 in ACTIVE mode (CTRL_REG1 = 0bXXXXXX01).
  2. Idle until INT1 goes HIGH and activates an interrupt service routine in the user software.
  3. Read magnetometer data as required from registers 0x01 to 0x06. INT1 is cleared when register 0x01 OUT_X_MSB is

read and this register must therefore always be read in the interrupt service routine.

  1. Return to idle in step 2.

4.3.5 Triggered Measurements

Set the TM bit in CTRL_REG1 when you want the part to acquire only 1 sample on each axis. See table below for details. 0 0 ASIC is in low power standby mode.

5 Register Description

Table 9. Register Address Map

  1. Fast Read mode for quickly reading the Most Significant Bytes (MSB) of the sampled data.
  2. Register contents are preserved when transitioning from “ACTIVE” to “STANDBY” mode.
  3. Modification of this register’s contents can only occur when device is “STANDBY” mode, except the TM and AC bit fields in CTRL_REG1

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5.1 Sensor Status

5.1.1 DR_STATUS (0x00)

to the OUT_X, OUT_Y, and OUT_Z registers. bytes of the data (OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB) of all active channels are read. previous data is overwritten. ZOW is cleared any time OUT_Z_MSB register is read. previous data is overwritten. YOW is cleared any time OUT_Y_MSB register is read. previous data is overwritten. XOW is cleared any time OUT_X_MSB register is read. data (OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB) of all the enabled channels are read. ZDR is set to 1 whenever new Z-axis data acquisition is completed. ZDR is cleared any time OUT_Z_MSB register is read. YDR is set to 1 whenever new Y-axis data acquisition is completed. YDR is cleared any time OUT_Y_MSB register is read. XDR is set to 1 whenever new X-axis data acquisition is completed. XDR is cleared any time OUT_X_MSB register is read. Table 10. DR_STATUS Register Table 11. DR_STATUS Description X, Y, Z-axis Data Overwrite. Default value: 0. 0: No data overwrite has occurred. 1: Previous X or Y or Z data was overwritten by new X or Y or Z data before it was completely read. Z-axis Data Overwrite. Default value: 0. 0: No data overwrite has occurred. 1: Previous Z-axis data was overwritten by new Z-axis data before it was read. Y-axis Data Overwrite. Default value: 0. 0: No data overwrite has occurred. 1: Previous Y-axis data was overwritten by new Y-axis data before it was read. 0: No data overwrite has occurred. 1: Previous X-axis data was overwritten by new X-axis data before it was read. X or Y or Z-axis new Data Ready. Default value: 0. 0: No new set of data ready. 1: New set of data is ready. Z-axis new Data Available. Default value: 0. 0: No new Z-axis data is ready. 1: New Z-axis data is ready. Z-axis new Data Available. Default value: 0. 0: No new Y-axis data is ready. 1: New Y-axis data is ready. Z-axis new Data Available. Default value: 0. 0: No new X-axis data is ready. 1: New X-axis data is ready.

5.1.2 OUT_X_MSB (0x01), OUT_X_LSB (0x02), OUT_Y_MSB (0x03), OUT_Y_LSB (0x04),

1000 μT full scale range and the zero flux offset ranging up to 500 μT). stored in the auto-incrementing address range of 0x00 to 0x06. Data acquisition is a sequential read of 6 bytes. be read regardless of FR bit setting. Table 12. OUT_X_MSB Register Table 13. OUT_X_LSB Register Table 14. OUT_Y_MSB Register Table 15. OUT_Y_LSB Register Table 16. OUT_Z_MSB Register Table 17. OUT_Z_LSB Register

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5.2 Device ID

5.2.1 WHO_AM_I (0x07)

programmed. Consult factory for custom alternate values.

5.2.2 SYSMOD (0x08)

The read-only system mode register indicates the current device operating mode.

5.3 User Offset Correction

5.3.1 OFF_X_MSB (0x09), OFF_X_LSB (0x0A), OFF_Y_MSB (0x0B), OFF_Y_LSB (0x0C),

likely scenario) then the user offset registers can be ignored and the RAW bit should be set to 1. which are always applied to the measured magnetic data. Table 18. WHO_AM_I Register Table 19. SYSMOD Register

000000 S YSMOD1 S YSMOD0

Table 20. SYSMOD Description System Mode. Default value: 00. 10: ACTIVE mode, non-RAW user-corrected data. Table 21. OFF_X_MSB Register Table 22. OFF_X_LSB Register Table 23. OFF_Y_MSB Register Table 24. OFF_Y_LSB Register

5.4 Temperature

5.4.1 DIE_TEMP (0x0F)

in actual function the range is from -40°C to 125°C.

5.5 Control Registers

5.5.1 CTRL_REG1 (0x10)

Table 25. OFF_Z_MSB Register Table 26. OFF_Z_LSB Register Table 27. TEMP Register Table 28. CTRL_REG1 Register

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Table 29. CTRL_REG1 Description DR[2:0] Data rate selection. Default value: 000. See Table 30 for more information. This register configures the over sampling ratio or measurement integration time. See Table 30 for more information. Fast Read selection. Default value: 0. 0: The full 16-bit values are read. 1: Fast Read, 8-bit values read from the MSB registers. 0: Normal operation based on AC condition. If part is in ACTIVE mode, any measurement in progress will complete before triggered measurement. Operating mode selection. Default value: 0. Table 30. Over Sampling Ratio and Data Rate Description

5.5.2 CTRL_REG2 (0x11)

Table 31. CTRL_REG2 Register Table 32. CTRL_REG2 Description Automatic Magnetic Sensor Reset. Default value: 0. 0: Automatic magnetic sensor resets off. 1: Automatic magnetic sensor resets on. Similar to Mag_RST, however, the resets occur before each data acquisition. Data output correction. Default value: 0. 0: Normal mode: data values are corrected by the user offset register values. 1: Raw mode: data values are not corrected by the user offset register values. Magnetic Sensor Reset. Default value: 0. 1: Reset cycle initiate or Reset cycle busy/active. When the cycle is finished, value returns to 0. Self-test Z-axis Default value: 0. 1: Self-test, active Z-axis. Self-test Y-axis. Default value: 0. 1: Self-test, active Y-axis. Self-test X-axis. Default value: 0. 1: Self-test, active X-axis.

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6 Geomagnetic Field Maps

The magnitude of the geomagnetic field varies from 25 μT in South America to about 60 μT over Northern China. The horizontal component of the field varies from zero at the magnetic poles to 40 μT. These web sites have further information: http://wdc.kugi.kyoto-u.ac.jp/igrf/ http://geomag.usgs.gov

Freescale Semiconductor 18 MAG3110 The placement of MAG3110 on the application PCB should be done based on the guidelines given in AN4247, “PCB Layout Guidelines and Recommendations” to minimize magnetic interference to the MAG3110 from other components and ensure that the MAG3110 output does not saturate in fields above 1000 μT. Geomagnetic Field MAG3110MAG3110 Sensitivity Full Scale Sensitivity(0.1 μT) (1000 μT)

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7 Suggested PCB Footprint

Figure 7. PCB Footprint Dimensions Solder Paste Stencil: 4 mil thickness, type 3 paste is recommended.

Freescale Semiconductor 20 MAG3110 PACKAGE DIMENSIONS CASE 2154-01 ISSUE XO

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Freescale Semiconductor 22 MAG3110 PACKAGE DIMENSIONS CASE 2154-01 ISSUE XO

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