M95640 STMICROELECTRONICS | Alldatasheet

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Figure 1. Packages

M95640, M95320 SIGNAL DESCRIPTION During all operations, VCC must be held stable and within the specified valid range: VCC (min) to VCC (max). All of the input and output signals must be held High or Low (according to voltages of VIH, VOH , VIL or VOL , as specified in Tables 13 to 17). These sig- nals are described next. Serial Data Output (Q).This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of Serial Clock (C). Serial Data Input (D).This input signal is used to transfer data serially into the device. It receives in- structions, addresses, and the data to be written. Values are latched on the rising edge of Serial Clock (C). Serial Clock (C).This input signal provides the timing of the serial interface. Instructions, address- es, or data present at Serial Data Input (D) are latched on the rising edge of Serial Clock (C). Data on Serial Data Output (Q) changes after the falling edge of Serial Clock (C). Chip Select (S ).When this input signal is High, the device is deselected and Serial Data Output (Q) is at high impedance. Unless an internal Write cycle is in progress, the device will be in the Stand- by mode. Driving Chip Select (S ) Low enables the device, placing it in the active power mode. After Power-up, a falling edge on Chip Select (S) is required prior to the start of any instruction. Hold (HOLD ).The Hold (HOLD) signal is used to pause any serial communications with the device without deselecting the device. During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data Input (D) and Serial Clock (C) are Don’t Care. To start the Hold condition, the device must be se- lected, with Chip Select (S ) driven Low. Write Protect (W).The main purpose of this in- put signal is to freeze the size of the area of mem- ory that is protected against Write instructions (as specified by the values in the BP1 and BP0 bits of the Status Register). This pin must be driven either High or Low, and must be stable during all write operations.

Figure 6. SPI Modes Supported

cates the status of the internal Write Enable Latch. be software protected against Write instructions. Table 2. Status Register Format is the Software Protected Mode (SPM). the Hardware Protected Mode (HPM). some other device on the SPI bus. Table 3. Write-Protected Block Size

The memory is organized as shown in Figure 8. Figure 8. Block Diagram

1 Page

Table 4. Instruction Set Figure 9. Write Enable (WREN) Sequence

Figure 10. Write Disable (WRDI) Sequence – WRITE instruction completion.

Figure 11. Read Status Register (RDSR) Sequence Write or Write Status Register cycle is in progress. bit before sending a new instruction to the device. tinuously, as shown in Figure 11. cates the status of the internal Write Enable Latch. be software protected against Write instructions.

Figure 12. Write Status Register (WRSR) Sequence the Write Enable Latch (WEL). The instruction sequence is shown in Figure 12. Register. b6, b5 and b4 are always read as 0. pleted, the Write Enable Latch (WEL) is reset. ware Protected Mode (HPM) is entered.

Table 5. Protection Modes Note: 1. As defined by the values in the Block Protect (BP1, BP0) bits of the Status Register, as shown in Table 3. been set by a Write Enable (WREN) instruction. been set by a Write Enable (WREN) instruction. the Status Register Write Disable (SRWD) bit. the Status Register, can be used. Table 6. Address Range Bits Note: 1.b15 to b13 are Don’t Care on the M95640. b15 to b12 are Don’t Care on the M95320.

Figure 13. Read from Memory Array (READ) Sequence Note:Depending on the memory size, as shown in Table 6, the most significant address bits are Don’t Care. (S) signal can occur at any time during the cycle. ed, if a Write cycle is currently in progress.

Figure 14. Byte Write (WRITE) Sequence Note:Depending on the memory size, as shown in Table 6, the most significant address bits are Don’t Care. ) High at a byte boundary of the input data. Progress (WIP) bit is reset to 0. by the Block Protect (BP1 and BP0) bits.

Figure 15. Page Write (WRITE) Sequence Note:Depending on the memory size, as shown in Table 6, the most significant address bits are Don’t Care.

M95640, M95320 POWER-UP AND DELIVERY STATE Power-up State After Power-up, the device is in the following state: – Stand-by mode – deselected (after Power-up, a falling edge is re- quired on Chip Select (S ) before any instruc- tions can be started). – not in the Hold Condition – the Write Enable Latch (WEL) is reset to 0 – Write In Progress (WIP) is reset to 0 the SRWD, BP1 and BP0 bits of the Status Regis- ter are unchanged from the previous power-down (they are non-volatile bits). INITIAL DELIVERY STATE The device is delivered with the memory array set at all 1s (FFh). The Status Register Write Disable (SRWD) and Block Protect (BP1 and BP0) bits are initialized to 0.

Table 7. Absolute Maximum Ratings

  1. No longer than 10 seconds
  2. Not exceeding 250°C for more than 30 seconds, and peaking at 260°C

Table 8. Operating Conditions (M95xxx) Table 9. Operating Conditions (M95xxx-W) Table 10. Operating Conditions (M95xxx-R) Note: 1. This product is under development. For more information, please contact your nearest ST sales office. Table 11. AC Measurement Conditions Note: 1. Output Hi-Z is defined as the point where data out is no longer driven. Figure 16. AC Measurement I/O Waveform

Table 12. Capacitance Note: Sampled only, not 100% tested, at TA=25°C and a frequency of 5 MHz. Table 13. DC Characteristics (M95xxx, temperature range 6) Note: 1. For all 5V range devices, the device meets the output requirements for both TTL and CMOS standards.

  1. Current product: identified by Process Identification letter S.
  2. New product: identified by Process Identification letter V.

Table 14. DC Characteristics (M95xxx, temperature range 3) Note: 1. For all 5V range devices, the device meets the output requirements for both TTL and CMOS standards.

  1. Current product: identified by Process Identification letter S.
  2. New product: identified by Process Identification letter B.

Table 15. DC Characteristics (M95xxx-W, temperature range 6) Note: 1. Current product: identified by Process Identification letter S.

  1. New product: identified by Process Identification letter V.

Table 16. DC Characteristics (M95xxx-W, temperature range 3) Note: New product: identified by Process Identification letter B. Table 17. DC Characteristics (M95xxx-R) Note: 1. This product is under qualification. For more infomation, please contact your nearest ST sales office.

Table 18. AC Characteristics (M95xxx, temperature range 6)

  1. Value guaranteed by characterization, not 100% tested in production.
  2. Current product: identified by Process Identification letter S.
  3. New product: identified by Process Identification letter V.

Table 19. AC Characteristics (M95xxx, temperature range 3)

  1. Value guaranteed by characterization, not 100% tested in production.
  2. Current product: identified by Process Identification letter S.
  3. New product: identified by Process Identification letter B.

Table 20. AC Characteristics (M95xxx-W, temperature range 6)

  1. Value guaranteed by characterization, not 100% tested in production.
  2. Current product: identified by Process Identification letter S.
  3. New product: identified by Process Identification letter V.

Table 21. AC Characteristics (M95xxx-W, temperature range 3)

  1. Value guaranteed by characterization, not 100% tested in production.
  2. New product: identified by Process Identification letter B.

Table 22. AC Characteristics (M95xxx-R)

  1. Value guaranteed by characterization, not 100% tested in production.
  2. Preliminary data: this product is under qualification. For more infomation, please contact your nearest ST sales office.

Figure 19. Output Timing

Figure 20. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Outline Notes: 1. Drawing is not to scale. Table 23. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Mechanical Data

Figure 21. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Outline Note: Drawing is not to scale. Table 24. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Mechanical Data

Figure 22. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Outline Notes: 1. Drawing is not to scale. Table 25. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Mechanical Data

Figure 23. TSSOP14 - 14 lead Thin Shrink Small Outline, Package Outline Notes: 1. Drawing is not to scale. Table 26. TSSOP14 - 14 lead Thin Shrink Small Outline, Package Mechanical Data

Table 27. Ordering Information Scheme their device identification, please contact your nearest ST sales office, and ask for the Product Change Notice. Table 28. How to Identify Current and Forthcoming Products by the Process Identification Letter

M95640, M95320

REVISION HISTORY

Table 29. Document Revision History Test condition added ILI and ILO , and specification of tDLDH and tDHDL removed. tCLCH , tCHCL , tDLDH and tDHDL changed to 50ns for the -V range. “-V” Voltage range changed to “2.7V to 3.6V” throughout. Maximum lead soldering time and temperature conditions updated. Instruction sequence illustrations updated. “Bus Master and Memory Devices on the SPI bus” illustration updated. Package Mechanical data updated. 18-Dec-2001 2.0 Document reformatted using the new template. No parameters changed. 08-Feb-2002 2.1 Announcement made of planned upgrade to 10 MHz clock for the 5V , –40 to 85°C, range. 21-Nov-2003 3.1 VI(min) and VO (min) corrected (improved) to -0.45V .

M95640, M95320 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2003 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States