M88 STMICROELECTRONICS | Alldatasheet

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Complete data available onData-on-Disc CD-ROM or atwww.st.com M88 FAMILY In-System Programmable (ISP) Multiple-Memory and Logic FLASH+PSD Systems (with CPLD) for MCUs n Single Supply Voltage: –5 V ±10% for M88xxFxY – 3 V (+20/–10%) for M88xxFxW n 1 or 2 Mbit of Primary Flash Memory (8 uniform sectors, 16K x 8, or 32K x 8) n A second non-volatile memory: – 256 Kbit (32K x 8) EEPROM (for M8813F1x) or Flash memory (for M88x3F2x) – 4 uniform sectors (8K x 8) n SRAM (16 Kbit, 2K x 8; or 64 Kbit, 8K x 8) n Over 3,000 Gates of PLD: DPLD and CPLD n 27 Reconfigurable I/O ports n Enhanced JTAG Serial Port n Programmable power management n Stand-by current: –5 0 µA for M88xxFxY –2 5 µA for M88xxFxW n High Endurance: – 100,000 Erase/Write Cycles of Flash Memory – 10,000 Erase/Write Cycles of EEPROM – 1,000 Erase/Write Cycles of PLD

DESCRIPTION

The FLASH+PSD family of memory systems for microcontrollers (MCUs) brings In-System- Figure 1. Logic Diagram Table 1. Signal Names

39 AD15

38 AD14

37 AD13

36 AD12

35 AD11

34 AD10

33 AD9

32 AD8

31 VCC

30 AD7

29 AD6

28 AD5

27 AD4

Table 2. Product Range1

  1. SRAM may be backed up using an external battery.

flexible solution for embedded designs. MCU and other supporting devices. programmed into the FLASH+PSD.

Figure 3. FLASH+PSD Block Diagram

1 OR 2 MBIT PRIMARY

8 SECTORS

3 EXT CS TO PORT D

24 INPUT MACROCELLS

256 KBIT SECONDARY

4 SECTORS

16 OR 64 KBIT BATTERY

16 OUTPUT MACROCELLS

Sometimes computers try to be too clever for their own good. Take this illustration for instance. just to weight the average in this direction.

FLASH+PSD Macrocells by the MCU. multiple functions and are user configurable. sectors that are individually selectable. sectors. Each sector is individually selectable. different address space as defined by the user. the address latching and DPLD decoding time. Table 3. The functional partitioning of the PLDs performance, and eases design entry. the power management features. can be configured to be open drain. address/data bus for certain types of 8-bit MCUs. signals, which are also used as inputs to the PLDs.

JTAG is also fully supported. functional blocks of the FLASH+PSD. functional blocks based on system requirements. mode that helps reduce power consumption. the next transition on its inputs. the full data sheet for more details. bit can be cleared is to erase the entire chip. Table 3. PLD I/O Table 4. JTAG SIgnals on Port C Table 5. Methods of Programming Different Functional Blocks of the FLASH+PSD

  1. The code, configuration, and PLD logic are

loaded using the programming procedure. contact your nearest ST Sales Office. Table 6. Ordering Information Scheme Note: 1. Available on the 4.5 to 5.5 V range, only.

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  2000 STMicroelectronics - All Rights Reserved The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com