M87C257_06 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 Description
  • 2 Device operation
  • 2.1 Read mode
  • 2.2 Standby mode
  • 2.3 Two Line Output Control
  • 2.4 System considerations
  • 2.5 Programming
  • 2.6 PRESTO II programming algorithm
  • 2.7 Program Inhibit
  • 2.8 Program Verify
  • 2.9 Electronic signature
  • 2.10 Erasure operation (applies for UV EPROM)
  • 3 Maximum rating
  • 4 DC and AC parameters
  • 5 Package mechanical
  • 6 Part numbering
  • 7 Revision history

256 Kbit (32Kb x8) UV EPROM and OTP EPROM

■ 5V ± 10% supply voltage in Read operation ■ Integrated address latch ■ Access time: 45ns ■ Low power consumption: – Active Current 30mA – Standby Current 100µA ■ Programming voltage: 12.75V ± 0.25V ■ Programming times of around 3s ■ Electronic signature – Manufacturer Code: 20h – Device Code: 80h ■ ECOPACK® packages available FDIP28W (F) PLCC32 (C)

Table 12. FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window (round 0.280"), Table 13. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier,

1 Description

written to the device by following the programming procedure. required, the M87C257 is offered in PLCC32 package. on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 1. Logic diagram

Figure 2. DIP connections Figure 3. LCC connections Table 1. Signal names

1 ASV PP

2 Device operation

The modes of operation of the M87C257 are listed in the Operating Modes. A single power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature.

2.1 Read mode

The M87C257 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E ) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable (AS = VIH) or latched (AS = VIL), the address access time (tAVQV ) is equal to the delay from E to output (tELQV ). Data is available at the output after delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV - tGLQV .The M87C257 reduces the hardware interface in multiplexed address-data bus systems. The processor multiplexed bus (AD0-AD7) may be tied to the M87C257's address and data pins. No separate address latch is needed because the M87C257 latches all address inputs when AS is low.

2.2 Standby mode

The M87C257 has a standby mode which reduces the active current from 30mA to 100µA (Address Stable). The M87C257 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input.

2.3 Two Line Output Control

Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows:

  • the lowest possible memory power dissipation,
  • complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is desired from a particular memory device.

2.4 System considerations

The power switching characteristics of Advance CMOS EPROMs require careful decoupling of the devices. The supply current, ICC , has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E . The magnitude of this transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic capacitor be used on every device between V CC and VSS . This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between V CC and VSS for every eight devices. The bulk capacitor should be located near the power supply connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.

2.5 Programming

When delivered (and after each erasure for UV EPROM), all bits of the M87C257 are in the '1' state. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The only way to change a '0' to a '1' is by die exposition to ultraviolet light (UV EPROM). The M87C257 is in the programming mode when V PP input is at 12.75V, G is at VIH and E is pulsed to VIL. The data to be programmed is applied to 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6.25 V ± 0.25 V.

2.6 PRESTO II programming algorithm

PRESTO II Programming Algorithm allows to program the whole array with a guaranteed margin, in a typical time of 3.5 seconds. Programming with PRESTO II involves the application of a sequence of 100µs program pulses to each byte until a correct verify occurs (see Figure 4). During programming and verify operation, a MARGIN MODE circuit is automatically activated in order to guarantee that each cell is programmed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE provides necessary margin to each programmed cell.

Figure 4. Programming flowchart

2.7 Program Inhibit

2.8 Program Verify

2.9 Electronic signature

The Electronic Signature (ES) mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the M87C257. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M87C257, with V CC = VPP = 5V. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device identifier code. When A9 = VID, AS need not be toggled to latch each identifier address. For the STMicroelectronics M87C257, these two identifier bytes are given in Table 4 and can be read-out on outputs Q7 to Q0.

2.10 Erasure operation (applies for UV EPROM)

The erasure characteristics of the M87C257 is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å range. Research shows that constant exposure to room level fluorescent lighting could erase a typical M87C257 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M87C257 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M87C257 window to prevent unintentional erasure. The recommended erasure procedure for the M87C257 is exposure to short wave ultraviolet light which has wavelength 2537Å. The integrated dose (i.e. UV intensity x exposure time) for erasure should be a minimum of 15 W-sec/cm 2. The erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating. The M87C257 should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps have a filter on their tubes which should be removed before erasure.

3 Maximum rating

Program and other relevant quality documents. Table 2. Absolute maximum ratings

  1. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than

Table 3. Operating modes Table 4. Electronic signature

4 DC and AC parameters

match the measurement conditions when relying on the quoted parameters. Figure 5. AC testing input output waveform Figure 6. AC testing load circuit Table 5. AC measurement conditions

Table 6. Capacitance (1) (2)

  1. Sampled only, not 100% tested.

Table 7. Read mode DC characteristics(1) (2)

  1. V CC must be applied simultaneously with or before VPP and removed simultaneously or after VPP .
  2. Maximum DC voltage on Output is VCC +0.5V.

Table 8. Programming mode DC characteristics(1) (2)

  1. V CC must be applied simultaneously with or before VPP and removed simultaneously or after VPP .

Figure 7. Read mode AC waveforms

Table 9. Read mode AC characteristics 1(1) (2)

  1. V CC must be applied simultaneously with or before VPP and removed simultaneously or after VPP .
  2. Speed obtained with High Speed AC measurement conditions.
  3. Sampled only, not 100% tested.

Table 10. Read mode AC characteristics 2(1) (2)

  1. V CC must be applied simultaneously with or before VPP and removed simultaneously or after VPP .
  2. Sampled only, not 100% tested.

Figure 8. Programming and Verify modes AC waveforms Table 11. Programming mode AC characteristics(1) (2)

  1. V CC must be applied simultaneously with or before VPP and removed simultaneously or after VPP .

5 Package mechanical

Figure 9. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, package outline

Figure 10. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package

6 Part numbering

aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. Table 14. Ordering information scheme

  1. High Speed, see AC Characteristics section for further information.

7 Revision history

Table 15. Document revision history 01-Jun-1996 1 Initial release. updated (see Section 5: Package mechanical). X option removed from Table 15: Document revision history.